XilinxCoreLib Compile Scripts

Compiling the XilinxCoreLib library for D_IP2
 

Currently only MTI TCL compile scripts for the XilinxCoreLib VHDL and Verilog libraries are available.

MTI VHDL or Verilog: Please refer to Xilinx Solution #8066 for the link to these scripts and instructions on their use.
For information on how to compile the XilinxCoreLib libraries for MTI Verilog, VSS, VCS, or NC-Verilog, please consult the following solution records:
   
Synopsys VSS: http://support.xilinx.com/techdocs/8015.htm
Synopsys VCS: http://support.xilinx.com/techdocs/6330.htm
Cadence NC-Verilog: http://support.xilinx.com/techdocs/2554.htm
   


 
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