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            Spartan™-II Data Sheet

 
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Module 1: pdf (50 KB) Introduction and Ordering Information v2.1 11/00

  • Introduction
  • Features
  • General Overview
  • Product Availability
  • User I/O Chart
  • Ordering Information

Module 2: pdf (500 KB) Functional Description v2.0 9/00

  • Architectural Description
    • Spartan-II Array
    • Input/Output Block
    • Configurable Logic Block
    • Programmable Routing Matrix
    • Clock Distribution: Delay-Locked Loop
    • Boundary Scan
  • Development System
  • Configuration
    • Timing
    • Readback
  • Design Considerations
    • Using Delay-Locked Loops
    • Using Block SelectRAM+™ Features
    • Using Versatile I/O

Module 3: pdf (140 KB) DC and Switching Characteristics v2.2 1/01 

  • DC Specifications
    • Absolute Maximum Ratings
    • Recommended Operating Conditions
    • DC Characteristics
  • Switching Characteristics
    • Pin-to-Pin Parameters
    • IOB Switching Characteristics
    • Clock Distribution Characteristics
    • DLL Timing Parameters
    • CLB Switching Characteristics
    • Block RAM Switching Characteristics
    • TBUF Switching Characteristics
    • JTAG Switching Characteristics

Module 4: pdf (200 KB) Pinout Tables v2.2 11/00

  • Pin Definitions
  • Pinout Tables
 

Pinout Tables in Excel format

Xilinx Data Book

Spartan-II Product Information


 
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