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One Clock, Eight Data Channels, One Frame LVDS TX and RX Library

This page contains a library of instantiations of the design described in XAPP245. The organization of this page is as follows. Receivers and transmitters are listed separately. Both receivers and transmitters are listed by product and by package.

To find the desired instantiation, first scan the left column to locate the desired Virtex-E device. The links along the row associated with each device shows all of available packages. Select the desired package by clicking on the appropriate link.

A new page will appear with a number of links of the form:

{rt}lvds_1c_8d_1f_{vdev}{pkg} _{side}{index}

The substring lvds_1c_8d_1f_ defines this design as belonging to the library of lvds 1 clock, 8 data, 1 frame designs described in XAPP245. The arguments are as follows:

rt: Used to indicate whether the library element is a receiver or a transmitter. Legal values are 'rx' or 'tx'.
vdev: Indicates which Virtex-E device is instantiated. Legal values are any member of Virtex-E family.
pkg: Indicates which package is instantiated. Legal values are any valid package for a given device.
side: Indicates which side of the device (left or right) is instantiated.
index: Each design is placed in legal locations up and down the left and right hand side of the Virtex-E device. The index indicates which placement is selected.
 
As an illustrative example, consider the design rxlvds_1c_8d_1f_v50epq240_right0. It contains the description seen below:

FIFO RAMS

RAMB4_R1C2 RAMB4_R1C3
RAMB4_R2C2
RAMB4_R3C2 RAMB4_R3C3

RXP_D0 P124 RXN_D0 P123
RXP_D1 P128 RXN_D1 P127
RXP_D2 P131 RXN_D2 P130
RXP_D3 P134 RXN_D3 P133
RXP_FR P139 RXN_FR P138
RXP_CLK P145 RXN_CLK P144
RXP_D4 P153 RXN_D4 P152
RXP_D5 P157 RXN_D5 P156
RXP_D6 P160 RXN_D6 P159
RXP_D7 P163 RXN_D7 P162

CLBs CLB_R5C13:CLB_R17C24

 

The block SelectRAM modules are shown in the first section.
The I/O pins consumed by the design are shown in the second section.
The third section shows CLB consumption.

If all of these usage criteria are acceptable, click on the blue link to retrieve the EDIF netlist for incorporation into your design.

Receivers

XCV50E PQ240 FG256
XCV100E BG352 FG256
XCV200E FG456
XCV300E BG432 FG456
XCV400E FG676
XCV405E BG560 FG676
XCV600E FG676 FG680 FG900
XCV812E BG560 FG900
XCV1000E FG680 FG860 FG900 FG1156
XCV1600E FG680 FG860 FG900 FG1156
XCV2000E FG860 FG1156
XCV2600E FG1156
XCV3200E FG1156

Transmitters

XCV50E PQ240 FG256
XCV100E BG352 FG256
XCV200E FG456
XCV300E BG432 FG456
XCV400E FG676
XCV405E BG560 FG676
XCV600E FG676 FG680      
XCV812E
XCV1000E BG560 FG680 FG860 FG1156
XCV1600E FG680 FG860 FG1156
XCV2000E FG1156
XCV2600E FG1156
XCV3200E

 
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