Ann Duft
Xilinx, Inc.
(408) 879-4726
ann.duft@xilinx.com

 Frankie Borison
Oak Ridge Public Relations
(408) 253-5042
frankie@oakridge.com

FOR IMMEDIATE RELEASE

XILINX DELIVERS ON HIGH-DENSITY ROADMAP
AND INCREASES DENSITY LEADERSHIP

Industry's Largest FPGA, the XC4085XL Device, Affords Users "Credible" ASIC Alternative

 SAN JOSE, Calif., May 19, 1997--Xilinx, Inc., (NASDAQ:XLNX) the leader in programmable logic, today announced it has begun sampling the industry's largest field programmable gate array (FPGA), the XC4085XL device. The XC4085XL device is 40 percent larger than the previous density leader, the XC4062XL device. The new device is one of ten new Xilinx FPGA devices manufactured using advanced 0.35-micron process technology. All XC4000XL devices offer 3.3V operation with densities ranging from 465 to 7,448 logic cells (5,000 - 85,000 logic gates).

"Xilinx is moving aggressively to meet the milestones we outlined in our high-density roadmap last February," said Sandeep Vij, vice president of marketing. "Combined with our easy-to-learn, next-generation design software, Xilinx now offers a powerful new solution in performance and density for low-voltage requirements."

Positive Customer Response

"Recently at CAE, we re-examined our choice of FPGA suppliers for our next generation visual image generators," said Hesham El-Adly, ASIC coordinator at CAE Electronics Ltd., a leading supplier of commercial and military flight simulators, based in Quebec. "After an exhaustive evaluation of next generation technology from leading FPGA vendors, we chose Xilinx as our supplier for several reasons laid out in their strategic roadmap."

"We found Xilinx's offering of leading-edge FPGA technology met our low-power 3.3 voltage requirement without sacrificing performance or density. In fact, after designing with the XC4000XL devices, we have seen substantial performance, power, and density improvements--not attainable through other competing FPGA technologies," said El-Adly.

"In order to achieve the required performance to deliver a compelling visual environment to an aircraft pilot trainer, we have traditionally targeted high-performance ASICs to provide the required muscle," El-Adly said. "However, in our relatively low-volume market, justifying high ASIC non-recurring engineering (NRE) costs for low-volume ASICs was a large economic burden for us. With the density and performance of the XC4000XL family, we now have a credible alternative to using ASICs for some of our applications."

Density Metrics

Because counting programmable logic gates varies greatly from the ASIC suppliers' method, Xilinx has developed a new industry-standard metric for gate-density which Jerry Worchel, senior analyst at In-Stat, a leading market analysts firm in the semiconductor industry, has adopted. The majority of FPGA devices in use today are SRAM-based FPGA families whose logic blocks are based on a combination of memory look-up tables (LUTs) and dedicated registers. Although PLD architectures differ in many other respects, this commonality among FPGA suppliers of using LUTs and registers as the primary logic resource is employed to develop a more direct and objective capacity metric than gate counts.

Segmented Architectural Advantages

One of the reasons Xilinx is able to offer these high-performance, high-density devices, is the patented segmented routing architecture. The segmented routing of the XC4000XL architecture offers many advantages over non-segmented architectures.

Lower power: The XC4000XL family provides the lowest power devices in their class, a key benefit as the industry migrates to higher-density and higher-performance devices. The Xilinx FPGA devices operate at half the AC power of competitive products. This is largely due to the Xilinx segmented routing architecture. Because AC power is directly proportionally to capacitance, a shorter interconnect segment consumes less power, allowing operation at higher performance with higher reliability.

More efficient use of interconnect: The Xilinx segmented architecture has more, shorter interconnect lengths, allowing more efficient and faster connections than non-segmented architectures using long lines for interconnect.

Design and Implementation Software

Designing with the XC4085XL device is easy with Xilinx XACTstep Alliance Software Series, which provides all implementation technology, including design optimization and mapping, place and route, timing analysis, and programming generation. An open system strategy and partnerships with leading EDA vendors through the Xilinx Alliance Partner Program allows customers to compile XC4000XL designs with the front-end tool-package of their choice. The software is available on SUN-Sparc and HP-9000 workstations, and PC platforms running Microsoft Windows NT. A Windows 95 operating system will be available at a later date.

Pricing and Availability

Pricing for the devices starts at $1530 for the XC4085XL device in 100-piece quantities. Price decreases are planned for 2H97. The devices are available in PGA and BGA package options.

Founded in 1984, Xilinx is the world's largest supplier of programmable logic solutions producing industry-leading device architectures and world class design software. Headquartered in San Jose, Calif., the company pioneered the market for field programmable gate array (FPGA) semiconductor devices that provide high integration and quick time-to-market for electronic equipment manufacturers in the computer, peripheral, telecommunications, networking, industrial control, instrumentation, high-reliability/military, and consumer markets. For more information on Xilinx, access the worldwide web site at http://www.xilinx.com.

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Note to editors: Xilinx is a registered trademark of Xilinx, Inc. All XC-prefix product designations, XACTstep, and Alliance are trademarks of Xilinx, Inc. Other brands or product names are trademarks or registered trademarks of their respective owners. #9723