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XILINX ALLIANCE SERIES SOFTWARE SUPPORTS INDUSTRY’S FIRST TEN MILLION GATE FPGA DESIGNS Xilinx eliminates deep sub-micron design gap through silicon and software advancements SAN JOSE, Calif., May 8, 2000—Xilinx Inc., (NASDAQ:XLNX) today announced its latest release of the Alliance SeriesTM software, version 3.1i. Designed for the future sub-micron era of ten million gates, the new software incorporates the latest design flow enhancements with support for current Xilinx® architectures and future FPGA architectures implemented with 0.15 micron and below. With the new capabilities of version 3.1i, systems designers will be able to implement multi-million gate designs without being plagued by many of the deep-submicron problems inherent in ASICs. For example, the feature-rich Alliance Series software combined with advanced FPGA architectures shelters designers from parasitic issues such as crosstalk and ground bounce. The Alliance Series version 3.1i design flow enhancements include modular design for teams of engineers working together, dramatic runtime improvements for timing closure, incremental design flows, and hierarchical floorplanning for designs of up to ten million gates. All of these capabilities further enhance the time-to-market advantages of programmable logic technology. Demonstrations of all software products with the new version 3.1i software will be conducted at the Design Automation Conference in Xilinx booth #3629. “As enhanced, high speed, high density VirtexTM-E FPGAs continue to replace ASICs, our leadership position in design software technology is playing a dominant role in this paradigm shift,” said Rich Sevcik, Xilinx senior vice president of IP, services, and software. "Our solutions enable designers to deliver increased product innovation and productivity through an integrated design flow that address many of the issues they previously faced while designing ASICs”. Xilinx modular design for design team collaboration The Xilinx modular design tool in the new software version divides a design into functional modules in which a team member is assigned to each module. It allows full autonomy among team members to independently design, assign timing constraints, synthesize, and implement each module. Throughout the design cycle the modules can be placed in the design at any time, resulting in faster place and route run times and shorter time to timing closure for large designs. 4X runtime reduction for increase turns per day Alliance Series software version 3.1i delivers algorithmic improvements in both timing analysis and place-and-route that dramatically reduce runtimes while delivering increased timing performance through first pass results. These advancements have up to a four-fold runtime reduction on large Virtex designs (greater than one million gates) and an average two-fold runtime reduction on smaller devices. These algorithmic advancements also deliver performance improvements of up to 15 percent on existing VirtexTM architectures. Incremental design flows through synthesis partnerships The Alliance Series 3.1i software provides guided place and route integrated together with synthesis tools from Synopsys Inc., Exemplar and Synplicity. This guide capability allows a designer to make small changes in their design without disturbing other unchanged portions of the design. This capability is mandatory in multi-million gate designs during the verification, debugging process. Hierarchical floorplanning with graphic results Xilinx has enhanced its robust floorplanner delivered in the version 3.1i release. The designer can resize area groups without deleting or reapplying logic, graphically assign I/Os to actual device pin locations, and manipulate the groups at hierarchical levels simplifying floorplanning for the synthesis process. These higher level functions aid in integration with modular design methodologies and Register Transfer Level (RTL) level floorplanners. Within the Xilinx floorplanner a color-coded congestion viewer allows the designer to avoid potential problems and intelligently allocate resources. Price, platform, and availability The Alliance Series software provides architecture-specific device support for all Xilinx product families, including SpartanTM/XL, Spartan-II, Virtex, Virtex-E, Virtex-EM, and XC4000XTM FPGAs, plus XC9500TM and CoolRunner® CPLDs. The Alliance Series software is compatible for popular PC and workstation platforms and operating systems such as Windows95/98/2000 and Windows NT; Chinese, Korean, and Japanese Windows; Solaris and HP-UX. The new software version pricing starts at $1,495. About Alliance Series software The Alliance Series software is designed for companies who have made an investment in an EDA environment customized to suit the needs of their design engineers. The Xilinx Alliance Series software plug and plays by leveraging open systems standards, interfaces and formats such as EDIF, SDF, VHDL, VITAL/Verilog and STAMP. Combining the strengths of our EDA partner tools with the advanced implementation features found in the Xilinx Alliance Series software provides digital designers the ultimate in flexibility and design performance. For customers with a chosen EDA design flow, the Xilinx AllianceEDA Program insures that industry leading EDA vendors have tight integration with the Alliance Series software. As a result, the customer has a wide selection of EDA tools from which to choose, from design entry through simulation to board level verification. Xilinx is the leading innovator of complete programmable logic solutions, including advanced integrated circuits, software design tools, predefined system functions delivered as cores, and unparalleled field engineering support. Founded in 1984 and headquartered in San Jose, Calif., Xilinx invented the field programmable gate array (FPGA) and fulfills more than half of the world demand for these devices today. Xilinx solutions enable customers to reduce significantly the time required to develop products for the computer, peripheral, telecommunications, networking, industrial control, instrumentation, high-reliability/military, and consumer markets. For more information, visit the Xilinx web site at www.xilinx.com. —30— #0043
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