| FOR IMMEDIATE RELEASE
Xilinx IP Solutions Division Standardizes on Model Technology’s Simulation Tool, ModelSim PORTLAND, Ore. — November 28, 2000 — Xilinx, Inc. and Model Technology, a Mentor Graphics company, today announced that the Intellectual Property (IP) Solutions Division of Xilinx has standardized on ModelSimÒ for its simulation needs. Using ModelSim, the world’s most popular HDL simulation tool, Xilinx designers can verify large blocks of IP for rapid integration into XilinxÒ FPGAs, the world’s leading FPGA platform. At the performance and integration levels of the Xilinx next generation VirtexTM -II FPGAs, design reuse has become a standard practice in the design process that requires a simulation tool capable of handling large amounts of IP. By using ModelSim, FPGA designers can simulate Xilinx IP in either Verilog, VHDL or Mixed Language environment. This latest agreement will ensure that future versions of ModelSim are compatible with next generation Xilinx IP and FPGA architectures. “ModelSim is the standard at Xilinx for verifying IP,” said Mike Frazier, director of engineering for the IP solutions division at Xilinx. “ModelSim’s language-neutral support provides for an easy integration into our IP verification flow allowing our mutual customers to work in their design environment of preference.” “As a result of this agreement, Xilinx and Model Technology are making a strong commitment to maintain the highest standard in simulation surrounding design reuse,” said John Lenyo director of marketing for Model Technology. “Not only will Xilinx designers benefit from the tools’ compatibility, but also many of our mutual customers will benefit from ModelSim when integrating IP into multi-million gate devices, like the next generation Virtex-II FPGA .” About Xilinx
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