- Concept HDL
-
Cadence's Concept HDL is a schematic design entry system.
- FPGA Studio
-
The PCB Systems Division FPGA Studio series is a solution for designing
FPGAs that includes schematic entry; FPGA synthesis; HDL simulation; and
web-based project management. Customers have a choice of Orcad Capture
schematic or Cadence Concept. HDL schematic entry; Synplicity node-locked
Synplify for FPGA synthesis; and the Cadence Affirma NC VHDL desktop
simulator or Verilog-XL desktop simulator for HDL simulation.
- INCA
-
The Cadence INCA (Interleaved Native Compiled Architecture) technology
allows for simulation of components written in either Verilog or VHDL
hardware description languages. This gives customers the ability to
choose a mixture of event and cycle simulation, enables simulation for
mixed-analog and digital designs, and provides a path to formal
verification techniques. This flexibility is increasingly important
when faced with the integration of intellectual property (IP) blocks
coming from multiple sources and full system simulation.
- Affirma NC Verilog
-
The Affirma NC Verilog simulator uses Cadence's INCA technology to
provide a massively scalable, native compiled, Verilog simulator.
- Affirma NC VHDL
-
The Affirma NC VHDL simulator uses Cadence's INCA technology to
provide a massively scalable, native compiled, VHDL simulator.
- OrCad Capture
-
Orcad Capture is a schematic design entry system
- SPW
-
SPW is a block-oriented design, simulation, and implementation
environment for electronic systems. Common application areas for
SPW include wireless and wired communications, multimedia, and
networking equipment. SPW is ideal for algorithm development,
filter design, C code generation, hardware/software architecture
co-design and hardware synthesis. It generates RTL Verilog/VHDL
code for input to any synthesis tool. Hence, the flow works for
all Xilinx devcies which are supported by synthesis tools.
- Verilog-XL
-
Cadence's interpretive Verilog simulator.
|
