9500 Family Implementation Tools:M1.5/i Top Solutions  

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Core Tools

• Solution 2860:Understanding the CPLD Fitter Report 
• Solution 5795: CPLD: XC9500/XC9500XL/XC9500XV: What CPLD devices are supported in the 1.5i Service Pack1?
• Solution 3518: CPLD: What are the differences in reset lines in simulation and on the CPLD?
• Solution 5657: F1.5i_sp1 9500XV - Can be found under the 9500XL pull-down menu
• Solution 5685: F1.5i_sp1 9500XV auto-selection does not work automatically in this service pack 
• Solution 4338: F1.5/A1.5 Logiblox: What's new i n Logiblox? (CPLD Support) 
• Solution 4174: F1.5/A1.5 9500/XL: Fitter uses 2 Macrocells instead of 1 for Combinatorial latches
• Solution 5153: F1.5i/A1.5i Hitop - application error: the instruction at 0x780017## referenced at memory 0x#######. The memory could not be written (msvcrt.dll)
• Solution 4927: F1.5/A1.5 Hitop - application error: the instruction at 0x780017## referenced at memory 0x########. The memory could not be written (msvcrt.dll). Microsoft Visual Studio 6.0 compatibility issue 

Timing

• Solution 4826: M1.5 CPLD: TAENGINE caused an invalid page fault
• Solution 2339: M1 CPLD: TIG (Ignore Timing) timing constraint not supported