Command Reference2. FPGA Express Shell Commands report_timing _N_A_M_E report_timing Analyze timing for an optimized chip SYNTAX string report_timing [-critical] [-port] [-path_group _p_a_t_h__g_r_o_u_p__n_a_m_e] [_p_i_n__o_r__p_o_r_t__l_i_s_t] string _p_a_t_h__g_r_o_u_p__n_a_m_e list _p_i_n__o_r__p_o_r_t__l_i_s_t ARGUMENTS -critical Report the critical path for the current chip. The critical path report contains a list of pins and their required and arrival times. Additional information includes the type of cell for each pin as well as the number of fanout pins. -port Report the required time and slack for all design ports. The starting or ending timing group for each port is also reported. -path_group _p_a_t_h__g_r_o_u_p__n_a_m_e This option reports the required and estimated worst case delay for all timing endpoints in the path group specified by _p_a_t_h__g_r_o_u_p__n_a_m_e. The starting pin for the path leading to the worst case delay is also specified. This option limits path reporting to "path_group_name" when used in conjuction with the -_c_r_i_t_i_c_a_l option or when specifying the _p_i_n__o_r__p_o_r_t__l_i_s_t. It has no effect with the -_p_o_r_t option. _p_i_n__o_r__p_o_r_t__l_i_s_t A list of pins or ports may be optionally specified. The worst case timing path will be displayed for each pin or port in the list. Tracing to a particular path group can be specified with the -_p_a_t_h__g_r_o_u_p option. See the object(2) man page for details on how to describe pin and port lists. v3.0 Synopsys Inc. 1988-1998. All rights reserved. 2-1 report_timing 2. FPGA Express Shell Commands Command Reference DESCRIPTION Perform static timing analysis for the current chip. The current chip must be an optimized chip. By default, a report for the path groups is generated indicating the required delay for each path group and the worst case delay for all paths in the path group. EXAMPLES Default timing report. fe_shell > report_timing Timing Path Groups: ------------------- Required Estimated Delay Delay From To (ns) (ns) (I) (O) 20.00 27.21 (I) (RC,CLOCK_BUFGed) 20.00 26.92 (RC,CLOCK_BUFGed) (O) 20.00 28.82 (RC,CLOCK_BUFGed) (RC,CLOCK_BUFGed) 20.00 31.32 Timing report for specified endpoint fe_shell > set pin_list [get_pin /*/U2*<1>/C] {/AM2910- Optimized/U2/OUTPUT_reg<1>} fe_shell > report_timing $pin_list Path Timing: ------------ Arrival Required Cell Time Time Fanout Type (ns) (ns) Count Pin-Name DFF 31.32 20.00 28 /AM2910-Optimized/U2/OUTPUT_reg<1>/C DFF 30.82 19.50 1 /AM2910-Optimized/U2/OUTPUT_reg<1>/D EQN 29.56 18.24 1 /AM2910- Optimized/C877/O EQN 28.26 16.94 2 /AM2910-Optimized/C877/I1 SEE ALSO object(2),current_chip(2), 2-2 Synopsys Inc. 1988-1998. All rights reserved. v3.0