

Command Reference2.  FPGA Express Shell Commandsset_chip_hierarchy


_N_A_M_E
          set_chip_hierarchy
                         Specify hierarchical boundary options
                         for optimization.


SYNTAX
          string set_chip_hierarchy _p_r_e_s_e_r_v_e, _e_l_i_m_i_n_a_t_e, _i_n_h_e_r_i_t

          string    _p_r_e_s_e_r_v_e, _e_l_i_m_i_n_a_t_e, _i_n_h_e_r_i_t


ARGUMENTS
          _p_r_e_s_e_r_v_e       Preserve the boundary of the current
                         design.


          _e_l_i_m_i_n_a_t_e      Eliminate the boundary of the current
                         design.


          _i_n_h_e_r_i_t        Set the current design to inherit the
                         boundary option of the upper level
                         design. This is the default option.


DESCRIPTION
          This command sets the hierarchical boundary option for
          the all the modules of a chip.  This option is used
          during optimization to determine whether or not the
          boundary of a module is to preserved.  Preserving the
          boundary will prevent the ports of a module from being
          deleted.  Nets connected to these ports will be
          maintained as separate nets. Cells may still be pulled
          across a hierarchical boundary to merge with an IO pad.

          Eliminating the boundary will cause the ports of the
          modules be deleted and the nets connected across the
          boundary via the ports to be merged into a single net.
          The names of modules will be appended along with the
          hierarchy separator character '/' to cells and nets
          that are contained in the modules.


SEE ALSO
          set_module_hierarchy(2), set_chip_objective(2),
          set_chip_primitive(2), set_chip_sharing(2)


v3.0      Synopsys Inc. 1988-1998. All rights reserved.       2-1