Command Reference2.  FPGA Express Shell Commands        set_clock



_N_A_M_E
          set_clock      Define waveform for a clock


SYNTAX
          string set_clock -period _p_e_r_i_o_d__v_a_l_u_e
                 -rise _r_i_s_e__t_i_m_e -fall _f_a_l_l__t_i_m_e _c_l_o_c_k__n_a_m_e

         int  _p_e_r_i_o_d__v_a_l_u_e
         int  _r_i_s_e__t_i_m_e
         int  _f_a_l_l__t_i_m_e
         string    _c_l_o_c_k__n_a_m_e


ARGUMENTS
          -period _p_e_r_i_o_d__v_a_l_u_e
                         _p_e_r_i_o_d__v_a_l_u_e defines the full period of
                         the clock signal in nanoseconds.  The
                         preiod value must be greater than 0.


          -rise _r_i_s_e__t_i_m_e
                         Time of the rising edge of the clock
                         signal in nanoseconds.  The rise time
                         must be less than the period, greater
                         than 0, and not be equal to the fall
                         time.


          -fall _f_a_l_l__t_i_m_e
                         Time of the falling edge of the clock
                         signal in nanoseconds.  The fall time
                         must be less than the period, greater
                         than 0, and not be equal to the rise
                         time.


          _c_l_o_c_k__n_a_m_e     Name of clock to be specified.  The name
                         must be one of the names of the clocks
                         that has been determined by FPGA Express
                         (see get_clock(2), object(2)).

          Note that the name of clock can change between an pre-
          optimized and optimized version of a chip.  This
          behavior occurs when the pre-optimized clock net has
          been buffered.


DESCRIPTION
          Clocks are signals with a periodic behavior. In
          synchronous circuit designs, clocks are used to
          synchronize the propagation of data signals by



v3.0      Synopsys Inc. 1988-1998. All rights reserved.       2-1






set_clock       2.  FPGA Express Shell Commands Command Reference



          controlling sequential elements. It is important that
          the user accurately specifies all clocks so that FPGA
          Express can optimize a synchronous circuit efficiently.
          FPGA Express automatically analyzes the circuit and
          lists all the signals that require clock definitions in
          the Clocks constraint table.

          A clock is defined by its waveform, with rising and
          falling edge times in the interval between 0 and its
          period. It is important to know that the interval
          always starts at time 0. In this way, FPGA Express
          knows the precise relationship between all the clocks
          in the design.


EXAMPLES
          This example specifies a symmetric, rising-edge clock
          waveform with a period of 50 nanoseconds.
               fe_shell > set_clock -period 50 -rise 25 -fall 50
               CLOCK


SEE ALSO
          object(2),current_chip(2),































2-2       Synopsys Inc. 1988-1998. All rights reserved.      v3.0