Command Reference2.  FPGA Express Shell Commandsset_disable_timing



_N_A_M_E
          set_disable_timing
                         Disable timing through pins


SYNTAX
          string set_disable_timing _p_i_n__l_i_s_t

          list _p_i_n__l_i_s_t


ARGUMENTS
          _p_i_n__l_i_s_t       List of pins in the current chip to
                         disable.  See object(2) for describing
                         pin lists.



DESCRIPTION
          This command causes the pins in _p_i_n__l_i_s_t to be ignored
          during timing analysis.  These pins are essentially
          disconnected from the circuit from a timing point of
          view such that no timing data is propagated through
          these pins.  This command is valid only on an optimized
          chip.


EXAMPLES
          Disable pin I of cell C1009 in the current chip
          AM2910-Optimized.
               fe_shell > set_disable_timing /AM2910-
               Optimized/C1009/I


SEE ALSO
          object(2),current_chip(2)



















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