

Command Reference2.  FPGA Express Shell Commands    set_max_delay


_N_A_M_E
          set_max_delay  Set the maximum delay for a pathgroup


SYNTAX
          string set_max_delay -path_group _p_a_t_h__g_r_o_u_p__n_a_m_e
          _d_e_l_a_y__v_a_l_u_e

          string    _p_a_t_h__g_r_o_u_p__n_a_m_e
          int  _d_e_l_a_y__v_a_l_u_e


ARGUMENTS
          -path_group _p_a_t_h__g_r_o_u_p__n_a_m_e
                         Name of the path group.  See object(2)
                         for describing path groups.


          _d_e_l_a_y__v_a_l_u_e    Value for the maximum delay constraint
                         in nanoseconds.


DESCRIPTION
          This command sets the maximum path delay constraint for
          a path group in the current chip.  The path delay for a
          path group is the maximum delay allowed from any point
          in the starting timing group to any point in the ending
          timing group.  The static timing analyzer will use this
          value to derive the required times and slack for all
          elements in the ending timing group.


EXAMPLES
          This command sets the maximum delay for the path group
          named "(RC,CLOCK):(RC,CLOCK)" to 50 nanoseconds.
               fe_shell > set_max_delay -path_group
               (RC,CLOCK):(RC,CLOCK) 50


SEE ALSO
          object(2),current_chip(2),


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