

Command Reference UNKNOWN SECTION OF THE MANUAL   proj_enable_vpp


_N_A_M_E
          proj_enable_vpp


SYNTAX
          _S_t_r_i_n_g proj_enable_vpp = "_y_e_s" _o_r "_n_o"


DESCRIPTION
          This variable controls the use of the verilog
          preprocessor by the HDL analyzer.  If the variable
          proj_enable_vpp is set to "yes" then any subsequent
          analyze of verilog files will be done with the verilog
          pre-processor enabled. If the variable is set to "no",
          then any subsequent analyze of verilog files will not
          be done with the verilog pre-processor.  The default
          value for this variable is "no".  This variable only
          exists when a project is opened or created.  This
          variable only effects files analyzed after it has been
          changed.  To determine the current value of this
          variable, use
               fe_shell > printvar proj_enable_vpp.


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