--BENCHMARK 3             SMALL STATE MACHINE 
--Enumerated state types
--
--You can use the FSM encoding switch under Synthesis->Options
--One-Hot encoding -> 16 registers
--Binary encoding  -> 11 registers

entity prep3 is 
   port (CLK,RST : bit;
	inn : bit_vector (7 downto 0);
	outt:out bit_vector (7 downto 0));
end prep3;

architecture behavior of prep3 is 
	type state_type is 
	   (start,sa,sb,sc,sd,se,sf,sg);
	signal current_state :state_type;
begin 
    process (CLK,RST)
    begin
	if RST='1' then
	   current_state<= start;
	   outt <= x"00";
	elsif CLK = '1' and CLK'event then
	      case current_state is 
	      when start =>
		if inn = x"3c" then
		   current_state <=sa;
		   outt <= x"82";
		else
		   outt <= x"00";
		end if;
	      when sa =>
		if inn = x"2a" then
		   current_state <=sc;
		   outt <= x"40";
		elsif inn = x"1f" then
		   current_state <=sb;
		   outt <= x"20";
		else
		   outt <=x"04";
		end if ;
	      when sb =>
		if inn = x"aa" then 
		   current_state <= se;
		   outt <= x"11";
		else 
		   current_state <= sf;
		   outt <= x"30";
		end if;
	     when sc =>
		current_state <=sd;
		outt <=x"08";
	     when sd =>
		current_state <=sg;
		outt <= x"80";
	     when se =>
		current_state <=start;
		outt <= x"40";
	     when sf =>
		current_state <=sg;
		outt <= x"02";
	     when sg =>
		current_state <=start;
		outt <= x"01";
	     end case;
	end if;
     end process;
end behavior;