#
# am2910_nt.fst
#
# This script creates an optimized chip for the AM2910 sample design.
# It is designed for the Windows NT environment.
#
# This script and the design can be found in the samples/Synopsys
# sub-directory of the FPGA Express installation.
#
# To run the script:
#
#    fe_shell -f am2910_nt.fst
#

#
# Define variables
#
set proj am2910_proj
set top AM2910
set target XC4000E
set chip AM2910
set export_dir export_dir

#
# Remove any old version of the project,
# and create the new project.
# If you are re-running an existing design
# you can comment this part out.
#
exec cmd /c rd /q /s am2910_proj
create_project -dir . $proj

#
# To use a project that already
# exists, just open it
#
open_project $proj
#
# Setup project variables
#
proj_export_timing_constraint = "yes"

#
# Setup default variables
#
default_clock_frequency = 45

#
# Identify the library source files
#
create_library LIB
add_file -library LIB -format VHDL am2910/lib.vhd

#
# Identify the design source files
#
add_file -format VHDL am2910/am2910.vhd
add_file -format VHDL am2910/bts4.vhd
add_file -format VHDL am2910/control.vhd
add_file -format VHDL am2910/regcnt.vhd
add_file -format VHDL am2910/stack.vhd
add_file -format VHDL am2910/upc.vhd
add_file -format VHDL am2910/y.vhd

#
# Analyze all the source files and display the progress
#
analyze_file -progress

#
# Create a chip targetted for $TARGET with the default part and
# speed grade.  The chip will be named $chip.  $top indicates
# the top level design.
#
create_chip -progress -target $target -name $chip $top

#
# Set the current chip to add constraints
#
current_chip $chip

#
# Read the constraints file
#
source constraints.fst

#
# Optimize the current chip
#
set opt_chip [format "%s-Optimized" $chip]
optimize_chip -progress -name $opt_chip

#
# Show any error and warning messages for the chip
#
list_message

#
# Create a timing report
#
report_timing

#
# Write out the PPR netlist and constraints to the directory $export_dir
#
exec cmd /c rd /s /q $export_dir
exec cmd /c mkdir $export_dir
export_chip -progress -dir $export_dir

#
# Save and close the project 
#
close_project

quit