Using as

This document is distributed under the terms of the GNU Free Documentation License. A copy of the license is included in the section entitled “GNU Free Documentation License”.

1 Overview

Here is a brief summary of how to invoke as. For details, see Command-Line Options.

The following options are available when as is configured for an Altera Nios II processor.

The following options are available when as is configured for the ARM processor family.

The following options are available when as is configured for the Intel 80960 processor.

The following options are available when as is configured for the Ubicom IP2K series.

The following options are available when as is configured for the Renesas M32R (formerly Mitsubishi M32R) series.

The following options are available when as is configured for the Motorola 68000 series.

For details about the PDP-11 machine dependent features options, see PDP-11-Options.

The following options are available when as is configured for a picoJava processor.

The following options are available when as is configured for the Motorola 68HC11 or 68HC12 series.

The following options are available when as is configured for the SPARC architecture:

The following options are available when as is configured for the 'c54x architecture.

The following options are available when as is configured for an MCore processor.

The following options are available when as is configured for an Xtensa processor.

1.1 Structure of this Manual

This manual is intended to describe what you need to know to use gnu as. We cover the syntax expected in source files, including notation for symbols, constants, and expressions; the directives that as understands; and of course how to invoke as.

This manual also describes some of the machine-dependent features of various flavors of the assembler.

On the other hand, this manual is not intended as an introduction to programming in assembly language—let alone programming in general! In a similar vein, we make no attempt to introduce the machine architecture; we do not describe the instruction set, standard mnemonics, registers or addressing modes that are standard to a particular architecture. You may want to consult the manufacturer's machine architecture manual for this information.

1.2 The GNU Assembler

gnu as is really a family of assemblers. If you use (or have used) the gnu assembler on one architecture, you should find a fairly similar environment when you use it on another architecture. Each version has much in common with the others, including object file formats, most assembler directives (often called pseudo-ops) and assembler syntax.

as is primarily intended to assemble the output of the gnu C compiler gcc for use by the linker ld. Nevertheless, we've tried to make as assemble correctly everything that other assemblers for the same machine would assemble. Any exceptions are documented explicitly (see Machine Dependencies). This doesn't mean as always uses the same syntax as another assembler for the same architecture; for example, we know of several incompatible versions of 680x0 assembly language syntax.

Unlike older assemblers, as is designed to assemble a source program in one pass of the source file. This has a subtle impact on the .org directive (see .org).

1.3 Object File Formats

The gnu assembler can be configured to produce several alternative object file formats. For the most part, this does not affect how you write assembly language programs; but directives for debugging symbols are typically different in different file formats. See Symbol Attributes.

1.4 Command Line

After the program name as, the command line may contain options and file names. Options may appear in any order, and may be before, after, or between file names. The order of file names is significant.

-- (two hyphens) by itself names the standard input file explicitly, as one of the files for as to assemble.

Except for `--' any command line argument that begins with a hyphen (`-') is an option. Each option changes the behavior of as. No option changes the way another option works. An option is a `-' followed by one or more letters; the case of the letter is important. All options are optional.

Some options expect exactly one file name to follow them. The file name may either immediately follow the option's letter (compatible with older assemblers) or it may be the next command argument (gnu standard). These two command lines are equivalent:

1.5 Input Files

We use the phrase source program, abbreviated source, to describe the program input to one run of as. The program may be in one or more files; how the source is partitioned into files doesn't change the meaning of the source.

The source program is a concatenation of the text in all the files, in the order specified.

Each time you run as it assembles exactly one source program. The source program is made up of one or more files. (The standard input is also a file.)

You give as a command line that has zero or more input file names. The input files are read (from left file name to right). A command line argument (in any position) that has no special meaning is taken to be an input file name.

If you give as no file names it attempts to read one input file from the as standard input, which is normally your terminal. You may have to type <ctl-D> to tell as there is no more program to assemble.

Use `--' if you need to explicitly name the standard input file in your command line.

Filenames and Line-numbers

There are two ways of locating a line in the input file (or files) and either may be used in reporting error messages. One way refers to a line number in a physical file; the other refers to a line number in a “logical” file. See Error and Warning Messages.

Logical files are simply names declared explicitly by assembler directives; they bear no relation to physical files. Logical file names help error messages reflect the original source file, when as source is itself synthesized from other files. as understands the `#' directives emitted by the gcc preprocessor. See also .file.

1.6 Output (Object) File

Every time you run as it produces an output file, which is your assembly language program translated into numbers. This file is the object file. Its default name is a.out, or b.out when as is configured for the Intel 80960. You can give it another name by using the -o option. Conventionally, object file names end with .o. The default name is used for historical reasons: older assemblers were capable of assembling self-contained programs directly into a runnable program. (For some formats, this isn't currently possible, but it can be done for the a.out format.)

The object file is meant for input to the linker ld. It contains assembled program code, information to help ld integrate the assembled program into a runnable file, and (optionally) symbolic information for the debugger.

1.7 Error and Warning Messages

as may write warnings and error messages to the standard error file (usually your terminal). This should not happen when a compiler runs as automatically. Warnings report an assumption made so that as could keep assembling a flawed program; errors report a grave problem that stops the assembly.

(where NNN is a line number). If a logical file name has been given (see .file) it is used for the filename, otherwise the name of the current input file is used. If a logical line number was given (see .line) then it is used to calculate the number printed, otherwise the actual line in the current source file is printed. The message text is intended to be self explanatory (in the grand Unix tradition).

The file name and line number are derived as for warning messages. The actual message text may be rather less explanatory because many of them aren't supposed to happen.

2 Command-Line Options

This chapter describes command-line options available in all versions of the gnu assembler; see Machine Dependencies, for options specific to particular machine architectures.

If you are invoking as via the gnu C compiler, you can use the `-Wa' option to pass arguments through to the assembler. The assembler arguments must be separated from each other (and the `-Wa') by commas. For example:

This passes two options to the assembler: `-alh' (emit a listing to standard output with high-level and assembly source) and `-L' (retain local symbols in the symbol table).

Usually you do not need to use this `-Wa' mechanism, since many compiler command-line options are automatically passed to the assembler by the compiler. (You can call the gnu compiler driver with the `-v' option to see precisely what options it passes to each compilation pass, including the assembler.)

2.1 Enable Listings: -a[cdhlns]

These options enable listing output from the assembler. By itself, `-a' requests high-level, assembly, and symbols listing. You can use other letters to select specific options for the list: `-ah' requests a high-level language listing, `-al' requests an output-program assembly listing, and `-as' requests a symbol table listing. High-level listings require that a compiler debugging option like `-g' be used, and that assembly listings (`-al') be requested also.

Use the `-ac' option to omit false conditionals from a listing. Any lines which are not assembled because of a false .if (or .ifdef, or any other conditional), or a true .if followed by an .else, will be omitted from the listing.

Once you have specified one of these options, you can further control listing output and its appearance using the directives .list, .nolist, .psize, .eject, .title, and .sbttl. The `-an' option turns off all forms processing. If you do not request listing output with one of the `-a' options, the listing-control directives have no effect.

Note if the assembler source is coming from the standard input (eg because it is being created by gcc and the `-pipe' command line switch is being used) then the listing will not contain any comments or preprocessor directives. This is because the listing code buffers input source lines from stdin only after they have been preprocessed by the assembler. This reduces memory usage and makes the code more efficient.

2.2 -D

This option has no effect whatsoever, but it is accepted to make it more likely that scripts written for other assemblers also work with as.

2.3 Work Faster: -f

`-f' should only be used when assembling programs written by a (trusted) compiler. `-f' stops the assembler from doing whitespace and comment preprocessing on the input file(s) before assembling them. See Preprocessing.

2.4 .include Search Path: -I path

Use this option to add a path to the list of directories as searches for files specified in .include directives (see .include). You may use -I as many times as necessary to include a variety of paths. The current working directory is always searched first; after that, as searches any `-I' directories in the same order as they were specified (left to right) on the command line.

2.5 Difference Tables: -K

as sometimes alters the code emitted for directives of the form `.word sym1-sym2'; see .word. You can use the `-K' option if you want a warning issued when this is done.

2.6 Include Local Labels: -L

Labels beginning with `L' (upper case only) are called local labels. See Symbol Names. Normally you do not see such labels when debugging, because they are intended for the use of programs (like compilers) that compose assembler programs, not for your notice. Normally both as and ld discard such labels, so you do not normally debug with them.

This option tells as to retain those `L...' symbols in the object file. Usually if you do this you also tell the linker ld to preserve symbols whose names begin with `L'.

By default, a local label is any label beginning with `L', but each target is allowed to redefine the local label prefix. On the HPPA local labels begin with `L$'.

2.7 Configuring listing output: --listing

The listing feature of the assembler can be enabled via the command line switch `-a' (see a). This feature combines the input source file(s) with a hex dump of the corresponding locations in the output object file, and displays them as a listing file. The format of this listing can be controlled by pseudo ops inside the assembler source (see List see Title see Sbttl see Psize see Eject) and also by the following switches:

2.8 Assemble in MRI Compatibility Mode: -M

The -M or --mri option selects MRI compatibility mode. This changes the syntax and pseudo-op handling of as to make it compatible with the ASM68K or the ASM960 (depending upon the configured target) assembler from Microtec Research. The exact nature of the MRI syntax will not be documented here; see the MRI manuals for more information. Note in particular that the handling of macros and macro arguments is somewhat different. The purpose of this option is to permit assembling existing MRI assembler code using as.

The MRI compatibility is not complete. Certain operations of the MRI assembler depend upon its object file format, and can not be supported using other object file formats. Supporting these would require enhancing each object file format individually. These are:

There are some other features of the MRI assembler which are not supported by as, typically either because they are difficult or because they seem of little consequence. Some of these may be supported in future releases.

2.9 Dependency Tracking: --MD

as can generate a dependency file for the file it creates. This file consists of a single rule suitable for make describing the dependencies of the main source file.

2.10 Name the Object File: -o

There is always one object file output when you run as. By default it has the name a.out (or b.out, for Intel 960 targets only). You use this option (which takes exactly one filename) to give the object file a different name.

Whatever the object file is called, as overwrites any existing file of the same name.

2.11 Join Data and Text Sections: -R

-R tells as to write the object file as if all data-section data lives in the text section. This is only done at the very last moment: your binary data are the same, but data section parts are relocated differently. The data section part of your object file is zero bytes long because all its bytes are appended to the text section. (See Sections and Relocation.)

When you specify -R it would be possible to generate shorter address displacements (because we do not have to cross between text and data section). We refrain from doing this simply for compatibility with older versions of as. In future, -R may work this way.

When as is configured for COFF or ELF output, this option is only useful if you use sections named `.text' and `.data'.

-R is not supported for any of the HPPA targets. Using -R generates a warning from as.

2.12 Display Assembly Statistics: --statistics

Use `--statistics' to display two statistics about the resources used by as: the maximum amount of space allocated during the assembly (in bytes), and the total execution time taken for the assembly (in cpu seconds).

2.13 Compatible Output: --traditional-format

For some targets, the output of as is different in some ways from the output of some existing assembler. This switch requests as to use the traditional format instead.

For example, it disables the exception frame optimizations which as normally does by default on gcc output.

2.14 Announce Version: -v

You can find out what version of as is running by including the option `-v' (which you can also spell as `-version') on the command line.

2.15 Control Warnings: -W, --warn, --no-warn, --fatal-warnings

as should never give a warning or error message when assembling compiler output. But programs written by people often cause as to give a warning that a particular assumption was made. All such warnings are directed to the standard error file.

If you use the -W and --no-warn options, no warnings are issued. This only affects the warning messages: it does not change any particular of how as assembles your file. Errors, which stop the assembly, are still reported.

If you use the --fatal-warnings option, as considers files that generate warnings to be in error.

You can switch these options off again by specifying --warn, which causes warnings to be output as usual.

2.16 Generate Object File in Spite of Errors: -Z

After an error message, as normally produces no output. If for some reason you are interested in object file output even after as gives an error message on your program, use the `-Z' option. If there are any errors, as continues anyways, and writes an object file after a final warning message of the form `n errors, m warnings, generating bad object file.'

3 Syntax

This chapter describes the machine-independent syntax allowed in a source file. as syntax is similar to what many other assemblers use; it is inspired by the BSD 4.2 assembler, except that as does not assemble Vax bit-fields.

3.1 Preprocessing

It does not do macro processing, include file handling, or anything else you may get from your C compiler's preprocessor. You can do include file processing with the .include directive (see .include). You can use the gnu C compiler driver to get other “CPP” style preprocessing by giving the input file a `.S' suffix. See Options Controlling the Kind of Output.

Excess whitespace, comments, and character constants cannot be used in the portions of the input text that are not preprocessed.

If the first line of an input file is #NO_APP or if you use the `-f' option, whitespace and comments are not removed from the input file. Within an input file, you can ask for whitespace and comment removal in specific portions of the by putting a line that says #APP before the text that may contain whitespace or comments, and putting a line that says #NO_APP after this text. This feature is mainly intend to support asm statements in compilers whose output is otherwise free of comments and whitespace.

3.2 Whitespace

Whitespace is one or more blanks or tabs, in any order. Whitespace is used to separate symbols, and to make programs neater for people to read. Unless within character constants (see Character Constants), any whitespace means the same as exactly one space.

3.3 Comments

There are two ways of rendering comments to as. In both cases the comment is equivalent to one space.

Anything from `/*' through the next `*/' is a comment. This means you may not nest these comments.

Anything from the line comment character to the next newline is considered a comment and is ignored. The line comment character is `#' for the Altera Nios II family; `;' for the AMD 29K family; `;' on the ARC; `@' on the ARM; `;' for the H8/300 family; `!' for the H8/500 family; `;' for the HPPA; `#' on the i386 and x86-64; `#' on the i960; `;' for the PDP-11; `;' for picoJava; `#' for Motorola PowerPC; `!' for the Renesas / SuperH SH; `!' on the SPARC; `#' on the ip2k; `#' on the m32r; `|' on the 680x0; `#' on the 68HC11 and 68HC12; `;' on the M880x0; `#' on the Vax; `!' for the Z8000; `#' on the V850; `#' for Xtensa systems; see Machine Dependencies.

On some machines there are two different line comment characters. One character only begins a comment if it is the first non-whitespace character on a line, while the other always begins a comment.

The V850 assembler also supports a double dash as starting a comment that extends to the end of the line.

To be compatible with past assemblers, lines that begin with `#' have a special interpretation. Following the `#' should be an absolute expression (see Expressions): the logical line number of the next line. Then a string (see Strings) is allowed: if present it is a new logical file name. The rest of the line, if any, should be whitespace.

If the first non-whitespace characters on the line are not numeric, the line is ignored. (Just like a comment.)

3.4 Symbols

A symbol is one or more characters chosen from the set of all letters (both upper and lower case), digits and the three characters `_.$'. On most machines, you can also use $ in symbol names; exceptions are noted in Machine Dependencies. No symbol may begin with a digit. Case is significant. There is no length limit: all characters are significant. Symbols are delimited by characters not in that set, or by the beginning of a file (since the source program must end with a newline, the end of a file is not a possible symbol delimiter). See Symbols.

3.5 Statements

A statement ends at a newline character (`\n') or line separator character. (The line separator is usually `;', unless this conflicts with the comment character; see Machine Dependencies.) The newline or separator character is considered part of the preceding statement. Newlines and separators within character constants are an exception: they do not end statements.

It is an error to end any statement with end-of-file: the last character of any input file should be a newline.

A statement begins with zero or more labels, optionally followed by a key symbol which determines what kind of statement it is. The key symbol determines the syntax of the rest of the statement. If the symbol begins with a dot `.' then the statement is an assembler directive: typically valid for any computer. If the symbol begins with a letter the statement is an assembly language instruction: it assembles into a machine language instruction. Different versions of as for different computers recognize different instructions. In fact, the same symbol may represent a different instruction in a different computer's assembly language.

A label is a symbol immediately followed by a colon (:). Whitespace before a label or after a colon is permitted, but you may not have whitespace between a label's symbol and its colon. See Labels.

For HPPA targets, labels need not be immediately followed by a colon, but the definition of a label must begin in column zero. This also implies that only one label may be defined on each line.

3.6 Constants

A constant is a number, written so that its value is known by inspection, without knowing any context. Like this:

3.6.1 Character Constants

There are two kinds of character constants. A character stands for one character in one byte and its value may be used in numeric expressions. String constants (properly called string literals) are potentially many bytes and their values may not be used in arithmetic expressions.

3.6.1.1 Strings

A string is written between double-quotes. It may contain double-quotes or null characters. The way to get special characters into a string is to escape these characters: precede them with a backslash `\' character. For example `\\' represents one backslash: the first \ is an escape which tells as to interpret the second character literally as a backslash (which prevents as from recognizing the second \ as an escape character). The complete list of escapes follows.

Which characters are escapable, and what those escapes represent, varies widely among assemblers. The current set is what we think the BSD 4.2 assembler recognizes, and is a subset of what most C compilers recognize. If you are in doubt, do not use an escape sequence.

3.6.1.2 Characters

A single character may be written as a single quote immediately followed by that character. The same escapes apply to characters as to strings. So if you want to write the character backslash, you must write '\\ where the first \ escapes the second \. As you can see, the quote is an acute accent, not a grave accent. A newline immediately following an acute accent is taken as a literal character and does not count as the end of a statement. The value of a character constant in a numeric expression is the machine's byte-wide code for that character. as assumes your character code is ASCII: 'A means 65, 'B means 66, and so on.

3.6.2 Number Constants

as distinguishes three kinds of numbers according to how they are stored in the target machine. Integers are numbers that would fit into an int in the C language. Bignums are integers, but they are stored in more than 32 bits. Flonums are floating point numbers, described below.

3.6.2.1 Integers

A binary integer is `0b' or `0B' followed by zero or more of the binary digits `01'.

An octal integer is `0' followed by zero or more of the octal digits (`01234567').

A decimal integer starts with a non-zero digit followed by zero or more digits (`0123456789').

A hexadecimal integer is `0x' or `0X' followed by one or more hexadecimal digits chosen from `0123456789abcdefABCDEF'.

Integers have the usual values. To denote a negative integer, use the prefix operator `-' discussed under expressions (see Prefix Operators).

3.6.2.2 Bignums

A bignum has the same syntax and semantics as an integer except that the number (or its negative) takes more than 32 bits to represent in binary. The distinction is made because in some places integers are permitted while bignums are not.

3.6.2.3 Flonums

A flonum represents a floating point number. The translation is indirect: a decimal floating point number from the text is converted by as to a generic binary floating point number of more than sufficient precision. This generic floating point number is converted to a particular computer's floating point format (or formats) by a portion of as specialized to that computer.

At least one of the integer part or the fractional part must be present. The floating point number has the usual base-10 value.

as does all processing using integers. Flonums are computed independently of any floating point hardware in the computer running as.

4 Sections and Relocation

4.1 Background

Roughly, a section is a range of addresses, with no gaps; all data “in” those addresses is treated the same for some particular purpose. For example there may be a “read only” section.

The linker ld reads many object files (partial programs) and combines their contents to form a runnable program. When as emits an object file, the partial program is assumed to start at address 0. ld assigns the final addresses for the partial program, so that different partial programs do not overlap. This is actually an oversimplification, but it suffices to explain how as uses sections.

ld moves blocks of bytes of your program to their run-time addresses. These blocks slide to their run-time addresses as rigid units; their length does not change and neither does the order of bytes within them. Such a rigid unit is called a section. Assigning run-time addresses to sections is called relocation. It includes the task of adjusting mentions of object-file addresses so they refer to the proper run-time addresses. For the H8/300 and H8/500, and for the Renesas / SuperH SH, as pads sections if needed to ensure they end on a word (sixteen bit) boundary.

An object file written by as has at least three sections, any of which may be empty. These are named text, data and bss sections.

When it generates COFF or ELF output, as can also generate whatever other named sections you specify using the `.section' directive (see .section). If you do not use any directives that place output in the `.text' or `.data' sections, these sections still exist, but are empty.

When as generates SOM or ELF output for the HPPA, as can also generate whatever other named sections you specify using the `.space' and `.subspace' directives. See HP9000 Series 800 Assembly Language Reference Manual (HP 92432-90001) for details on the `.space' and `.subspace' assembler directives.

Additionally, as uses different names for the standard text, data, and bss sections when generating SOM output. Program text is placed into the ` $CODE$ ' section, data into ` $DATA$ ', and BSS into ` $BSS$ '.

Within the object file, the text section starts at address 0, the data section follows, and the bss section follows the data section.

When generating either SOM or ELF output files on the HPPA, the text section starts at address 0, the data section at address 0x4000000, and the bss section follows the data section.

To let ld know which data changes when the sections are relocated, and how to change that data, as also writes to the object file details of the relocation needed. To perform relocation ld must know, each time an address in the object file is mentioned:

Further, most expressions as computes have this section-relative nature. (For some object formats, such as SOM for the HPPA, some expressions are symbol-relative instead.)

In this manual we use the notation {secname N} to mean “offset N into section secname.”

Apart from text, data and bss sections you need to know about the absolute section. When ld mixes partial programs, addresses in the absolute section remain unchanged. For example, address {absolute 0} is “relocated” to run-time address 0 by ld. Although the linker never arranges two partial programs' data sections with overlapping addresses after linking, by definition their absolute sections must overlap. Address {absolute 239} in one part of a program is always the same address when the program is running as address {absolute 239} in any other part of the program.

The idea of sections is extended to the undefined section. Any address whose section is unknown at assembly time is by definition rendered {undefined U}—where U is filled in later. Since numbers are always defined, the only way to generate an undefined address is to mention an undefined symbol. A reference to a named common block would be such a symbol: its value is unknown at assembly time so it has section undefined.

By analogy the word section is used to describe groups of sections in the linked program. ld puts all partial programs' text sections in contiguous addresses in the linked program. It is customary to refer to the text section of a program, meaning all the addresses of all partial programs' text sections. Likewise for data and bss sections.

Some sections are manipulated by ld; others are invented for use of as and have no meaning except during assembly.

4.2 Linker Sections

An idealized example of three relocatable sections follows. The example uses the traditional section names `.text' and `.data'. Memory addresses are on the horizontal axis.

4.3 Assembler Internal Sections

These sections are meant only for the internal use of as. They have no meaning at run-time. You do not really need to know about these sections for most purposes; but they can be mentioned in as warning messages, so it might be helpful to have an idea of their meanings to as. These sections are used to permit the value of every expression in your assembly language program to be a section-relative address.

4.4 Sub-Sections

Assembled bytes conventionally fall into two sections: text and data. You may have separate groups of data in named sections that you want to end up near to each other in the object file, even though they are not contiguous in the assembler source. as allows you to use subsections for this purpose. Within each section, there can be numbered subsections with values from 0 to 8192. Objects assembled into the same subsection go into the object file together with other objects in the same subsection. For example, a compiler might want to store constants in the text section, but might not want to have them interspersed with the program being assembled. In this case, the compiler could issue a `.text 0' before each section of code being output, and a `.text 1' before each group of constants being output.

Subsections are optional. If you do not use subsections, everything goes in subsection number zero.

Each subsection is zero-padded up to a multiple of four bytes. (Subsections may be padded a different amount on different flavors of as.)

Subsections appear in your object file in numeric order, lowest numbered to highest. (All this to be compatible with other people's assemblers.) The object file contains no representation of subsections; ld and other programs that manipulate object files see no trace of them. They just see all your text subsections as a text section, and all your data subsections as a data section.

To specify which subsection you want subsequent statements assembled into, use a numeric argument to specify it, in a `.text expression' or a `.data expression' statement. When generating COFF or ELF output, you can also use an extra subsection argument with arbitrary named sections: `.section name, expression'. Expression should be an absolute expression. (See Expressions.) If you just say `.text' then `.text 0' is assumed. Likewise `.data' means `.data 0'. Assembly begins in text 0. For instance:

Each section has a location counter incremented by one for every byte assembled into that section. Because subsections are merely a convenience restricted to as there is no concept of a subsection location counter. There is no way to directly manipulate a location counter—but the .align directive changes it, and any label definition captures its current value. The location counter of the section where statements are being assembled is said to be the active location counter.

4.5 bss Section

The bss section is used for local common variable storage. You may allocate address space in the bss section, but you may not dictate data to load into it before your program executes. When your program starts running, all the contents of the bss section are zeroed bytes.

The .comm pseudo-op may be used to declare a common symbol, which is another form of uninitialized symbol; see See .comm.

When assembling for a target which supports multiple sections, such as ELF or COFF, you may switch into the .bss section and define symbols as usual; see .section. You may only assemble zero values into the section. Typically the section will only contain symbol definitions and .skip directives (see .skip).

5 Symbols

Symbols are a central concept: the programmer uses symbols to name things, the linker uses symbols to link, and the debugger uses symbols to debug.

5.1 Labels

A label is written as a symbol immediately followed by a colon `:'. The symbol then represents the current value of the active location counter, and is, for example, a suitable instruction operand. You are warned if you use the same symbol to represent two different locations: the first definition overrides any other definitions.

On the HPPA, the usual form for a label need not be immediately followed by a colon, but instead must start in column zero. Only one label may be defined on a single line. To work around this, the HPPA version of as also provides a special directive .label for defining labels more flexibly.

5.2 Giving Symbols Other Values

A symbol can be given an arbitrary value by writing a symbol, followed by an equals sign `=', followed by an expression (see Expressions). This is equivalent to using the .set directive. See .set.

5.3 Symbol Names

Symbol names begin with a letter or with one of `._'. On most machines, you can also use $ in symbol names; exceptions are noted in Machine Dependencies. That character may be followed by any string of digits, letters, dollar signs (unless otherwise noted in Machine Dependencies), and underscores. For the AMD 29K family, `?' is also allowed in the body of a symbol name, though not at its beginning.

Each symbol has exactly one name. Each name in an assembly language program refers to exactly one symbol. You may use that symbol name any number of times in a program.

Local Symbol Names

Local symbols help compilers and programmers use names temporarily. They create symbols which are guaranteed to be unique over the entire scope of the input source code and which can be referred to by a simple notation. To define a local symbol, write a label of the form `N:' (where N represents any positive integer). To refer to the most recent previous definition of that symbol write `Nb', using the same number as when you defined the label. To refer to the next definition of a local label, write `Nf'— The `b' stands for“backwards” and the `f' stands for “forwards”.

There is no restriction on how you can use these labels, and you can reuse them too. So that it is possible to repeatedly define the same local label (using the same number `N'), although you can only refer to the most recently defined local label of that number (for a backwards reference) or the next definition of a specific local label for a forward reference. It is also worth noting that the first 10 local labels (`0:'...`9:') are implemented in a slightly more efficient manner than the others.

Local symbol names are only a notational device. They are immediately transformed into more conventional symbol names before the assembler uses them. The symbol names stored in the symbol table, appearing in error messages and optionally emitted to the object file. The names are constructed using these parts:

So for example, the first 1: is named L1C-B1, the 44th 3: is named L3C-B44.

Dollar Local Labels

as also supports an even more local form of local labels called dollar labels. These labels go out of scope (ie they become undefined) as soon as a non-local label is defined. Thus they remain valid for only a small region of the input source code. Normal local labels, by contrast, remain in scope for the entire file, or until they are redefined by another occurrence of the same local label.

Dollar labels are defined in exactly the same way as ordinary local labels, except that instead of being terminated by a colon, they are terminated by a dollar sign. eg `55$'.

They can also be distinguished from ordinary local labels by their transformed name which uses ASCII character `\001' (control-A) as the magic character to distinguish them from ordinary labels. Thus the 5th defintion of `6$' is named `L6C-A5'.

5.4 The Special Dot Symbol

The special symbol `.' refers to the current address that as is assembling into. Thus, the expression `melvin: .long .' defines melvin to contain its own address. Assigning a value to . is treated the same as a .org directive. Thus, the expression `.=.+4' is the same as saying `.space 4'.

5.5 Symbol Attributes

Every symbol has, as well as its name, the attributes “Value” and “Type”. Depending on output format, symbols can also have auxiliary attributes.

If you use a symbol without defining it, as assumes zero for all these attributes, and probably won't warn you. This makes the symbol an externally defined symbol, which is generally what you would want.

5.5.1 Value

The value of a symbol is (usually) 32 bits. For a symbol which labels a location in the text, data, bss or absolute sections the value is the number of addresses from the start of that section to the label. Naturally for text, data and bss sections the value of a symbol changes as ld changes section base addresses during linking. Absolute symbols' values do not change during linking: that is why they are called absolute.

The value of an undefined symbol is treated in a special way. If it is 0 then the symbol is not defined in this assembler source file, and ld tries to determine its value from other files linked into the same program. You make this kind of symbol simply by mentioning a symbol name without defining it. A non-zero value represents a .comm common declaration. The value is how much common storage to reserve, in bytes (addresses). The symbol refers to the first address of the allocated storage.

5.5.2 Type

The type attribute of a symbol contains relocation (section) information, any flag settings indicating that a symbol is external, and (optionally), other information for linkers and debuggers. The exact format depends on the object-code output format in use.

5.5.3 Symbol Attributes: a.out

5.5.3.1 Descriptor

This is an arbitrary 16-bit value. You may establish a symbol's descriptor value by using a .desc statement (see .desc). A descriptor value means nothing to as.

5.5.3.2 Other

5.5.4 Symbol Attributes for COFF

The COFF format supports a multitude of auxiliary symbol attributes; like the primary symbol attributes, they are set between .def and .endef directives.

5.5.4.1 Primary Attributes

The symbol name is set with .def; the value and type, respectively, with .val and .type.

5.5.4.2 Auxiliary Attributes

The as directives .dim, .line, .scl, .size, and .tag can generate auxiliary symbol table information for COFF.

5.5.5 Symbol Attributes for SOM

The SOM format for the HPPA supports a multitude of symbol attributes set with the .EXPORT and .IMPORT directives.

The attributes are described in HP9000 Series 800 Assembly Language Reference Manual (HP 92432-90001) under the IMPORT and EXPORT assembler directive documentation.

6 Expressions

An expression specifies an address or numeric value. Whitespace may precede and/or follow an expression.

The result of an expression must be an absolute number, or else an offset into a particular section. If an expression is not absolute, and there is not enough information when as sees the expression to know its section, a second pass over the source program might be necessary to interpret the expression—but the second pass is currently not implemented. as aborts with an error message in this situation.

6.1 Empty Expressions

An empty expression has no value: it is just whitespace or null. Wherever an absolute expression is required, you may omit the expression, and as assumes a value of (absolute) 0. This is compatible with other assemblers.

6.2 Integer Expressions

6.2.1 Arguments

Arguments are symbols, numbers or subexpressions. In other contexts arguments are sometimes called “arithmetic operands”. In this manual, to avoid confusing them with the “instruction operands” of the machine language, we use the term “argument” to refer to parts of expressions only, reserving the word “operand” to refer only to machine instruction operands.

Symbols are evaluated to yield {section NNN} where section is one of text, data, bss, absolute, or undefined. NNN is a signed, 2's complement 32 bit integer.

A number can be a flonum or bignum. In this case, you are warned that only the low order 32 bits are used, and as pretends these 32 bits are an integer. You may write integer-manipulating instructions that act on exotic constants, compatible with other assemblers.

Subexpressions are a left parenthesis `(' followed by an integer expression, followed by a right parenthesis `)'; or a prefix operator followed by an argument.

6.2.2 Operators

Operators are arithmetic functions, like + or %. Prefix operators are followed by an argument. Infix operators appear between their arguments. Operators may be preceded and/or followed by whitespace.

6.2.3 Prefix Operator

as has the following prefix operators. They each take one argument, which must be absolute.

6.2.4 Infix Operators

Infix operators take two arguments, one on either side. Operators have precedence, but operations with equal precedence are performed left to right. Apart from + or -, both arguments must be absolute, and the result is absolute.

In short, it's only meaningful to add or subtract the offsets in an address; you can only have a defined section in one of the two arguments.

7 Assembler Directives

All assembler directives have names that begin with a period (`.'). The rest of the name is letters, usually in lower case.

This chapter discusses directives that are available regardless of the target machine configuration for the gnu assembler. Some machine configurations provide additional directives. See Machine Dependencies.

7.1 .abort

This directive stops the assembly immediately. It is for compatibility with other assemblers. The original idea was that the assembly language source would be piped into the assembler. If the sender of the source quit, it could use this directive tells as to quit also. One day .abort will not be supported.

7.2 .ABORT

When producing COFF output, as accepts this directive as a synonym for `.abort'.

7.3 .align abs-expr, abs-expr, abs-expr

Pad the location counter (in the current subsection) to a particular storage boundary. The first expression (which must be absolute) is the alignment required, as described below.

The second expression (also absolute) gives the fill value to be stored in the padding bytes. It (and the comma) may be omitted. If it is omitted, the padding bytes are normally zero. However, on some systems, if the section is marked as containing code and the fill value is omitted, the space is filled with no-op instructions.

The third expression is also absolute, and is also optional. If it is present, it is the maximum number of bytes that should be skipped by this alignment directive. If doing the alignment would require skipping more bytes than the specified maximum, then the alignment is not done at all. You can omit the fill value (the second argument) entirely by simply using two commas after the required alignment; this can be useful if you want the alignment to be filled with no-op instructions when appropriate.

The way the required alignment is specified varies from system to system. For the a29k, arc, hppa, i386 using ELF, i860, iq2000, m68k, m88k, or32, s390, sparc, tic4x, tic80 and xtensa, the first expression is the alignment request in bytes. For example `.align 8' advances the location counter until it is a multiple of 8. If the location counter is already a multiple of 8, no change is needed. For the tic54x, the first expression is the alignment request in words.

For other systems, including the i386 using a.out format, and the arm and strongarm, and the Altera Nios II, it is the number of low-order zero bits the location counter must have after advancement. For example `.align 3' advances the location counter until it a multiple of 8. If the location counter is already a multiple of 8, no change is needed.

This inconsistency is due to the different behaviors of the various native assemblers for these systems which GAS must emulate. GAS also provides .balign and .p2align directives, described later, which have a consistent behavior across all architectures (but are specific to GAS).

7.4 .ascii "string"...

.ascii expects zero or more string literals (see Strings) separated by commas. It assembles each string (with no automatic trailing zero byte) into consecutive addresses.

7.5 .asciz "string"...

.asciz is just like .ascii, but each string is followed by a zero byte. The “z” in `.asciz' stands for “zero”.

7.6 .balign[wl] abs-expr, abs-expr, abs-expr

Pad the location counter (in the current subsection) to a particular storage boundary. The first expression (which must be absolute) is the alignment request in bytes. For example `.balign 8' advances the location counter until it is a multiple of 8. If the location counter is already a multiple of 8, no change is needed.

The .balignw and .balignl directives are variants of the .balign directive. The .balignw directive treats the fill pattern as a two byte word value. The .balignl directives treats the fill pattern as a four byte longword value. For example,

.balignw
4,0x368d

will align to a multiple of 4. If it skips two bytes, they will be filled in with the value 0x368d (the exact placement of the bytes depends upon the endianness of the processor). If it skips 1 or 3 bytes, the fill value is undefined.

7.7 .byte expressions

.byte expects zero or more expressions, separated by commas. Each expression is assembled into the next byte.

7.8 .comm symbol , length

.comm declares a common symbol named symbol. When linking, a common symbol in one object file may be merged with a defined or common symbol of the same name in another object file. If ld does not see a definition for the symbol–just one or more common symbols–then it will allocate length bytes of uninitialized memory. length must be an absolute expression. If ld sees multiple common symbols with the same name, and they do not all have the same size, it will allocate space using the largest size.

When using ELF, the .comm directive takes an optional third argument. This is the desired alignment of the symbol, specified as a byte boundary (for example, an alignment of 16 means that the least significant 4 bits of the address should be zero). The alignment must be an absolute expression, and it must be a power of two. If ld allocates uninitialized memory for the common symbol, it will use the alignment when placing the symbol. If no alignment is specified, as will set the alignment to the largest power of two less than or equal to the size of the symbol, up to a maximum of 16.

The syntax for .comm differs slightly on the HPPA. The syntax is `symbol .comm, length'; symbol is optional.

7.9 .cfi_startproc

.cfi_startproc is used at the beginning of each function that should have an entry in .eh_frame. It initializes some internal data structures and emits architecture dependent initial CFI instructions. Don't forget to close the function by .cfi_endproc.

7.10 .cfi_endproc

.cfi_endproc is used at the end of a function where it closes its unwind entry previously opened by .cfi_startproc. and emits it to .eh_frame.

7.11 .cfi_def_cfa register, offset

.cfi_def_cfa defines a rule for computing CFA as: take address from register and add offset to it.

7.12 .cfi_def_cfa_register register

.cfi_def_cfa_register modifies a rule for computing CFA. From now on register will be used instead of the old one. Offset remains the same.

7.13 .cfi_def_cfa_offset offset

.cfi_def_cfa_offset modifies a rule for computing CFA. Register remains the same, but offset is new. Note that it is the absolute offset that will be added to a defined register to compute CFA address.

7.14 .cfi_adjust_cfa_offset offset

Same as .cfi_def_cfa_offset but offset is a relative value that is added/substracted from the previous offset.

7.15 .cfi_offset register, offset

7.16 .cfi_rel_offset register, offset

Previous value of register is saved at offset offset from the current CFA register. This is transformed to .cfi_offset using the known displacement of the CFA register from the CFA. This is often easier to use, because the number will match the code it's annotating.

7.17 .cfi_window_save

7.18 .cfi_escape expression[, ...]

Allows the user to add arbitrary bytes to the unwind info. One might use this to add OS-specific CFI opcodes, or generic CFI opcodes that GAS does not yet support.

7.19 .data subsection

.data tells as to assemble the following statements onto the end of the data subsection numbered subsection (which is an absolute expression). If subsection is omitted, it defaults to zero.

7.20 .def name

Begin defining debugging information for a symbol name; the definition extends until the .endef directive is encountered.

This directive is only observed when as is configured for COFF format output; when producing b.out, `.def' is recognized, but ignored.

7.21 .desc symbol, abs-expression

This directive sets the descriptor of the symbol (see Symbol Attributes) to the low 16 bits of an absolute expression.

The `.desc' directive is not available when as is configured for COFF output; it is only for a.out or b.out object format. For the sake of compatibility, as accepts it, but produces no output, when configured for COFF.

7.22 .dim

This directive is generated by compilers to include auxiliary debugging information in the symbol table. It is only permitted inside .def/.endef pairs.

`.dim' is only meaningful when generating COFF format output; when as is generating b.out, it accepts this directive but ignores it.

7.23 .double flonums

.double expects zero or more flonums, separated by commas. It assembles floating point numbers. The exact kind of floating point numbers emitted depends on how as is configured. See Machine Dependencies.

7.24 .eject

7.25 .else

.else is part of the as support for conditional assembly; see .if. It marks the beginning of a section of code to be assembled if the condition for the preceding .if was false.

7.26 .elseif

.elseif is part of the as support for conditional assembly; see .if. It is shorthand for beginning a new .if block that would otherwise fill the entire .else section.

7.27 .end

.end marks the end of the assembly file. as does not process anything in the file past the .end directive.

7.28 .endef

`.endef' is only meaningful when generating COFF format output; if as is configured to generate b.out, it accepts this directive but ignores it.

7.29 .endfunc

7.30 .endif

.endif is part of the as support for conditional assembly; it marks the end of a block of code that is only assembled conditionally. See .if.

7.31 .equ symbol, expression

This directive sets the value of symbol to expression. It is synonymous with `.set'; see .set.

7.32 .equiv symbol, expression

The .equiv directive is like .equ and .set, except that the assembler will signal an error if symbol is already defined. Note a symbol which has been referenced but not actually defined is considered to be undefined.

7.33 .err

If as assembles a .err directive, it will print an error message and, unless the -Z option was used, it will not generate an object file. This can be used to signal error an conditionally compiled code.

7.34 .exitm

7.35 .extern

.extern is accepted in the source program—for compatibility with other assemblers—but it is ignored. as treats all undefined symbols as external.

7.36 .fail expression

Generates an error or a warning. If the value of the expression is 500 or more, as will print a warning message. If the value is less than 500, as will print an error message. The message will include the value of expression. This can occasionally be useful inside complex nested macros or conditional assembly.

7.37 .file string

.file tells as that we are about to start a new logical file. string is the new file name. In general, the filename is recognized whether or not it is surrounded by quotes `"'; but if you wish to specify an empty file name, you must give the quotes–"". This statement may go away in future: it is only recognized to be compatible with old as programs. In some configurations of as, .file has already been removed to avoid conflicts with other assemblers. See Machine Dependencies.

7.38 .fill repeat , size , value

repeat, size and value are absolute expressions. This emits repeat copies of size bytes. Repeat may be zero or more. Size may be zero or more, but if it is more than 8, then it is deemed to have the value 8, compatible with other people's assemblers. The contents of each repeat bytes is taken from an 8-byte number. The highest order 4 bytes are zero. The lowest order 4 bytes are value rendered in the byte-order of an integer on the computer as is assembling for. Each size bytes in a repetition is taken from the lowest order size bytes of this number. Again, this bizarre behavior is compatible with other people's assemblers.

size and value are optional. If the second comma and value are absent, value is assumed zero. If the first comma and following tokens are absent, size is assumed to be 1.

7.39 .float flonums

This directive assembles zero or more flonums, separated by commas. It has the same effect as .single. The exact kind of floating point numbers emitted depends on how as is configured. See Machine Dependencies.

7.40 .func name[,label]

.func emits debugging information to denote function name, and is ignored unless the file is assembled with debugging enabled. Only `--gstabs[+]' is currently supported. label is the entry point of the function and if omitted name prepended with the `leading char' is used. `leading char' is usually _ or nothing, depending on the target. All functions are currently defined to have void return type. The function must be terminated with .endfunc.

7.41 .global symbol, .globl symbol

.global makes the symbol visible to ld. If you define symbol in your partial program, its value is made available to other partial programs that are linked with it. Otherwise, symbol takes its attributes from a symbol of the same name from another file linked into the same program.

Both spellings (`.globl' and `.global') are accepted, for compatibility with other assemblers.

On the HPPA, .global is not always enough to make it accessible to other partial programs. You may need the HPPA-only .EXPORT directive as well. See HPPA Assembler Directives.

7.42 .hidden names

This one of the ELF visibility directives. The other two are .internal (see .internal) and .protected (see .protected).

This directive overrides the named symbols default visibility (which is set by their binding: local, global or weak). The directive sets the visibility to hidden which means that the symbols are not visible to other components. Such symbols are always considered to be protected as well.

7.43 .hword expressions

This directive is a synonym for `.short'; depending on the target architecture, it may also be a synonym for `.word'.

7.44 .ident

This directive is used by some assemblers to place tags in object files. as simply accepts the directive for source-file compatibility with such assemblers, but does not actually emit anything for it.

7.45 .if absolute expression

.if marks the beginning of a section of code which is only considered part of the source program being assembled if the argument (which must be an absolute expression) is non-zero. The end of the conditional section of code must be marked by .endif (see .endif); optionally, you may include code for the alternative condition, flagged by .else (see .else). If you have several conditions to check, .elseif may be used to avoid nesting blocks if/else within each subsequent .else block.

7.46 .incbin "file"[,skip[,count]]

The incbin directive includes file verbatim at the current location. You can control the search paths used with the `-I' command-line option (see Command-Line Options). Quotation marks are required around file.

The skip argument skips a number of bytes from the start of the file. The count argument indicates the maximum number of bytes to read. Note that the data is not aligned in any way, so it is the user's responsibility to make sure that proper alignment is provided both before and after the incbin directive.

7.47 .include "file"

This directive provides a way to include supporting files at specified points in your source program. The code from file is assembled as if it followed the point of the .include; when the end of the included file is reached, assembly of the original file continues. You can control the search paths used with the `-I' command-line option (see Command-Line Options). Quotation marks are required around file.

7.48 .int expressions

Expect zero or more expressions, of any section, separated by commas. For each expression, emit a number that, at run time, is the value of that expression. The byte order and bit size of the number depends on what kind of target the assembly is for.

7.49 .internal names

This one of the ELF visibility directives. The other two are .hidden (see .hidden) and .protected (see .protected).

This directive overrides the named symbols default visibility (which is set by their binding: local, global or weak). The directive sets the visibility to internal which means that the symbols are considered to be hidden (i.e., not visible to other components), and that some extra, processor specific processing must also be performed upon the symbols as well.

7.50 .irp symbol,values...

Evaluate a sequence of statements assigning different values to symbol. The sequence of statements starts at the .irp directive, and is terminated by an .endr directive. For each value, symbol is set to value, and the sequence of statements is assembled. If no value is listed, the sequence of statements is assembled once, with symbol set to the null string. To refer to symbol within the sequence of statements, use \symbol.

7.51 .irpc symbol,values...

Evaluate a sequence of statements assigning different values to symbol. The sequence of statements starts at the .irpc directive, and is terminated by an .endr directive. For each character in value, symbol is set to the character, and the sequence of statements is assembled. If no value is listed, the sequence of statements is assembled once, with symbol set to the null string. To refer to symbol within the sequence of statements, use \symbol.

7.52 .lcomm symbol , length

Reserve length (an absolute expression) bytes for a local common denoted by symbol. The section and value of symbol are those of the new local common. The addresses are allocated in the bss section, so that at run-time the bytes start off zeroed. Symbol is not declared global (see .global), so is normally not visible to ld.

Some targets permit a third argument to be used with .lcomm. This argument specifies the desired alignment of the symbol in the bss section.

The syntax for .lcomm differs slightly on the HPPA. The syntax is `symbol .lcomm, length'; symbol is optional.

7.53 .lflags

as accepts this directive, for compatibility with other assemblers, but ignores it.

7.54 .line line-number

Change the logical line number. line-number must be an absolute expression. The next line has that logical line number. Therefore any other statements on the current line (after a statement separator character) are reported as on logical line number line-number − 1. One day as will no longer support this directive: it is recognized only for compatibility with existing assembler programs.

Warning: In the AMD29K configuration of as, this command is not available; use the synonym .ln in that context.

Even though this is a directive associated with the a.out or b.out object-code formats, as still recognizes it when producing COFF output, and treats `.line' as though it were the COFF `.ln' if it is found outside a .def/.endef pair.

Inside a .def, `.line' is, instead, one of the directives used by compilers to generate auxiliary symbol information for debugging.

7.55 .linkonce [type]

Mark the current section so that the linker only includes a single copy of it. This may be used to include the same section in several different object files, but ensure that the linker will only include it once in the final output file. The .linkonce pseudo-op must be used for each instance of the section. Duplicate sections are detected based on the section name, so it should be unique.

This directive is only supported by a few object file formats; as of this writing, the only object file format which supports it is the Portable Executable format used on Windows NT.

The type argument is optional. If specified, it must be one of the following strings. For example:

7.56 .ln line-number

7.57 .mri val

If val is non-zero, this tells as to enter MRI mode. If val is zero, this tells as to exit MRI mode. This change affects code assembled until the next .mri directive, or until the end of the file. See MRI mode.

7.58 .list

Control (in conjunction with the .nolist directive) whether or not assembly listings are generated. These two directives maintain an internal counter (which is zero initially). .list increments the counter, and .nolist decrements it. Assembly listings are generated whenever the counter is greater than zero.

By default, listings are disabled. When you enable them (with the `-a' command line option; see Command-Line Options), the initial value of the listing counter is one.

7.59 .long expressions

7.60 .macro

The commands .macro and .endm allow you to define macros that generate assembly output. For example, this definition specifies a macro sum that puts a sequence of numbers into memory:

7.61 .nolist

Control (in conjunction with the .list directive) whether or not assembly listings are generated. These two directives maintain an internal counter (which is zero initially). .list increments the counter, and .nolist decrements it. Assembly listings are generated whenever the counter is greater than zero.

7.62 .octa bignums

This directive expects zero or more bignums, separated by commas. For each bignum, it emits a 16-byte integer.

The term “octa” comes from contexts in which a “word” is two bytes; hence octa-word for 16 bytes.

7.63 .org new-lc , fill

Advance the location counter of the current section to new-lc. new-lc is either an absolute expression or an expression with the same section as the current subsection. That is, you can't use .org to cross sections: if new-lc has the wrong section, the .org directive is ignored. To be compatible with former assemblers, if the section of new-lc is absolute, as issues a warning, then pretends the section of new-lc is the same as the current subsection.

.org may only increase the location counter, or leave it unchanged; you cannot use .org to move the location counter backwards.

Because as tries to assemble programs in one pass, new-lc may not be undefined. If you really detest this restriction we eagerly await a chance to share your improved assembler.

Beware that the origin is relative to the start of the section, not to the start of the subsection. This is compatible with other people's assemblers.

When the location counter (of the current subsection) is advanced, the intervening bytes are filled with fill which should be an absolute expression. If the comma and fill are omitted, fill defaults to zero.

7.64 .p2align[wl] abs-expr, abs-expr, abs-expr

Pad the location counter (in the current subsection) to a particular storage boundary. The first expression (which must be absolute) is the number of low-order zero bits the location counter must have after advancement. For example `.p2align 3' advances the location counter until it a multiple of 8. If the location counter is already a multiple of 8, no change is needed.

The .p2alignw and .p2alignl directives are variants of the .p2align directive. The .p2alignw directive treats the fill pattern as a two byte word value. The .p2alignl directives treats the fill pattern as a four byte longword value. For example,

.p2alignw
2,0x368d

7.65 .previous

This is one of the ELF section stack manipulation directives. The others are .section (see Section), .subsection (see SubSection), .pushsection (see PushSection), and .popsection (see PopSection).

This directive swaps the current section (and subsection) with most recently referenced section (and subsection) prior to this one. Multiple .previous directives in a row will flip between two sections (and their subsections).

In terms of the section stack, this directive swaps the current section with the top section on the section stack.

7.66 .popsection

This directive replaces the current section (and subsection) with the top section (and subsection) on the section stack. This section is popped off the stack.

7.67 .print string

as will print string on the standard output during assembly. You must put string in double quotes.

7.68 .protected names

This one of the ELF visibility directives. The other two are .hidden (see Hidden) and .internal (see Internal).

This directive overrides the named symbols default visibility (which is set by their binding: local, global or weak). The directive sets the visibility to protected which means that any references to the symbols from within the components that defines them must be resolved to the definition in that component, even if a definition in another component would normally preempt this.

7.69 .psize lines , columns

Use this directive to declare the number of lines—and, optionally, the number of columns—to use for each page, when generating listings.

If you do not use .psize, listings use a default line-count of 60. You may omit the comma and columns specification; the default width is 200 columns.

as generates formfeeds whenever the specified number of lines is exceeded (or whenever you explicitly request one, using .eject).

If you specify lines as 0, no formfeeds are generated save those explicitly specified with .eject.

7.70 .purgem name

Undefine the macro name, so that later uses of the string will not be expanded. See Macro.

7.71 .pushsection name , subsection

This is one of the ELF section stack manipulation directives. The others are .section (see Section), .subsection (see SubSection), .popsection (see PopSection), and .previous (see Previous).

This directive is a synonym for .section. It pushes the current section (and subsection) onto the top of the section stack, and then replaces the current section and subsection with name and subsection.

7.72 .quad bignums

.quad expects zero or more bignums, separated by commas. For each bignum, it emits an 8-byte integer. If the bignum won't fit in 8 bytes, it prints a warning message; and just takes the lowest order 8 bytes of the bignum. The term “quad” comes from contexts in which a “word” is two bytes; hence quad-word for 8 bytes.

7.73 .rept count

Repeat the sequence of lines between the .rept directive and the next .endr directive count times.

7.74 .sbttl "subheading"

Use subheading as the title (third line, immediately after the title line) when generating assembly listings.

This directive affects subsequent pages, as well as the current page if it appears within ten lines of the top of a page.

7.75 .scl class

Set the storage-class value for a symbol. This directive may only be used inside a .def/.endef pair. Storage class may flag whether a symbol is static or external, or it may record further symbolic debugging information.

The `.scl' directive is primarily associated with COFF output; when configured to generate b.out output format, as accepts this directive but ignores it.

7.76 .section name

Use the .section directive to assemble the following code into a section named name.

This directive is only supported for targets that actually support arbitrarily named sections; on a.out targets, for example, it is not accepted, even with a standard a.out section name.

COFF Version

For COFF targets, the .section directive is used in one of the following ways:

If the optional argument is quoted, it is taken as flags to use for the section. Each flag is a single character. The following flags are recognized:

If no flags are specified, the default flags depend upon the section name. If the section name is not recognized, the default will be for the section to be loaded and writable. Note the n and w flags remove attributes from the section, rather than adding them, so if they are used on their own it will be as if no flags had been specified at all.

If the optional argument to the .section directive is not quoted, it is taken as a subsegment number (see Sub-Sections).

ELF Version

This is one of the ELF section stack manipulation directives. The others are .subsection (see SubSection), .pushsection (see PushSection), .popsection (see PopSection), and .previous (see Previous).

The optional flags argument is a quoted string which may contain any combination of the following characters:

Note on targets where the @ character is the start of a comment (eg ARM) then another character is used instead. For example the ARM port uses the % character.

If flags contains M flag, type argument must be specified as well as entsize argument. Sections with M flag but not S flag must contain fixed size constants, each entsize octets long. Sections with both M and S must contain zero terminated strings where each character is entsize bytes long. The linker may remove duplicates within sections with the same name, same entity size and same flags.

If no flags are specified, the default flags depend upon the section name. If the section name is not recognized, the default will be for the section to have none of the above flags: it will not be allocated in memory, nor writable, nor executable. The section will contain data.

For ELF targets, the assembler supports another type of .section directive for compatibility with the Solaris assembler:

Note that the section name is quoted. There may be a sequence of comma separated flags:

This directive replaces the current section and subsection. The replaced section and subsection are pushed onto the section stack. See the contents of the gas testsuite directory gas/testsuite/gas/elf for some examples of how this directive and the other section stack directives work.

7.77 .set symbol, expression

Set the value of symbol to expression. This changes symbol's value and type to conform to expression. If symbol was flagged as external, it remains flagged (see Symbol Attributes).

If you .set a global symbol, the value stored in the object file is the last value stored into it.

7.78 .short expressions

In some configurations, however, .short and .word generate numbers of different lengths; see Machine Dependencies.

7.79 .single flonums

This directive assembles zero or more flonums, separated by commas. It has the same effect as .float. The exact kind of floating point numbers emitted depends on how as is configured. See Machine Dependencies.

7.80 .size

COFF Version

For COFF targets, the .size directive is only permitted inside .def/.endef pairs. It is used like this:

`.size' is only meaningful when generating COFF format output; when as is generating b.out, it accepts this directive but ignores it.

ELF Version

This directive sets the size associated with a symbol name. The size in bytes is computed from expression which can make use of label arithmetic. This directive is typically used to set the size of function symbols.

7.81 .sleb128 expressions

sleb128 stands for “signed little endian base 128.” This is a compact, variable length representation of numbers used by the DWARF symbolic debugging format. See .uleb128.

7.82 .skip size , fill

This directive emits size bytes, each of value fill. Both size and fill are absolute expressions. If the comma and fill are omitted, fill is assumed to be zero. This is the same as `.space'.

7.83 .space size , fill

On the AMD 29K, this directive is ignored; it is accepted for compatibility with other AMD 29K assemblers.

7.84 .stabd, .stabn, .stabs

There are three directives that begin `.stab'. All emit symbols (see Symbols), for use by symbolic debuggers. The symbols are not entered in the as hash table: they cannot be referenced elsewhere in the source file. Up to five fields are required:

If a warning is detected while reading a .stabd, .stabn, or .stabs statement, the symbol has probably already been created; you get a half-formed symbol in your object file. This is compatible with earlier assemblers!

7.85 .string "str"

Copy the characters in str to the object file. You may specify more than one string to copy, separated by commas. Unless otherwise specified for a particular machine, the assembler marks the end of each string with a 0 byte. You can use any of the escape sequences described in Strings.

7.86 .struct expression

Switch to the absolute section, and set the section offset to expression, which must be an absolute expression. You might use this as follows:

This would define the symbol field1 to have the value 0, the symbol field2 to have the value 4, and the symbol field3 to have the value 8. Assembly would be left in the absolute section, and you would need to use a .section directive of some sort to change to some other section before further assembly.

7.87 .subsection name

This is one of the ELF section stack manipulation directives. The others are .section (see Section), .pushsection (see PushSection), .popsection (see PopSection), and .previous (see Previous).

This directive replaces the current subsection with name. The current section is not changed. The replaced subsection is put onto the section stack in place of the then current top of stack subsection.

7.88 .symver

Use the .symver directive to bind symbols to specific version nodes within a source file. This is only supported on ELF platforms, and is typically used when assembling files to be linked into a shared library. There are cases where it may make sense to use this in objects to be bound into an application itself so as to override a versioned symbol from a shared library.

If the symbol name is defined within the file being assembled, the .symver directive effectively creates a symbol alias with the name name2@nodename, and in fact the main reason that we just don't try and create a regular alias is that the @ character isn't permitted in symbol names. The name2 part of the name is the actual name of the symbol by which it will be externally referenced. The name name itself is merely a name of convenience that is used so that it is possible to have definitions for multiple versions of a function within a single source file, and so that the compiler can unambiguously know which version of a function is being mentioned. The nodename portion of the alias should be the name of a node specified in the version script supplied to the linker when building a shared library. If you are attempting to override a versioned symbol from a shared library, then nodename should correspond to the nodename of the symbol you are trying to override.

If the symbol name is not defined within the file being assembled, all references to name will be changed to name2@nodename. If no reference to name is made, name2@nodename will be removed from the symbol table.

In this case, the symbol name must exist and be defined within the file being assembled. It is similar to name2@nodename. The difference is name2@@nodename will also be used to resolve references to name2 by the linker.

When name is not defined within the file being assembled, it is treated as name2@nodename. When name is defined within the file being assembled, the symbol name, name, will be changed to name2@@nodename.

7.89 .tag structname

This directive is generated by compilers to include auxiliary debugging information in the symbol table. It is only permitted inside .def/.endef pairs. Tags are used to link structure definitions in the symbol table with instances of those structures.

`.tag' is only used when generating COFF format output; when as is generating b.out, it accepts this directive but ignores it.

7.90 .text subsection

Tells as to assemble the following statements onto the end of the text subsection numbered subsection, which is an absolute expression. If subsection is omitted, subsection number zero is used.

7.91 .title "heading"

Use heading as the title (second line, immediately after the source file name and pagenumber) when generating assembly listings.

This directive affects subsequent pages, as well as the current page if it appears within ten lines of the top of a page.

7.92 .type

COFF Version

For COFF targets, this directive is permitted only within .def/.endef pairs. It is used like this:

`.type' is associated only with COFF format output; when as is configured for b.out output, it accepts this directive but ignores it.

ELF Version

This sets the type of symbol name to be either a function symbol or an object symbol. There are five different syntaxes supported for the type description field, in order to provide compatibility with various other assemblers. The syntaxes supported are:

7.93 .uleb128 expressions

uleb128 stands for “unsigned little endian base 128.” This is a compact, variable length representation of numbers used by the DWARF symbolic debugging format. See .sleb128.

7.94 .val addr

This directive, permitted only within .def/.endef pairs, records the address addr as the value attribute of a symbol table entry.

`.val' is used only for COFF output; when as is configured for b.out, it accepts this directive but ignores it.

7.95 .version "string"

This directive creates a .note section and places into it an ELF formatted note of type NT_VERSION. The note's name is set to string.

7.96 .vtable_entry table, offset

This directive finds or creates a symbol table and creates a VTABLE_ENTRY relocation for it with an addend of offset.

7.97 .vtable_inherit child, parent

This directive finds the symbol child and finds or creates the symbol parent and then creates a VTABLE_INHERIT relocation for the parent whose addend is the value of the child symbol. As a special case the parent name of 0 is treated as refering the *ABS* section.

7.98 .weak names

This directive sets the weak attribute on the comma separated list of symbol names. If the symbols do not already exist, they will be created.

7.99 .word expressions

This directive expects zero or more expressions, of any section, separated by commas.

The size of the number emitted, and its byte order, depend on what target computer the assembly is for.

Machines with a 32-bit address space, but that do less than 32-bit addressing, require the following special treatment. If the machine of interest to you does 32-bit addressing (or doesn't require it; see Machine Dependencies), you can ignore this issue.

In order to assemble compiler output into something that works, as occasionally does strange things to `.word' directives. Directives of the form `.word sym1-sym2' are often emitted by compilers as part of jump tables. Therefore, when as assembles a directive of the form `.word sym1-sym2', and the difference between sym1 and sym2 does not fit in 16 bits, as creates a secondary jump table, immediately before the next label. This secondary jump table is preceded by a short-jump to the first byte after the secondary table. This short-jump prevents the flow of control from accidentally falling into the new table. Inside the table is a long-jump to sym2. The original `.word' contains sym1 minus the address of the long-jump to sym2.

If there were several occurrences of `.word sym1-sym2' before the secondary jump table, all of them are adjusted. If there was a `.word sym3-sym4', that also did not fit in sixteen bits, a long-jump to sym4 is included in the secondary jump table, and the .word directives are adjusted to contain sym3 minus the address of the long-jump to sym4; and so on, for as many entries in the original jump table as necessary.

7.100 Deprecated Directives

One day these directives won't work. They are included for compatibility with older assemblers.

8 Machine Dependent Features

The machine instruction sets are (almost by definition) different on each machine where as runs. Floating point representations vary as well, and as often supports a few additional directives or command-line options for compatibility with other assemblers on a particular platform. Finally, some versions of as support special pseudo-instructions for branch optimization.

This chapter discusses most of these differences, though it does not include details on any machine's instruction set. For details on that subject, see the hardware manufacturer's manual.

8.1 Altera Nios II Dependent Features

8.1.1 Options

8.1.2 Syntax

8.1.2.1 Special Characters

8.1.3 Nios II Machine Relocations

8.1.4 Nios II Machine Directives

8.1.5 Opcodes

as implements all the standard Nios II opcodes. No additional pseudo-instructions are needed on this family. For information on the Nios II machine instruction set, see the Nios II User's Manual

8.2 AMD 29K Dependent Features

8.2.1 Options

8.2.2 Syntax

8.2.2.1 Macros

The macro syntax used on the AMD 29K is like that described in the AMD 29K Family Macro Assembler Specification. Normal as macros should still work.

8.2.2.2 Special Characters

The character `?' is permitted in identifiers (but may not begin an identifier).

8.2.2.3 Register Names

General-purpose registers are represented by predefined symbols of the form `GRnnn' (for global registers) or `LRnnn' (for local registers), where nnn represents a number between 0 and 127, written with no leading zeros. The leading letters may be in either upper or lower case; for example, `gr13' and `LR7' are both valid register names.

You may also refer to general-purpose registers by specifying the register number as the result of an expression (prefixed with `%%' to flag the expression as a register number):

—where expression must be an absolute expression evaluating to a number between 0 and 255. The range [0, 127] refers to global registers, and the range [128, 255] to local registers.

In addition, as understands the following protected special-purpose register names for the AMD 29K family:

8.2.3 Floating Point

8.2.4 AMD 29K Machine Directives

8.2.5 Opcodes

as implements all the standard AMD 29K opcodes. No additional pseudo-instructions are needed on this family.

For information on the 29K machine instruction set, see Am29000 User's Manual, Advanced Micro Devices, Inc.

8.3 Alpha Dependent Features

8.3.1 Notes

The documentation here is primarily for the ELF object format. as also supports the ECOFF and EVAX formats, but features specific to these formats are not yet documented.

8.3.2 Options

8.3.3 Syntax

The assembler syntax closely follow the Alpha Reference Manual; assembler directives and general syntax closely follow the OSF/1 and OpenVMS syntax, with a few differences for ELF.

8.3.3.1 Special Characters

8.3.3.2 Register Names

The 32 integer registers are referred to as `$n' or `$rn'. In addition, registers 15, 28, 29, and 30 may be referred to by the symbols `$fp', `$at', `$gp', and `$sp' respectively.

8.3.3.3 Relocations

Some of these relocations are available for ECOFF, but mostly only for ELF. They are modeled after the relocation format introduced in Digital Unix 4.0, but there are additions.

The format is `!tag' or `!tag!number' where tag is the name of the relocation. In some cases number is used to relate specific instructions.

8.3.4 Floating Point

8.3.5 Alpha Assembler Directives

as for the Alpha supports many additional directives for compatibility with the native assembler. This section describes them only briefly.

The following directives are recognized for compatibility with the OSF/1 assembler but are ignored.

8.3.6 Opcodes

8.4 ARC Dependent Features

8.4.1 Options

8.4.2 Syntax

8.4.2.1 Special Characters

8.4.2.2 Register Names

8.4.3 Floating Point

The ARC core does not currently have hardware floating point support. Software floating point support is provided by GCC and uses ieee floating-point numbers.

8.4.4 ARC Machine Directives

8.4.5 Opcodes

For information on the ARC instruction set, see ARC Programmers Reference Manual, ARC Cores Ltd.

8.5 ARM Dependent Features

8.5.1 Options

8.5.2 Syntax

8.5.2.1 Special Characters

The presence of a `@' on a line indicates the start of a comment that extends to the end of the current line. If a `#' appears as the first character of a line, the whole line is treated as a comment.

8.5.2.2 Register Names

8.5.3 Floating Point

8.5.4 ARM Machine Directives

8.5.5 Opcodes

as implements all the standard ARM opcodes. It also implements several pseudo opcodes, including several synthetic load instructions.

For information on the ARM or Thumb instruction sets, see ARM Software Development Toolkit Reference Manual, Advanced RISC Machines Ltd.

8.5.6 Mapping Symbols

The ARM ELF specification requires that special symbols be inserted into object files to mark certain features:

The assembler will automatically insert these symbols for you - there is no need to code them yourself. Support for tagging symbols ($b, $f, $p and $m) which is also mentioned in the current ARM ELF specification is not implemented. This is because they have been dropped from the new EABI and so tools cannot rely upon their presence.

8.6 CRIS Dependent Features

8.6.1 Command-line Options

The format of the generated object files can be either ELF or a.out, specified by the command-line options --emulation=crisaout and --emulation=criself. The default is ELF (criself), unless as has been configured specifically for a.out by using the configuration name cris-axis-aout.

There are two different link-incompatible ELF object file variants for CRIS, for use in environments where symbols are expected to be prefixed by a leading `_' character and for environments without such a symbol prefix. The variant used for GNU/Linux port has no symbol prefix. Which variant to produce is specified by either of the options --underscore and --no-underscore. The default is --underscore. Since symbols in CRIS a.out objects are expected to have a `_' prefix, specifying --no-underscore when generating a.out objects is an error. Besides the object format difference, the effect of this option is to parse register names differently (see crisnous). The --no-underscore option makes a `$' register prefix mandatory.

The option --pic must be passed to as in order to recognize the symbol syntax used for ELF (SVR4 PIC) position-independent-code (see crispic). This will also affect expansion of instructions. The expansion with --pic will use PC-relative rather than (slightly faster) absolute addresses in those expansions.

When -N is specified, as will emit a warning when a 16-bit branch instruction is expanded into a 32-bit multiple-instruction construct (see CRIS-Expand).

Some versions of the CRIS v10, for example in the Etrax 100 LX, contain a bug that causes destabilizing memory accesses when a multiply instruction is executed with certain values in the first operand just before a cache-miss. When the --mul-bug-abort command line option is active (the default value), as will refuse to assemble a file containing a multiply instruction at a dangerous offset, one that could be the last on a cache-line, or is in a section with insufficient alignment. This placement checking does not catch any case where the multiply instruction is dangerously placed because it is located in a delay-slot. The --mul-bug-abort command line option turns off the checking.

8.6.2 Instruction expansion

as will silently choose an instruction that fits the operand size for `[register+constant]' operands. For example, the offset 127 in move.d [r3+127],r4 fits in an instruction using a signed-byte offset. Similarly, move.d [r2+32767],r1 will generate an instruction using a 16-bit offset. For symbolic expressions and constants that do not fit in 16 bits including the sign bit, a 32-bit offset is generated.

For branches, as will expand from a 16-bit branch instruction into a sequence of instructions that can reach a full 32-bit address. Since this does not correspond to a single instruction, such expansions can optionally be warned about. See CRIS-Opts.

8.6.3 Syntax

8.6.3.1 Special Characters

The character `#' is a line comment character. It starts a comment if and only if it is placed at the beginning of a line.

A `;' character starts a comment anywhere on the line, causing all characters up to the end of the line to be ignored.

A `@' character is handled as a line separator equivalent to a logical new-line character (except in a comment), so separate instructions can be specified on a single line.

8.6.3.2 Symbols in position-independent code

When generating position-independent code (SVR4 PIC) for use in cris-axis-linux-gnu shared libraries, symbol suffixes are used to specify what kind of run-time symbol lookup will be used, expressed in the object as different relocation types. Usually, all absolute symbol values must be located in a table, the global offset table, leaving the code position-independent; independent of values of global symbols and independent of the address of the code. The suffix modifies the value of the symbol, into for example an index into the global offset table where the real symbol value is entered, or a PC-relative value, or a value relative to the start of the global offset table. All symbol suffixes start with the character `:' (omitted in the list below). Every symbol use in code or a read-only section must therefore have a PIC suffix to enable a useful shared library to be created. Usually, these constructs must not be used with an additive constant offset as is usually allowed, i.e. no 4 as in symbol + 4 is allowed. This restriction is checked at link-time, not at assembly-time.

8.6.3.3 Register names

A `$' character may always prefix a general or special register name in an instruction operand but is mandatory when the option --no-underscore is specified or when the .syntax register_prefix directive is in effect (see crisnous). Register names are case-insensitive.

8.6.3.4 Assembler Directives

There are a few CRIS-specific pseudo-directives in addition to the generic ones. See Pseudo Ops. Constants emitted by pseudo-directives are in little-endian order for CRIS. There is no support for floating-point-specific directives for CRIS.

8.7 D10V Dependent Features

8.7.1 D10V Options

8.7.2 Syntax

The D10V syntax is based on the syntax in Mitsubishi's D10V architecture manual. The differences are detailed below.

8.7.2.1 Size Modifiers

The D10V version of as uses the instruction names in the D10V Architecture Manual. However, the names in the manual are sometimes ambiguous. There are instruction names that can assemble to a short or long form opcode. How does the assembler pick the correct form? as will always pick the smallest form if it can. When dealing with a symbol that is not defined yet when a line is being assembled, it will always use the long form. If you need to force the assembler to use either the short or long form of the instruction, you can append either `.s' (short) or `.l' (long) to it. For example, if you are writing an assembly program and you want to do a branch to a symbol that is defined later in your program, you can write `bra.s foo'. Objdump and GDB will always append `.s' or `.l' to instructions which have both short and long forms.

8.7.2.2 Sub-Instructions

The D10V assembler takes as input a series of instructions, either one-per-line, or in the special two-per-line format described in the next section. Some of these instructions will be short-form or sub-instructions. These sub-instructions can be packed into a single instruction. The assembler will do this automatically. It will also detect when it should not pack instructions. For example, when a label is defined, the next instruction will never be packaged with the previous one. Whenever a branch and link instruction is called, it will not be packaged with the next instruction so the return address will be valid. Nops are automatically inserted when necessary.

If you do not want the assembler automatically making these decisions, you can control the packaging and execution type (parallel or sequential) with the special execution symbols described in the next section.

8.7.2.3 Special Characters

`;' and `#' are the line comment characters. Sub-instructions may be executed in order, in reverse-order, or in parallel. Instructions listed in the standard one-per-line format will be executed sequentially. To specify the executing order, use the following symbols:

8.7.2.4 Register Names

You can use the predefined symbols `r0' through `r15' to refer to the D10V registers. You can also use `sp' as an alias for `r15'. The accumulators are `a0' and `a1'. There are special register-pair names that may optionally be used in opcodes that require even-numbered registers. Register names are not case sensitive.

The D10V also has predefined symbols for these control registers and status bits:

8.7.2.5 Addressing Modes

as understands the following addressing modes for the D10V. Rn in the following refers to any of the numbered registers, but not the control registers.

8.7.2.6 @WORD Modifier

Any symbol followed by @word will be replaced by the symbol's value shifted right by 2. This is used in situations such as loading a register with the address of a function (or any other code fragment). For example, if you want to load a register with the location of the function main then jump to that function, you could do it as follows:

8.7.3 Floating Point

The D10V has no hardware floating point, but the .float and .double directives generates ieee floating-point numbers for compatibility with other development tools.

8.7.4 Opcodes

For detailed information on the D10V machine instruction set, see D10V Architecture: A VLIW Microprocessor for Multimedia Applications (Mitsubishi Electric Corp.). as implements all the standard D10V opcodes. The only changes are those described in the section on size modifiers

8.8 D30V Dependent Features

8.8.1 D30V Options

8.8.2 Syntax

The D30V syntax is based on the syntax in Mitsubishi's D30V architecture manual. The differences are detailed below.

8.8.2.1 Size Modifiers

The D30V version of as uses the instruction names in the D30V Architecture Manual. However, the names in the manual are sometimes ambiguous. There are instruction names that can assemble to a short or long form opcode. How does the assembler pick the correct form? as will always pick the smallest form if it can. When dealing with a symbol that is not defined yet when a line is being assembled, it will always use the long form. If you need to force the assembler to use either the short or long form of the instruction, you can append either `.s' (short) or `.l' (long) to it. For example, if you are writing an assembly program and you want to do a branch to a symbol that is defined later in your program, you can write `bra.s foo'. Objdump and GDB will always append `.s' or `.l' to instructions which have both short and long forms.

8.8.2.2 Sub-Instructions

The D30V assembler takes as input a series of instructions, either one-per-line, or in the special two-per-line format described in the next section. Some of these instructions will be short-form or sub-instructions. These sub-instructions can be packed into a single instruction. The assembler will do this automatically. It will also detect when it should not pack instructions. For example, when a label is defined, the next instruction will never be packaged with the previous one. Whenever a branch and link instruction is called, it will not be packaged with the next instruction so the return address will be valid. Nops are automatically inserted when necessary.

8.8.2.3 Special Characters

The D30V syntax allows either one instruction per line, one instruction per line with the execution symbol, or two instructions per line. For example

8.8.2.4 Guarded Execution

as supports the full range of guarded execution directives for each instruction. Just append the directive after the instruction proper. The directives are:

8.8.2.5 Register Names

You can use the predefined symbols `r0' through `r63' to refer to the D30V registers. You can also use `sp' as an alias for `r63' and `link' as an alias for `r62'. The accumulators are `a0' and `a1'.

The D30V also has predefined symbols for these control registers and status bits:

8.8.2.6 Addressing Modes

as understands the following addressing modes for the D30V. Rn in the following refers to any of the numbered registers, but not the control registers.

8.8.3 Floating Point

The D30V has no hardware floating point, but the .float and .double directives generates ieee floating-point numbers for compatibility with other development tools.

8.8.4 Opcodes

For detailed information on the D30V machine instruction set, see D30V Architecture: A VLIW Microprocessor for Multimedia Applications (Mitsubishi Electric Corp.). as implements all the standard D30V opcodes. The only changes are those described in the section on size modifiers

8.9 H8/300 Dependent Features

8.9.1 Options

as has no additional command-line options for the Renesas (formerly Hitachi) H8/300 family.

8.9.2 Syntax

8.9.2.1 Special Characters

`$' can be used instead of a newline to separate statements. Therefore you may not use `$' in symbol names on the H8/300.

8.9.2.2 Register Names

You can use predefined symbols of the form `rnh' and `rnl' to refer to the H8/300 registers as sixteen 8-bit general-purpose registers. n is a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid register names.

You can also use the eight predefined symbols `rn' to refer to the H8/300 registers as 16-bit registers (you must use this form for addressing).

On the H8/300H, you can also use the eight predefined symbols `ern' (`er0' ... `er7') to refer to the 32-bit general purpose registers.

The two control registers are called pc (program counter; a 16-bit register, except on the H8/300H where it is 24 bits) and ccr (condition code register; an 8-bit register). r7 is used as the stack pointer, and can also be called sp.

8.9.2.3 Addressing Modes

8.9.3 Floating Point

The H8/300 family has no hardware floating point, but the .float directive generates ieee floating-point numbers for compatibility with other development tools.

8.9.4 H8/300 Machine Directives

On the H8/300 family (including the H8/300H) `.word' directives generate 16-bit numbers.

8.9.5 Opcodes

For detailed information on the H8/300 machine instruction set, see H8/300 Series Programming Manual. For information specific to the H8/300H, see H8/300H Series Programming Manual (Renesas).

as implements all the standard H8/300 opcodes. No additional pseudo-instructions are needed on this family.

Four H8/300 instructions (add, cmp, mov, sub) are defined with variants using the suffixes `.b', `.w', and `.l' to specify the size of a memory operand. as supports these suffixes, but does not require them; since one of the operands is always a register, as can deduce the correct size.

If you use the size suffixes, as issues a warning when the suffix and the register size do not match.

8.10 H8/500 Dependent Features

8.10.1 Options

as has no additional command-line options for the Renesas (formerly Hitachi) H8/500 family.

8.10.2 Syntax

8.10.2.1 Special Characters

8.10.2.2 Register Names

You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5', `r6', and `r7' to refer to the H8/500 registers.

All registers are 16 bits long. To represent 32 bit numbers, use two adjacent registers; for distant memory addresses, use one of the segment pointers (cp for the program counter; dp for r0–r3; ep for r4 and r5; and tp for r6 and r7.

8.10.2.3 Addressing Modes

8.10.3 Floating Point

The H8/500 family has no hardware floating point, but the .float directive generates ieee floating-point numbers for compatibility with other development tools.

8.10.4 H8/500 Machine Directives

as has no machine-dependent directives for the H8/500. However, on this platform the `.int' and `.word' directives generate 16-bit numbers.

8.10.5 Opcodes

For detailed information on the H8/500 machine instruction set, see H8/500 Series Programming Manual (Renesas M21T001).

as implements all the standard H8/500 opcodes. No additional pseudo-instructions are needed on this family.

8.11 HPPA Dependent Features

8.11.1 Notes

As a back end for gnu cc as has been throughly tested and should work extremely well. We have tested it only minimally on hand written assembly code and no one has tested it much on the assembly output from the HP compilers.

The format of the debugging sections has changed since the original as port (version 1.3X) was released; therefore, you must rebuild all HPPA objects and libraries with the new assembler so that you can debug the final executable.

The HPPA as port generates a small subset of the relocations available in the SOM and ELF object file formats. Additional relocation support will be added as it becomes necessary.

8.11.2 Options

8.11.3 Syntax

The assembler syntax closely follows the HPPA instruction set reference manual; assembler directives and general syntax closely follow the HPPA assembly language reference manual, with a few noteworthy differences.

First, a colon may immediately follow a label definition. This is simply for compatibility with how most assembly language programmers write code.

Some obscure expression parsing problems may affect hand written code which uses the spop instructions, or code which makes significant use of the ! line separator.

as is much less forgiving about missing arguments and other similar oversights than the HP assembler. as notifies you of missing arguments as syntax errors; this is regarded as a feature, not a bug.

Finally, as allows you to use an external symbol without explicitly importing the symbol. Warning: in the future this will be an error for HPPA targets.

8.11.4 Floating Point

8.11.5 HPPA Assembler Directives

as for the HPPA supports many additional directives for compatibility with the native assembler. This section describes them only briefly. For detailed information on HPPA-specific assembler directives, see HP9000 Series 800 Assembly Language Reference Manual (HP 92432-90001).

as does not support the following assembler directives described in the HP manual:

Beyond those implemented for compatibility, as supports one additional assembler directive for the HPPA: .param. It conveys register argument locations for static functions. Its syntax closely follows the .export directive.

8.11.6 Opcodes

For detailed information on the HPPA machine instruction set, see PA-RISC Architecture and Instruction Set Reference Manual (HP 09740-90039).

8.12 ESA/390 Dependent Features

8.12.1 Notes

The ESA/390 as port is currently intended to be a back-end for the gnu cc compiler. It is not HLASM compatible, although it does support a subset of some of the HLASM directives. The only supported binary file format is ELF; none of the usual MVS/VM/OE/USS object file formats, such as ESD or XSD, are supported.

When used with the gnu cc compiler, the ESA/390 as will produce correct, fully relocated, functional binaries, and has been used to compile and execute large projects. However, many aspects should still be considered experimental; these include shared library support, dynamically loadable objects, and any relocation other than the 31-bit relocation.

8.12.2 Options

8.12.3 Syntax

The opcode/operand syntax follows the ESA/390 Principles of Operation manual; assembler directives and general syntax are loosely based on the prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives are not supported for the most part, with the exception of those described herein.

A leading dot in front of directives is optional, and the case of directives is ignored; thus for example, .using and USING have the same effect.

A colon may immediately follow a label definition. This is simply for compatibility with how most assembly language programmers write code.

Registers can be given the symbolic names r0..r15, fp0, fp2, fp4, fp6. By using thesse symbolic names, as can detect simple syntax errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base for r3 and rpgt or r.pgt for r4.

`*' is the current location counter. Unlike `.' it is always relative to the last USING directive. Note that this means that expressions cannot use multiplication, as any occurrence of `*' will be interpreted as a location counter.

All labels are relative to the last USING. Thus, branches to a label always imply the use of base+displacement.

Many of the usual forms of address constants / address literals are supported. Thus,

should all behave as expected: that is, an entry in the literal pool will be created (or reused if it already exists), and the instruction operands will be the displacement into the literal pool using the current base register (as last declared with the .using directive).

8.12.4 Floating Point

The assembler generates only ieee floating-point numbers. The older floating point formats are not supported.

8.12.5 ESA/390 Assembler Directives

as for the ESA/390 supports all of the standard ELF/SVR4 assembler directives that are documented in the main part of this documentation. Several additional directives are supported in order to implement the ESA/390 addressing model. The most important of these are .using and .ltorg

8.12.6 Opcodes

For detailed information on the ESA/390 machine instruction set, see ESA/390 Principles of Operation (IBM Publication Number DZ9AR004).

8.13 80386 Dependent Features

The i386 version as supports both the original Intel 386 architecture in both 16 and 32-bit mode as well as AMD x86-64 architecture extending the Intel architecture to 64-bits.

8.13.1 Options

8.13.2 AT&T Syntax versus Intel Syntax

as now supports assembly using Intel assembler syntax. .intel_syntax selects Intel mode, and .att_syntax switches back to the usual AT&T mode for compatibility with the output of gcc. Either of these directives may have an optional argument, prefix, or noprefix specifying whether registers require a `%' prefix. AT&T System V/386 assembler syntax is quite different from Intel syntax. We mention these differences because almost all 80386 documents use Intel syntax. Notable differences between the two syntaxes are:

8.13.3 Instruction Naming

Instruction mnemonics are suffixed with one character modifiers which specify the size of operands. The letters `b', `w', `l' and `q' specify byte, word, long and quadruple word operands. If no suffix is specified by an instruction then as tries to fill in the missing suffix based on the destination register operand (the last one by convention). Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx'; also, `mov $1, %bx' is equivalent to `movw $1, bx'. Note that this is incompatible with the AT&T Unix assembler which assumes that a missing mnemonic suffix implies long operand size. (This incompatibility does not affect compiler output since compilers always explicitly specify the mnemonic suffix.)

Almost all instructions have the same names in AT&T and Intel format. There are a few exceptions. The sign extend and zero extend instructions need two sizes to specify them. They need a size to sign/zero extend from and a size to zero extend to. This is accomplished by using two instruction mnemonic suffixes in AT&T syntax. Base names for sign extend and zero extend are `movs...' and `movz...' in AT&T syntax (`movsx' and `movzx' in Intel syntax). The instruction mnemonic suffixes are tacked on to this base name, the from suffix before the to suffix. Thus, `movsbl %al, %edx' is AT&T syntax for “move sign extend from %al to %edx.” Possible suffixes, thus, are `bl' (from byte to long), `bw' (from byte to word), `wl' (from word to long), `bq' (from byte to quadruple word), `wq' (from word to quadruple word), and `lq' (from long to quadruple word).

are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and `cqto' in AT&T naming. as accepts either naming for these instructions.

Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax, but are `call far' and `jump far' in Intel convention.

8.13.4 Register Naming

8.13.5 Instruction Prefixes

Instruction prefixes are used to modify the following instruction. They are used to repeat string instructions, to provide section overrides, to perform bus lock operations, and to change operand and address sizes. (Most instructions that normally operate on 32-bit operands will use 16-bit operands if the instruction has an “operand size” prefix.) Instruction prefixes are best written on the same line as the instruction they act upon. For example, the `scas' (scan string) instruction is repeated with:

You may also place prefixes on the lines immediately preceding the instruction, but this circumvents checks that as does with prefixes, and will not work with all prefixes.

8.13.6 Memory References

where base and index are the optional 32-bit base and index registers, disp is the optional displacement, and scale, taking the values 1, 2, 4, and 8, multiplies index to calculate the address of the operand. If no scale is specified, scale is taken to be 1. section specifies the optional section register for the memory operand, and may override the default section register (see a 80386 manual for section register defaults). Note that section overrides in AT&T syntax must be preceded by a `%'. If you specify a section override which coincides with the default section register, as does not output any section register override prefixes to assemble the given instruction. Thus, section overrides can be specified to emphasize which section register is used for a given memory operand.

Absolute (as opposed to PC relative) call and jump operands must be prefixed with `*'. If no `*' is specified, as always chooses PC relative addressing for jump/call labels.

Any instruction that has a memory operand, but no register operand, must specify its size (byte, word, long, or quadruple) with an instruction mnemonic suffix (`b', `w', `l' or `q', respectively).

The x86-64 architecture adds an RIP (instruction pointer relative) addressing. This addressing mode is specified by using `rip' as a base register. Only constant offsets are valid. For example:

Other addressing modes remain unchanged in x86-64 architecture, except registers used are 64-bit instead of 32-bit.

8.13.7 Handling of Jump Instructions

Jump instructions are always optimized to use the smallest possible displacements. This is accomplished by using byte (8-bit) displacement jumps whenever the target is sufficiently close. If a byte displacement is insufficient a long displacement is used. We do not support word (16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump instruction with the `data16' instruction prefix), since the 80386 insists upon masking `%eip' to 16 bits after the word displacement is added. (See also see i386-Arch)

Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz' and `loopne' instructions only come in byte displacements, so that if you use these instructions (gcc does not use them) you may get an error message (and incorrect code). The AT&T 80386 assembler tries to get around this problem by expanding `jcxz foo' to

8.13.8 Floating Point

All 80387 floating point types except packed BCD are supported. (BCD support may be added without much difficulty). These data types are 16-, 32-, and 64- bit integers, and single (32-bit), double (64-bit), and extended (80-bit) precision floating point. Each supported type has an instruction mnemonic suffix and a constructor associated with it. Instruction mnemonic suffixes specify the operand's data type. Constructors build these data types into memory.

Register to register operations should not use instruction mnemonic suffixes. `fstl %st, %st(1)' will give a warning, and be assembled as if you wrote `fst %st, %st(1)', since all register to register operations use 80-bit floating point operands. (Contrast this with `fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating point format, then stores the result in the 4 byte location `mem')

8.13.9 Intel's MMX and AMD's 3DNow! SIMD Operations

as supports Intel's MMX instruction set (SIMD instructions for integer data), available on Intel's Pentium MMX processors and Pentium II processors, AMD's K6 and K6-2 processors, Cyrix' M2 processor, and probably others. It also supports AMD's 3DNow! instruction set (SIMD instructions for 32-bit floating point data) available on AMD's K6-2 processor and possibly others in the future.

The eight 64-bit MMX operands, also used by 3DNow!, are called `%mm0', `%mm1', ... `%mm7'. They contain eight 8-bit integers, four 16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit floating point values. The MMX registers cannot be used at the same time as the floating point stack.

See Intel and AMD documentation, keeping in mind that the operand order in instructions is reversed from the Intel syntax.

8.13.10 Writing 16-bit Code

While as normally writes only “pure” 32-bit i386 code or 64-bit x86-64 code depending on the default configuration, it also supports writing code to run in real mode or in 16-bit protected mode code segments. To do this, put a `.code16' or `.code16gcc' directive before the assembly language instructions to be run in 16-bit mode. You can switch as back to writing normal 32-bit code with the `.code32' directive.

`.code16gcc' provides experimental support for generating 16-bit code from gcc, and differs from `.code16' in that `call', `ret', `enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf' instructions default to 32-bit size. This is so that the stack pointer is manipulated in the same way over function calls, allowing access to function parameters at the same stack offsets as in 32-bit mode. `.code16gcc' also automatically adds address size prefixes where necessary to use the 32-bit addressing modes that gcc generates.

The code which as generates in 16-bit mode will not necessarily run on a 16-bit pre-80386 processor. To write code that runs on such a processor, you must refrain from using any 32-bit constructs which require as to output address or operand size prefixes.

Note that writing 16-bit code instructions by explicitly specifying a prefix or an instruction mnemonic suffix within a 32-bit code section generates different machine instructions than those generated for a 16-bit code segment. In a 32-bit code section, the following code generates the machine opcode bytes `66 6a 04', which pushes the value `4' onto the stack, decrementing `%esp' by 2.

The same code in a 16-bit code section would generate the machine opcode bytes `6a 04' (ie. without the operand size prefix), which is correct since the processor default operand size is assumed to be 16 bits in a 16-bit code section.

8.13.11 AT&T Syntax bugs

The UnixWare assembler, and probably other AT&T derived ix86 Unix assemblers, generate floating point instructions with reversed source and destination registers in certain cases. Unfortunately, gcc and possibly many other programs use this reversed syntax, so we're stuck with it.

results in `%st(3)' being updated to `%st - %st(3)' rather than the expected `%st(3) - %st'. This happens with all the non-commutative arithmetic floating point operations with two register operands where the source register is `%st' and the destination register is `%st(i)'.

8.13.12 Specifying CPU Architecture

as may be told to assemble for a particular CPU architecture with the .arch cpu_type directive. This directive enables a warning when gas detects an instruction that is not supported on the CPU specified. The choices for cpu_type are:

``i8086`'	``i186`'	``i286`'	``i386`'
``i486`'	``i586`'	``i686`'	``pentium`'
``pentiumpro`'	``pentium4`'	``k6`'	``athlon`'
``sledgehammer`'

Apart from the warning, there are only two other effects on as operation; Firstly, if you specify a CPU other than `i486', then shift by one instructions such as `sarl $1, %eax' will automatically use a two byte opcode sequence. The larger three byte opcode sequence is used on the 486 (and when no architecture is specified) because it executes faster on the 486. Note that you can explicitly request the two byte opcode by writing `sarl %eax'. Secondly, if you specify `i8086', `i186', or `i286', and `.code16' or `.code16gcc' then byte offset conditional jumps will be promoted when necessary to a two instruction sequence consisting of a conditional jump of the opposite sense around an unconditional jump to the target.

Following the CPU architecture, you may specify `jumps' or `nojumps' to control automatic promotion of conditional jumps. `jumps' is the default, and enables jump promotion; All external jumps will be of the long variety, and file-local jumps will be promoted as necessary. (see i386-Jumps) `nojumps' leaves external conditional jumps as byte offset jumps, and warns about file-local conditional jumps that as promotes. Unconditional jumps are treated as for `jumps'.

8.13.13 Notes

There is some trickery concerning the `mul' and `imul' instructions that deserves mention. The 16-, 32-, 64- and 128-bit expanding multiplies (base opcode `0xf6'; extension 4 for `mul' and 5 for `imul') can be output only in the one operand form. Thus, `imul %ebx, %eax' does not select the expanding multiply; the expanding multiply would clobber the `%edx' register, and this would confuse gcc output. Use `imul %ebx' to get the 64-bit product in `%edx:%eax'.

We have added a two operand form of `imul' when the first operand is an immediate mode expression and the second operand is a register. This is just a shorthand, so that, multiplying `%eax' by 69, for example, can be done with `imul $69, %eax' rather than `imul $69, %eax, %eax'.

8.14 Intel i860 Dependent Features

8.14.1 i860 Notes

This is a fairly complete i860 assembler which is compatible with the UNIX System V/860 Release 4 assembler. However, it does not currently support SVR4 PIC (i.e., @GOT, @GOTOFF, @PLT).

Like the SVR4/860 assembler, the output object format is ELF32. Currently, this is the only supported object format. If there is sufficient interest, other formats such as COFF may be implemented.

Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter being the default. One difference is that AT&T syntax requires the '%' prefix on register names while Intel syntax does not. Another difference is in the specification of relocatable expressions. The Intel syntax is ha%expression whereas the SVR4 syntax is [expression]@ha (and similarly for the "l" and "h" selectors).

8.14.2 i860 Command-line Options

8.14.2.1 SVR4 compatibility options

8.14.2.2 Other options

8.14.3 i860 Machine Directives

The .dual, .enddual, and .atmp directives are available only in the Intel syntax mode.

Both syntaxes allow for the standard .align directive. However, the Intel syntax additionally allows keywords for the alignment parameter: ".align type", where `type' is one of .short, .long, .quad, .single, .double representing alignments of 2, 4, 16, 4, and 8, respectively.

8.14.4 i860 Opcodes

All of the Intel i860XR and i860XP machine instructions are supported. Please see either i860 Microprocessor Programmer's Reference Manual or i860 Microprocessor Architecture for more information.

8.14.4.1 Other instruction support (pseudo-instructions)

For compatibility with some other i860 assemblers, a number of pseudo-instructions are supported. While these are supported, they are a very undesirable feature that should be avoided – in particular, when they result in an expansion to multiple actual i860 instructions. Below are the pseudo-instructions that result in expansions.

8.15 Intel 80960 Dependent Features

8.15.1 i960 Command-line Options

8.15.2 Floating Point

as generates ieee floating-point numbers for the directives `.float', `.double', `.extended', and `.single'.

8.15.3 i960 Machine Directives

8.15.4 i960 Opcodes

All Intel 960 machine instructions are supported; see i960 Command-line Options for a discussion of selecting the instruction subset for a particular 960 architecture.

Some opcodes are processed beyond simply emitting a single corresponding instruction: `callj', and Compare-and-Branch or Compare-and-Jump instructions with target displacements larger than 13 bits.

8.15.4.1 callj

You can write callj to have the assembler or the linker determine the most appropriate form of subroutine call: `call', `bal', or `calls'. If the assembly source contains enough information—a `.leafproc' or `.sysproc' directive defining the operand—then as translates the callj; if not, it simply emits the callj, leaving it for the linker to resolve.

8.15.4.2 Compare-and-Branch

The 960 architectures provide combined Compare-and-Branch instructions that permit you to store the branch target in the lower 13 bits of the instruction word itself. However, if you specify a branch target far enough away that its address won't fit in 13 bits, the assembler can either issue an error, or convert your Compare-and-Branch instruction into separate instructions to do the compare and the branch.

Whether as gives an error or expands the instruction depends on two choices you can make: whether you use the `-no-relax' option, and whether you use a “Compare and Branch” instruction or a “Compare and Jump” instruction. The “Jump” instructions are always expanded if necessary; the “Branch” instructions are expanded when necessary unless you specify -no-relax—in which case as gives an error instead.

These are the Compare-and-Branch instructions, their “Jump” variants, and the instruction pairs they may expand into:

8.16 IP2K Dependent Features

8.16.1 IP2K Options

8.17 M32R Dependent Features

8.17.1 M32R Options

8.17.2 M32R Directives

8.17.3 M32R Warnings

There are several warning and error messages that can be produced by as which are specific to the M32R:

8.18 M680x0 Dependent Features

8.18.1 M680x0 Options

8.18.2 Syntax

The 680x0 version of as uses instructions names and syntax compatible with the Sun assembler. Intervening periods are ignored; for example, `movl' is equivalent to `mov.l'.

In the following table apc stands for any of the address registers (`%a0' through `%a7'), the program counter (`%pc'), the zero-address relative to the program counter (`%zpc'), a suppressed address register (`%za0' through `%za7'), or it may be omitted entirely. The use of size means one of `w' or `l', and it may be omitted, along with the leading colon, unless a scale is also specified. The use of scale means one of `1', `2', `4', or `8', and it may always be omitted along with the leading colon.

8.18.3 Motorola Syntax

The standard Motorola syntax for this chip differs from the syntax already discussed (see Syntax). as can accept Motorola syntax for operands, even if mit syntax is used for other operands in the same instruction. The two kinds of syntax are fully compatible.

In the following table apc stands for any of the address registers (`%a0' through `%a7'), the program counter (`%pc'), the zero-address relative to the program counter (`%zpc'), or a suppressed address register (`%za0' through `%za7'). The use of size means one of `w' or `l', and it may always be omitted along with the leading dot. The use of scale means one of `1', `2', `4', or `8', and it may always be omitted along with the leading asterisk.

8.18.4 Floating Point

Packed decimal (P) format floating literals are not supported. Feel free to add the code!

8.18.5 680x0 Machine Directives

In order to be compatible with the Sun assembler the 680x0 assembler understands the following directives.

8.18.6 Opcodes

8.18.6.1 Branch Improvement

Certain pseudo opcodes are permitted for branch instructions. They expand to the shortest branch instruction that reach the target. Generally these mnemonics are made by substituting `j' for `b' at the start of a Motorola mnemonic.

The following table summarizes the pseudo-operations. A * flags cases that are more fully described after the table:

8.18.6.2 Special Characters

The immediate character is `#' for Sun compatibility. The line-comment character is `|' (unless the `--bitwise-or' option is used). If a `#' appears at the beginning of a line, it is treated as a comment unless it looks like `# line file', in which case it is treated normally.

8.19 M68HC11 and M68HC12 Dependent Features

8.19.1 M68HC11 and M68HC12 Options

The Motorola 68HC11 and 68HC12 version of as have a few machine dependent options.

8.19.2 Syntax

In the M68HC11 syntax, the instruction name comes first and it may be followed by one or several operands (up to three). Operands are separated by comma (`,'). In the normal mode, as will complain if too many operands are specified for a given instruction. In the MRI mode (turned on with `-M' option), it will treat them as comments. Example:

The M68HC12 has other more complex addressing modes. All of them are supported and they are represented below:

8.19.3 Symbolic Operand Modifiers

The assembler supports several modifiers when using symbol addresses in 68HC11 and 68HC12 instruction operands. The general syntax is the following:

For example a 68HC12 call to a function `foo_example' stored in memory expansion part could be written as follows:

8.19.4 Assembler Directives

The 68HC11 and 68HC12 version of as have the following specific assembler directives:

8.19.5 Floating Point

Packed decimal (P) format floating literals are not supported. Feel free to add the code!

8.19.6 Opcodes

8.19.6.1 Branch Improvement

Certain pseudo opcodes are permitted for branch instructions. They expand to the shortest branch instruction that reach the target. Generally these mnemonics are made by prepending `j' to the start of Motorola mnemonic. These pseudo opcodes are not affected by the `--short-branchs' or `--force-long-branchs' options.

8.20 Motorola M88K Dependent Features

8.20.1 M88K Machine Directives

8.21 MIPS Dependent Features

gnu as for mips architectures supports several different mips processors, and MIPS ISA levels I through V, MIPS32, and MIPS64. For information about the mips instruction set, see MIPS RISC Architecture, by Kane and Heindrich (Prentice-Hall). For an overview of mips assembly conventions, see “Appendix D: Assembly Language Programming” in the same work.

8.21.1 Assembler options

8.21.2 MIPS ECOFF object code

Assembling for a mips ecoff target supports some additional sections besides the usual .text, .data and .bss. The additional sections are .rdata, used for read-only data, .sdata, used for small data, and .sbss, used for small common objects.

When assembling for ecoff, the assembler uses the $gp ($28) register to form the address of a “small object”. Any object in the .sdata or .sbss sections is considered “small” in this sense. For external objects, or for objects in the .bss section, you can use the gcc `-G' option to control the size of objects addressed via $gp; the default value is 8, meaning that a reference to any object eight bytes or smaller uses $gp. Passing `-G 0' to as prevents it from using the $gp register on the basis of object size (but the assembler uses $gp for objects in .sdata or sbss in any case). The size of an object in the .bss section is set by the .comm or .lcomm directive that defines it. The size of an external object may be set with the .extern directive. For example, `.extern sym,4' declares that the object at sym is 4 bytes in length, whie leaving sym otherwise undefined.

Using small ecoff objects requires linker support, and assumes that the $gp register is correctly initialized (normally done automatically by the startup code). mips ecoff assembly code must not modify the $gp register.

8.21.3 Directives for debugging information

mips ecoff as supports several directives used for generating debugging information which are not support by traditional mips assemblers. These are .def, .endef, .dim, .file, .scl, .size, .tag, .type, .val, .stabd, .stabn, and .stabs. The debugging information generated by the three .stab directives can only be read by gdb, not by traditional mips debuggers (this enhancement is required to fully support C++ debugging). These directives are primarily used by compilers, not assembly language programmers!

8.21.4 Directives to override the ISA level

gnu as supports an additional directive to change the mips Instruction Set Architecture level on the fly:

.set
mips

n. n should be a number from 0 to 5, or 32, 32r2, 64 or 64r2. The values other than 0 make the assembler accept instructions for the corresponding isa level, from that point on in the assembly. .set mipsn affects not only which instructions are permitted, but also how certain macros are expanded.

.set
mips0

restores the isa level to its original level: either the level you selected with command line options, or the default for your configuration. You can use this feature to permit specific r4000 instructions while assembling in 32 bit mode. Use this directive with care!

The directive `.set mips16' puts the assembler into MIPS 16 mode, in which it will assemble instructions for the MIPS 16 processor. Use `.set nomips16' to return to normal 32 bit mode.

8.21.5 Directives for extending MIPS 16 bit instructions

By default, MIPS 16 instructions are automatically extended to 32 bits when necessary. The directive `.set noautoextend' will turn this off. When `.set noautoextend' is in effect, any 32 bit instruction must be explicitly extended with the `.e' modifier (e.g., `li.e $4,1000'). The directive `.set autoextend' may be used to once again automatically extend instructions when necessary.

This directive is only meaningful when in MIPS 16 mode. Traditional mips assemblers do not support this directive.

8.21.6 Directive to mark data as an instruction

The .insn directive tells as that the following data is actually instructions. This makes a difference in MIPS 16 mode: when loading the address of a label which precedes instructions, as automatically adds 1 to the value, so that jumping to the loaded address will do the right thing.

8.21.7 Directives to save and restore options

The directives .set push and .set pop may be used to save and restore the current settings for all the options which are controlled by .set. The .set push directive saves the current settings on a stack. The .set pop directive pops the stack and restores the settings.

These directives can be useful inside an macro which must change an option such as the ISA level or instruction reordering but does not want to change the state of the code which invoked the macro.

8.21.8 Directives to control generation of MIPS ASE instructions

The directive .set mips3d makes the assembler accept instructions from the MIPS-3D Application Specific Extension from that point on in the assembly. The .set nomips3d directive prevents MIPS-3D instructions from being accepted.

The directive .set mdmx makes the assembler accept instructions from the MDMX Application Specific Extension from that point on in the assembly. The .set nomdmx directive prevents MDMX instructions from being accepted.

8.22 MMIX Dependent Features

8.22.1 Command-line Options

When `--fixed-special-register-names' is specified, only the register names specified in MMIX-Regs are recognized in the instructions PUT and GET.

You can use the `--globalize-symbols' to make all symbols global. This option is useful when splitting up a mmixal program into several files.

The `--gnu-syntax' turns off most syntax compatibility with mmixal. Its usability is currently doubtful.

The `--relax' option is not fully supported, but will eventually make the object file prepared for linker relaxation.

If you want to avoid inadvertently calling a predefined symbol and would rather get an error, for example when using as with a compiler or other machine-generated code, specify `--no-predefined-syms'. This turns off built-in predefined definitions of all such symbols, including rounding-mode symbols, segment symbols, `BIT' symbols, and TRAP symbols used in mmix “system calls”. It also turns off predefined special-register names, except when used in PUT and GET instructions.

By default, some instructions are expanded to fit the size of the operand or an external symbol (see MMIX-Expand). By passing `--no-expand', no such expansion will be done, instead causing errors at link time if the operand does not fit.

The mmixal documentation (see mmixsite) specifies that global registers allocated with the `GREG' directive (see MMIX-greg) and initialized to the same non-zero value, will refer to the same global register. This isn't strictly enforceable in as since the final addresses aren't known until link-time, but it will do an effort unless the `--no-merge-gregs' option is specified. (Register merging isn't yet implemented in ld.)

as will warn every time it expands an instruction to fit an operand unless the option `-x' is specified. It is believed that this behaviour is more useful than just mimicking mmixal's behaviour, in which instructions are only expanded if the `-x' option is specified, and assembly fails otherwise, when an instruction needs to be expanded. It needs to be kept in mind that mmixal is both an assembler and linker, while as will expand instructions that at link stage can be contracted. (Though linker relaxation isn't yet implemented in ld.) The option `-x' also imples `--linker-allocated-gregs'.

If instruction expansion is enabled, as can expand a `PUSHJ' instruction into a series of instructions. The shortest expansion is to not expand it, but just mark the call as redirectable to a stub, which ld creates at link-time, but only if the original `PUSHJ' instruction is found not to reach the target. The stub consists of the necessary instructions to form a jump to the target. This happens if as can assert that the `PUSHJ' instruction can reach such a stub. The option `--no-pushj-stubs' disables this shorter expansion, and the longer series of instructions is then created at assembly-time. The option `--no-stubs' is a synonym, intended for compatibility with future releases, where generation of stubs for other instructions may be implemented.

Usually a two-operand-expression (see GREG-base) without a matching `GREG' directive is treated as an error by as. When the option `--linker-allocated-gregs' is in effect, they are instead passed through to the linker, which will allocate as many global registers as is needed.

8.22.2 Instruction expansion

When as encounters an instruction with an operand that is either not known or does not fit the operand size of the instruction, as (and ld) will expand the instruction into a sequence of instructions semantically equivalent to the operand fitting the instruction. Expansion will take place for the following instructions:

The linker ld is expected to shrink these expansions for code assembled with `--relax' (though not currently implemented).

8.22.3 Syntax

The assembly syntax is supposed to be upward compatible with that described in Sections 1.3 and 1.4 of `The Art of Computer Programming, Volume 1'. Draft versions of those chapters as well as other MMIX information is located at http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html. Most code examples from the mmixal package located there should work unmodified when assembled and linked as single files, with a few noteworthy exceptions (see MMIX-mmixal).

Before an instruction is emitted, the current location is aligned to the next four-byte boundary. If a label is defined at the beginning of the line, its value will be the aligned value.

In addition to the traditional hex-prefix `0x', a hexadecimal number can also be specified by the prefix character `#'.

After all operands to an MMIX instruction or directive have been specified, the rest of the line is ignored, treated as a comment.

8.22.3.1 Special Characters

The characters `*' and `#' are line comment characters; each start a comment at the beginning of a line, but only at the beginning of a line. A `#' prefixes a hexadecimal number if found elsewhere on a line.

Two other characters, `%' and `!', each start a comment anywhere on the line. Thus you can't use the `modulus' and `not' operators in expressions normally associated with these two characters.

A `;' is a line separator, treated as a new-line, so separate instructions can be specified on a single line.

8.22.3.2 Symbols

The character `:' is permitted in identifiers. There are two exceptions to it being treated as any other symbol character: if a symbol begins with `:', it means that the symbol is in the global namespace and that the current prefix should not be prepended to that symbol (see MMIX-prefix). The `:' is then not considered part of the symbol. For a symbol in the label position (first on a line), a `:' at the end of a symbol is silently stripped off. A label is permitted, but not required, to be followed by a `:', as with many other assembly formats.

The character `@' in an expression, is a synonym for `.', the current location.

In addition to the common forward and backward local symbol formats (see Symbol Names), they can be specified with upper-case `B' and `F', as in `8B' and `9F'. A local label defined for the current position is written with a `H' appended to the number:

This and traditional local-label formats cannot be mixed: a label must be defined and referred to using the same format.

There's a minor caveat: just as for the ordinary local symbols, the local symbols are translated into ordinary symbols using control characters are to hide the ordinal number of the symbol. Unfortunately, these symbols are not translated back in error messages. Thus you may see confusing error messages when local symbols are used. Control characters `\003' (control-C) and `\004' (control-D) are used for the MMIX-specific local-symbol syntax.

By defining the symbols `__.MMIX.start..text' and `__.MMIX.start..data', the address of respectively the `.text' and `.data' segments of the final program can be defined, though when linking more than one object file, the code or data in the object file containing the symbol is not guaranteed to be start at that position; just the final executable. See MMIX-loc.

8.22.3.3 Register names

Local and global registers are specified as `$0' to `$255'. The recognized special register names are `rJ', `rA', `rB', `rC', `rD', `rE', `rF', `rG', `rH', `rI', `rK', `rL', `rM', `rN', `rO', `rP', `rQ', `rR', `rS', `rT', `rU', `rV', `rW', `rX', `rY', `rZ', `rBB', `rTT', `rWW', `rXX', `rYY' and `rZZ'. A leading `:' is optional for special register names.

Local and global symbols can be equated to register names and used in place of ordinary registers.

Similarly for special registers, local and global symbols can be used. Also, symbols equated from numbers and constant expressions are allowed in place of a special register, except when either of the options --no-predefined-syms and --fixed-special-register-names are specified. Then only the special register names above are allowed for the instructions having a special register operand; GET and PUT.

8.22.3.4 Assembler Directives

8.22.4 Differences to mmixal

The binutils as and ld combination has a few differences in function compared to mmixal (see mmixsite).

The replacement of a symbol with a GREG-allocated register (see GREG-base) is not handled the exactly same way in as as in mmixal. This is apparent in the mmixal example file inout.mms, where different registers with different offsets, eventually yielding the same address, are used in the first instruction. This type of difference should however not affect the function of any program unless it has specific assumptions about the allocated register number.

Expression operator precedence is not that of mmixal: operator precedence is that of the C programming language. It's recommended to use parentheses to explicitly specify wanted operator precedence whenever more than one type of operators are used.

The serialize unary operator &, the fractional division operator `//', the logical not operator ! and the modulus operator `%' are not available.

Symbols are not global by default, unless the option `--globalize-symbols' is passed. Use the `.global' directive to globalize symbols (see Global).

Operand syntax is a bit stricter with as than mmixal. For example, you can't say addu 1,2,3, instead you must write addu $1,$2,3.

You can't LOC to a lower address than those already visited (i.e. “backwards”).

Predefined symbols are visible as file-local symbols after use. (In the ELF file, that is—the linked mmo file has no notion of a file-local symbol.)

Some mapping of constant expressions to sections in LOC expressions is attempted, but that functionality is easily confused and should be avoided unless compatibility with mmixal is required. A LOC expression to `0x2000000000000000' or higher, maps to the `.data' section and lower addresses map to the `.text' section (see MMIX-loc).

The code and data areas are each contiguous. Sparse programs with far-away LOC directives will take up the same amount of space as a contiguous program with zeros filled in the gaps between the LOC directives. If you need sparse programs, you might try and get the wanted effect with a linker script and splitting up the code parts into sections (see Section). Assembly code for this, to be compatible with mmixal, would look something like:

as will not execute the LOC directive and mmixal ignores the lines with .. This construct can be used generally to help compatibility.

Instruction mnemonics are recognized case-insensitive, though the `IS' and `GREG' pseudo-operations must be specified in upper-case characters.

The following is a list of programs in `mmix.tar.gz', available at http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html, last checked with the version dated 2001-08-25 (md5sum c393470cfc86fac040487d22d2bf0172) that assemble with mmixal but do not assemble with as:

8.23 MSP 430 Dependent Features

8.23.1 Options

8.23.2 Syntax

8.23.2.1 Macros

The macro syntax used on the MSP 430 is like that described in the MSP 430 Family Assembler Specification. Normal as macros should still work.

8.23.2.2 Special Characters

The character `$' in jump instructions indicates current location and implemented only for TI syntax compatibility.

8.23.2.3 Register Names

General-purpose registers are represented by predefined symbols of the form `rN' (for global registers), where N represents a number between 0 and 15. The leading letters may be in either upper or lower case; for example, `r13' and `R7' are both valid register names.

Register names `PC', `SP' and `SR' cannot be used as register names and will be treated as variables. Use `r0', `r1', and `r2' instead.

8.23.2.4 Assembler Extensions

8.23.3 Floating Point

8.23.4 MSP 430 Machine Directives

8.23.5 Opcodes

as implements all the standard MSP 430 opcodes. No additional pseudo-instructions are needed on this family.

For information on the 430 machine instruction set, see MSP430 User's Manual, document slau049b, Texas Instrument, Inc.

8.24 PDP-11 Dependent Features

8.24.1 Options

8.24.1.1 Code Generation Options

8.24.1.2 Instruction Set Extension Options

These options enables or disables the use of extensions over the base line instruction set as introduced by the first PDP-11 CPU: the KA11. Most options come in two variants: a -mextension that enables extension, and a -mno-extension that disables extension.

8.24.1.3 CPU Model Options

These options enable the instruction set extensions supported by a particular CPU, and disables all other extensions.

8.24.1.4 Machine Model Options

These options enable the instruction set extensions supported by a particular machine model, and disables all other extensions.

8.24.2 Assembler Directives

8.24.3 PDP-11 Assembly Language Syntax

as supports both DEC syntax and BSD syntax. The only difference is that in DEC syntax, a # character is used to denote an immediate constants, while in BSD syntax the character for this purpose is $.

eneral-purpose registers are named r0 through r7. Mnemonic alternatives for r6 and r7 are sp and pc, respectively.

Floating-point registers are named ac0 through ac3, or alternatively fr0 through fr3.

Comments are started with a # or a / character, and extend to the end of the line. (FIXME: clash with immediates?)

8.24.4 Instruction Naming

8.24.5 Synthetic Instructions

8.25 picoJava Dependent Features

8.25.1 Options

8.26 PowerPC Dependent Features

8.26.1 Options

The PowerPC chip family includes several successive levels, using the same core instruction set, but including a few additional instructions at each level. There are exceptions to this however. For details on what instructions each variant supports, please see the chip's architecture reference manual.

8.26.2 PowerPC Assembler Directives

A number of assembler directives are available for PowerPC. The following table is far from complete.

8.27 Renesas / SuperH SH Dependent Features

8.27.1 Options

as has following command-line options for the Renesas (formerly Hitachi) / SuperH SH family.

8.27.2 Syntax

8.27.2.1 Special Characters

8.27.2.2 Register Names

You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5', `r6', `r7', `r8', `r9', `r10', `r11', `r12', `r13', `r14', and `r15' to refer to the SH registers.

8.27.2.3 Addressing Modes

as understands the following addressing modes for the SH. Rn in the following refers to any of the numbered registers, but not the control registers.

8.27.3 Floating Point

SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other SH groups can use .float directive to generate ieee floating-point numbers.

SH2E and SH3E support single-precision floating point calculations as well as entirely PCAPI compatible emulation of double-precision floating point calculations. SH2E and SH3E instructions are a subset of the floating point calculations conforming to the IEEE754 standard.

In addition to single-precision and double-precision floating-point operation capability, the on-chip FPU of SH4 has a 128-bit graphic engine that enables 32-bit floating-point data to be processed 128 bits at a time. It also supports 4 * 4 array operations and inner product operations. Also, a superscalar architecture is employed that enables simultaneous execution of two instructions (including FPU instructions), providing performance of up to twice that of conventional architectures at the same frequency.

8.27.4 SH Machine Directives

8.27.5 Opcodes

For detailed information on the SH machine instruction set, see SH-Microcomputer User's Manual (Renesas) or SH-4 32-bit CPU Core Architecture (SuperH) and SuperH (SH) 64-Bit RISC Series (SuperH).

as implements all the standard SH opcodes. No additional pseudo-instructions are needed on this family. Note, however, that because as supports a simpler form of PC-relative addressing, you may simply write (for example)

where other assemblers might require an explicit displacement to bar from the program counter:

8.28 SuperH SH64 Dependent Features

8.28.1 Options

8.28.2 Syntax

8.28.2.1 Special Characters

8.28.2.2 Register Names

You can use the predefined symbols `r0' through `r63' to refer to the SH64 general registers, `cr0' through cr63 for control registers, `tr0' through `tr7' for target address registers, `fr0' through `fr63' for single-precision floating point registers, `dr0' through `dr62' (even numbered registers only) for double-precision floating point registers, `fv0' through `fv60' (multiples of four only) for single-precision floating point vectors, `fp0' through `fp62' (even numbered registers only) for single-precision floating point pairs, `mtrx0' through `mtrx48' (multiples of 16 only) for 4x4 matrices of single-precision floating point registers, `pc' for the program counter, and `fpscr' for the floating point status and control register.

You can also refer to the control registers by the mnemonics `sr', `ssr', `pssr', `intevt', `expevt', `pexpevt', `tra', `spc', `pspc', `resvec', `vbr', `tea', `dcr', `kcr0', `kcr1', `ctc', and `usr'.

8.28.2.3 Addressing Modes

SH64 operands consist of either a register or immediate value. The immediate value can be a constant or label reference (or portion of a label reference), as in this example:

Instruction label references can reference labels in either SHmedia or SHcompact. To differentiate between the two, labels in SHmedia sections will always have the least significant bit set (i.e. they will be odd), which SHcompact labels will have the least significant bit reset (i.e. they will be even). If you need to reference the actual address of a label, you can use the datalabel modifier, as in this example:

In that example, the first longword may or may not have the least significant bit set depending on whether the label is an SHmedia label or an SHcompact label. The second longword will be the actual address of the label, regardless of what type of label it is.

8.28.3 SH64 Machine Directives

8.28.4 Opcodes

For detailed information on the SH64 machine instruction set, see SuperH 64 bit RISC Series Architecture Manual (SuperH, Inc.).

as implements all the standard SH64 opcodes. In addition, the following pseudo-opcodes may be expanded into one or more alternate opcodes:

8.29 SPARC Dependent Features

8.29.1 Options

The SPARC chip family includes several successive levels, using the same core instruction set, but including a few additional instructions at each level. There are exceptions to this however. For details on what instructions each variant supports, please see the chip's architecture reference manual.

By default, as assumes the core instruction set (SPARC v6), but “bumps” the architecture level as needed: it switches to successively higher architectures as it encounters instructions that only exist in the higher levels.

If not configured for SPARC v9 (sparc64-*-*) GAS will not bump passed sparclite by default, an option must be passed to enable the v9 instructions.

GAS treats sparclite as being compatible with v8, unless an architecture is explicitly requested. SPARC v9 is always incompatible with sparclite.

8.29.2 Enforcing aligned data

SPARC GAS normally permits data to be misaligned. For example, it permits the .long pseudo-op to be used on a byte boundary. However, the native SunOS and Solaris assemblers issue an error when they see misaligned data.

You can use the --enforce-aligned-data option to make SPARC GAS also issue an error about misaligned data, just as the SunOS and Solaris assemblers do.

The --enforce-aligned-data option is not the default because gcc issues misaligned data pseudo-ops when it initializes certain packed data structures (structures defined using the packed attribute). You may have to assemble with GAS in order to initialize packed data structures in your own code.

8.29.3 Floating Point

8.29.4 Sparc Machine Directives

8.30 TIC54X Dependent Features

8.30.1 Options

You can use the `-mfar-mode' option to enable extended addressing mode. All addresses will be assumed to be > 16 bits, and the appropriate relocation types will be used. This option is equivalent to using the `.far_mode' directive in the assembly code. If you do not use the `-mfar-mode' option, all references will be assumed to be 16 bits. This option may be abbreviated to `-mf'.

You can use the `-mcpu' option to specify a particular CPU. This option is equivalent to using the `.version' directive in the assembly code. For recognized CPU codes, see See .version. The default CPU version is `542'.

You can use the `-merrors-to-file' option to redirect error output to a file (this provided for those deficient environments which don't provide adequate output redirection). This option may be abbreviated to `-me'.

8.30.2 Blocking

A blocked section or memory block is guaranteed not to cross the blocking boundary (usually a page, or 128 words) if it is smaller than the blocking size, or to start on a page boundary if it is larger than the blocking size.

8.30.3 Environment Settings

`C54XDSP_DIR' and `A_DIR' are semicolon-separated paths which are added to the list of directories normally searched for source and include files. `C54XDSP_DIR' will override `A_DIR'.

8.30.4 Constants Syntax

The TIC54X version of as allows the following additional constant formats, using a suffix to indicate the radix:

8.30.5 String Substitution

A subset of allowable symbols (which we'll call subsyms) may be assigned arbitrary string values. This is roughly equivalent to C preprocessor #define macros. When as encounters one of these symbols, the symbol is replaced in the input stream by its string value. Subsym names must begin with a letter.

Subsyms may be defined using the .asg and .eval directives (See .asg, See .eval.

Expansion is recursive until a previously encountered symbol is seen, at which point substitution stops.

In this example, x is replaced with SYM2; SYM2 is replaced with SYM1, and SYM1 is replaced with x. At this point, x has already been encountered and the substitution stops.

Macro parameters are converted to subsyms; a side effect of this is the normal as '\ARG' dereferencing syntax is unnecessary. Subsyms defined within a macro will have global scope, unless the .var directive is used to identify the subsym as a local macro variable see .var.

Substitution may be forced in situations where replacement might be ambiguous by placing colons on either side of the subsym. The following code:

Smaller parts of the string assigned to a subsym may be accessed with the following syntax:

8.30.6 Local Labels

Local labels thus defined may be redefined or automatically generated. The scope of a local label is based on when it may be undefined or reset. This happens when one of the following situations is encountered:

8.30.7 Math Builtins

The following built-in functions may be used to generate a floating-point value. All return a floating-point value except `$cvi', `$int', and `$sgn', which return an integer value.

8.30.8 Extended Addressing

The LDX pseudo-op is provided for loading the extended addressing bits of a label or address. For example, if an address _label resides in extended program memory, the value of _label may be loaded as follows:

8.30.9 Directives

8.30.10 Macros

During macro expansion, the macro parameters are converted to subsyms. If the number of arguments passed the macro invocation exceeds the number of parameters defined, the last parameter is assigned the string equivalent of all remaining arguments. If fewer arguments are given than parameters, the missing parameters are assigned empty strings. To include a comma in an argument, you must enclose the argument in quotes.

The following built-in subsym functions allow examination of the string value of subsyms (or ordinary strings). The arguments are strings unless otherwise indicated (subsyms passed as args will be replaced by the strings they represent).

8.30.11 Memory-mapped Registers

8.31 Z8000 Dependent Features

The Z8000 as supports both members of the Z8000 family: the unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with 24 bit addresses.

When the assembler is in unsegmented mode (specified with the unsegm directive), an address takes up one word (16 bit) sized register. When the assembler is in segmented mode (specified with the segm directive), a 24-bit address takes up a long (32 bit) register. See Assembler Directives for the Z8000, for a list of other Z8000 specific assembler directives.

8.31.1 Options

8.31.2 Syntax

8.31.2.1 Special Characters

8.31.2.2 Register Names

The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer to different sized groups of registers by register number, with the prefix `r' for 16 bit registers, `rr' for 32 bit registers and `rq' for 64 bit registers. You can also refer to the contents of the first eight (of the sixteen 16 bit registers) by bytes. They are named `rln' and `rhn'.

8.31.2.3 Addressing Modes

8.31.3 Assembler Directives for the Z8000

The Z8000 port of as includes additional assembler directives, for compatibility with other Z8000 assemblers. These do not begin with `.' (unlike the ordinary as directives).

8.31.4 Opcodes

For detailed information on the Z8000 machine instruction set, see Z8000 Technical Manual.

8.32 VAX Dependent Features

8.32.1 VAX Command-Line Options

The Vax version of as accepts any of the following options, gives a warning message that the option was ignored and proceeds. These options are for compatibility with scripts designed for other people's assemblers.

The Vax version of the assembler accepts additional options when compiled for VMS:

8.32.2 VAX Floating Point

Conversion of flonums to floating point is correct, and compatible with previous assemblers. Rounding is towards zero if the remainder is exactly half the least significant bit.

Immediate floating literals (e.g. `S`$6.9') are rendered correctly. Again, rounding is towards zero in the boundary case.

The .float directive produces f format numbers. The .double directive produces d format numbers.

8.32.3 Vax Machine Directives

The Vax version of the assembler supports four directives for generating Vax floating point constants. They are described in the table below.

8.32.4 VAX Opcodes

All DEC mnemonics are supported. Beware that case... instructions have exactly 3 operands. The dispatch table that follows the case... instruction should be made with .word statements. This is compatible with all unix assemblers we know of.

8.32.5 VAX Branch Improvement

Certain pseudo opcodes are permitted. They are for branch instructions. They expand to the shortest branch instruction that reaches the target. Generally these mnemonics are made by substituting `j' for `b' at the start of a DEC mnemonic. This feature is included both for compatibility and to help compilers. If you do not need this feature, avoid these opcodes. Here are the mnemonics, and the code they can expand into.

8.32.6 VAX Operands

The immediate character is `$' for Unix compatibility, not `#' as DEC writes it.

The indirect character is `*' for Unix compatibility, not `@' as DEC writes it.

The displacement sizing character is ``' (an accent grave) for Unix compatibility, not `^' as DEC writes it. The letter preceding ``' may have either case. `G' is not understood, but all other letters (b i l s w) are understood.

r0 r1 r2 ... r15 ap fp sp
pc

. Upper and lower case letters are equivalent.

8.32.7 Not Supported on VAX

Vax bit fields can not be assembled with as. Someone can add the required code if they really need it.

8.33 v850 Dependent Features

8.33.1 Options

as supports the following additional command-line options for the V850 processor family:

8.33.2 Syntax

8.33.2.1 Special Characters

8.33.2.2 Register Names

8.33.3 Floating Point

8.33.4 V850 Machine Directives

8.33.5 Opcodes

For information on the V850 instruction set, see V850 Family 32-/16-Bit single-Chip Microcontroller Architecture Manual from NEC. Ltd.

8.34 Xtensa Dependent Features

This chapter covers features of the gnu assembler that are specific to the Xtensa architecture. For details about the Xtensa instruction set, please consult the Xtensa Instruction Set Architecture (ISA) Reference Manual.

8.34.1 Command Line Options

8.34.2 Assembler Syntax

Block comments are delimited by `/*' and `*/'. End of line comments may be introduced with either `#' or `//'.

Instructions consist of a leading opcode or macro name followed by whitespace and an optional comma-separated list of operands:

8.34.2.1 Opcode Names

See the Xtensa Instruction Set Architecture (ISA) Reference Manual for a complete list of opcodes and descriptions of their semantics.

The Xtensa assembler distinguishes between generic and specific opcodes. Specific opcodes correspond directly to Xtensa machine instructions. Prefixing an opcode with an underscore character (`_') identifies it as a specific opcode. Opcodes without a leading underscore are generic, which means the assembler is required to preserve their semantics but may not translate them directly to the specific opcodes with the same names. Instead, the assembler may optimize a generic opcode and select a better instruction to use in its place (see Xtensa Optimizations), or the assembler may relax the instruction to handle operands that are out of range for the corresponding specific opcode (see Xtensa Relaxation).

Only use specific opcodes when it is essential to select the exact machine instructions produced by the assembler. Using specific opcodes unnecessarily only makes the code less efficient, by disabling assembler optimization, and less flexible, by disabling relaxation.

Note that this special handling of underscore prefixes only applies to Xtensa opcodes, not to either built-in macros or user-defined macros. When an underscore prefix is used with a macro (e.g., _NOP), it refers to a different macro. The assembler generally provides built-in macros both with and without the underscore prefix, where the underscore versions behave as if the underscore carries through to the instructions in the macros. For example, _NOP expands to _OR a1,a1,a1.

The underscore prefix only applies to individual instructions, not to series of instructions. For example, if a series of instructions have underscore prefixes, the assembler will not transform the individual instructions, but it may insert other instructions between them (e.g., to align a LOOP instruction). To prevent the assembler from modifying a series of instructions as a whole, use the no-generics directive. See generics.

8.34.2.2 Register Names

An initial `$' character is optional in all register names. General purpose registers are named `a0'...`a15'. Additional registers may be added by processor configuration options. In particular, the mac16 option adds a mr register bank. Its registers are named `m0'...`m3'.

8.34.3 Xtensa Optimizations

The optimizations currently supported by as are generation of density instructions where appropriate and automatic branch target alignment.

8.34.3.1 Using Density Instructions

The Xtensa instruction set has a code density option that provides 16-bit versions of some of the most commonly used opcodes. Use of these opcodes can significantly reduce code size. When possible, the assembler automatically translates generic instructions from the core Xtensa instruction set into equivalent instructions from the Xtensa code density option. This translation can be disabled by using specific opcodes (see Opcode Names), by using the `--no-density' command-line option (see Command Line Options), or by using the no-density directive (see density).

It is a good idea not to use the density instructions directly. The assembler will automatically select dense instructions where possible. If you later need to avoid using the code density option, you can disable it in the assembler without having to modify the code.

8.34.3.2 Automatic Instruction Alignment

The Xtensa assembler will automatically align certain instructions, both to optimize performance and to satisfy architectural requirements.

When the --target-align command-line option is enabled (see Command Line Options), the assembler attempts to widen density instructions preceding a branch target so that the target instruction does not cross a 4-byte boundary. Similarly, the assembler also attempts to align each instruction following a call instruction. If there are not enough preceding safe density instructions to align a target, no widening will be performed. This alignment has the potential to reduce branch penalties at some expense in code size. The assembler will not attempt to align labels with the prefixes .Ln and .LM, since these labels are used for debugging information and are not typically branch targets.

The LOOP family of instructions must be aligned on either a 1 or 2 mod 4 byte boundary. The assembler knows about this restriction and inserts the minimal number of 2 or 3 byte no-op instructions to satisfy it. When no-op instructions are added, any label immediately preceding the original loop will be moved in order to refer to the loop instruction, not the newly generated no-op instruction.

Similarly, the ENTRY instruction must be aligned on a 0 mod 4 byte boundary. The assembler satisfies this requirement by inserting zero bytes when required. In addition, labels immediately preceding the ENTRY instruction will be moved to the newly aligned instruction location.

8.34.4 Xtensa Relaxation

When an instruction operand is outside the range allowed for that particular instruction field, as can transform the code to use a functionally-equivalent instruction or sequence of instructions. This process is known as relaxation. This is typically done for branch instructions because the distance of the branch targets is not known until assembly-time. The Xtensa assembler offers branch relaxation and also extends this concept to function calls, MOVI instructions and other instructions with immediate fields.

8.34.4.1 Conditional Branch Relaxation

When the target of a branch is too far away from the branch itself, i.e., when the offset from the branch to the target is too large to fit in the immediate field of the branch instruction, it may be necessary to replace the branch with a branch around a jump. For example,

(The BNEZ.N instruction would be used in this example only if the density option is available. Otherwise, BNEZ would be used.)

8.34.4.2 Function Call Relaxation

Function calls may require relaxation because the Xtensa immediate call instructions (CALL0, CALL4, CALL8 and CALL12) provide a PC-relative offset of only 512 Kbytes in either direction. For larger programs, it may be necessary to use indirect calls (CALLX0, CALLX4, CALLX8 and CALLX12) where the target address is specified in a register. The Xtensa assembler can automatically relax immediate call instructions into indirect call instructions. This relaxation is done by loading the address of the called function into the callee's return address register and then using a CALLX instruction. So, for example:

Because the addresses of targets of function calls are not generally known until link-time, the assembler must assume the worst and relax all the calls to functions in other source files, not just those that really will be out of range. The linker can recognize calls that were unnecessarily relaxed, but it can only partially remove the overhead introduced by the assembler.

Call relaxation has a negative effect on both code size and performance, so this relaxation is disabled by default. If a program is too large and some of the calls are out of range, function call relaxation can be enabled using the `--longcalls' command-line option or the longcalls directive (see longcalls).

8.34.4.3 Other Immediate Field Relaxation

The MOVI machine instruction can only materialize values in the range from -2048 to 2047. Values outside this range are best materialized with L32R instructions. Thus:

The L8UI machine instruction can only be used with immediate offsets in the range from 0 to 255. The L16SI and L16UI machine instructions can only be used with offsets from 0 to 510. The L32I machine instruction can only be used with offsets from 0 to 1020. A load offset outside these ranges can be materalized with an L32R instruction if the destination register of the load is different than the source address register. For example:

If the load destination and source address register are the same, an out-of-range offset causes an error.

The Xtensa ADDI instruction only allows immediate operands in the range from -128 to 127. There are a number of alternate instruction sequences for the generic ADDI operation. First, if the immediate is 0, the ADDI will be turned into a MOV.N instruction (or the equivalent OR instruction if the code density option is not available). If the ADDI immediate is outside of the range -128 to 127, but inside the range -32896 to 32639, an ADDMI instruction or ADDMI/ADDI sequence will be used. Finally, if the immediate is outside of this range and a free register is available, an L32R/ADD sequence will be used with a literal allocated from the literal pool.

8.34.5 Directives

All the Xtensa-specific directives that apply to a region of code use this syntax.

The directive applies to code between the .begin and the .end. The state of the option after the .end reverts to what it was before the .begin. A nested .begin/.end region can further change the state of the directive without having to be aware of its outer state. For example, consider:

The generic ADD opcodes at L and N in the outer no-density region both result in ADD machine instructions, but the assembler selects an ADD.N instruction for the generic ADD at M in the inner density region.

The advantage of this style is that it works well inside macros which can preserve the context of their callers.

When command-line options and assembler directives are used at the same time and conflict, the one that overrides a default behavior takes precedence over one that is the same as the default. For example, if the code density option is available, the default is to select density instructions whenever possible. So, if the above is assembled with the `--no-density' flag, which overrides the default, all the generic ADD instructions result in ADD machine instructions. If assembled with the `--density' flag, which is already the default, the no-density directive takes precedence and only one of the generic ADD instructions is optimized to be a ADD.N machine instruction. An underscore prefix identifying a specific opcode always takes precedence over directives and command-line flags.

8.34.5.1 density

The density and no-density directives enable or disable optimization of generic instructions into density instructions within the region. See Using Density Instructions.

This optimization is enabled by default unless the Xtensa configuration does not support the code density option or the `--no-density' command-line option was specified.

8.34.5.2 relax

The relax directive enables or disables relaxation within the region. See Xtensa Relaxation. Note: In the current implementation, these directives also control whether assembler optimizations are performed, making them equivalent to the generics and no-generics directives.

Relaxation is enabled by default unless the `--no-relax' command-line option was specified.

8.34.5.3 longcalls

The longcalls directive enables or disables function call relaxation. See Function Call Relaxation.

Call relaxation is disabled by default unless the `--longcalls' command-line option is specified.

8.34.5.4 generics

This directive enables or disables all assembler transformation, including relaxation (see Xtensa Relaxation) and optimization (see Xtensa Optimizations).

Disabling generics is roughly equivalent to adding an underscore prefix to every opcode within the region, so that every opcode is treated as a specific opcode. See Opcode Names. In the current implementation of as, built-in macros are also disabled within a no-generics region.

8.34.5.5 literal

The .literal directive is used to define literal pool data, i.e., read-only 32-bit data accessed via L32R instructions.

This directive is similar to the standard .word directive, except that the actual location of the literal data is determined by the assembler and linker, not by the position of the .literal directive. Using this directive gives the assembler freedom to locate the literal data in the most appropriate place and possibly to combine identical literals. For example, the code:

can be used to load a pointer to the symbol sym into register a4. The value of sym will not be placed between the ENTRY and L32R instructions; instead, the assembler puts the data in a literal pool.

By default literal pools are placed in a separate section; however, when using the `--text-section-literals' option (see Command Line Options), the literal pools are placed in the current section. These text section literal pools are created automatically before ENTRY instructions and manually after `.literal_position' directives (see literal_position). If there are no preceding ENTRY instructions or .literal_position directives, the assembler will print a warning and place the literal pool at the beginning of the current section. In such cases, explicit .literal_position directives should be used to place the literal pools.

8.34.5.6 literal_position

When using `--text-section-literals' to place literals inline in the section being assembled, the .literal_position directive can be used to mark a potential location for a literal pool.

The .literal_position directive is ignored when the `--text-section-literals' option is not used.

The assembler will automatically place text section literal pools before ENTRY instructions, so the .literal_position directive is only needed to specify some other location for a literal pool. You may need to add an explicit jump instruction to skip over an inline literal pool.

For example, an interrupt vector does not begin with an ENTRY instruction so the assembler will be unable to automatically find a good place to put a literal pool. Moreover, the code for the interrupt vector must be at a specific starting address, so the literal pool cannot come before the start of the code. The literal pool for the vector must be explicitly positioned in the middle of the vector (before any uses of the literals, of course). The .literal_position directive can be used to do this. In the following code, the literal for `M' will automatically be aligned correctly and is placed after the unconditional jump.

8.34.5.7 literal_prefix

The literal_prefix directive allows you to specify different sections to hold literals from different portions of an assembly file. With this directive, a single assembly file can be used to generate code into multiple sections, including literals generated by the assembler.

For the code inside the delimited region, the assembler puts literals in the section name.literal. If this section does not yet exist, the assembler creates it. The name parameter is optional. If name is not specified, the literal prefix is set to the “default” for the file. This default is usually .literal but can be changed with the `--rename-section' command-line argument.

8.34.5.8 freeregs

This directive tells the assembler that the given registers are unused in the region.

This allows the assembler to use these registers for relaxations or optimizations. (They are actually only for relaxations at present, but the possibility of optimizations exists in the future.)

Nested freeregs directives can be used to add additional registers to the list of those available to the assembler. For example:

8.34.5.9 frame

This directive tells the assembler to emit information to allow the debugger to locate a function's stack frame. The syntax is:

where reg is the register used to hold the frame pointer (usually the same as the stack pointer) and size is the size in bytes of the stack frame. The .frame directive is typically placed immediately after the ENTRY instruction for a function.

In almost all circumstances, this information just duplicates the information given in the function's ENTRY instruction; however, there are two cases where this is not true:

9 Reporting Bugs

Reporting a bug may help you by bringing a solution to your problem, or it may not. But in any case the principal function of a bug report is to help the entire community by making the next version of as work better. Bug reports are your contribution to the maintenance of as.

In order for a bug report to serve its purpose, you must include the information that enables us to fix the bug.

9.1 Have You Found a Bug?

9.2 How to Report Bugs

A number of companies and individuals offer support for gnu products. If you obtained as from a support organization, we recommend you contact that organization first.

You can find contact information for many support companies and individuals in the file etc/SERVICE in the gnu Emacs distribution.

In any event, we also recommend that you send bug reports for as to `bug-binutils@gnu.org'.

The fundamental principle of reporting bugs usefully is this: report all the facts. If you are not sure whether to state a fact or leave it out, state it!

Often people omit facts because they think they know what causes the problem and assume that some details do not matter. Thus, you might assume that the name of a symbol you use in an example does not matter. Well, probably it does not, but one cannot be sure. Perhaps the bug is a stray memory reference which happens to fetch from the location where that name is stored in memory; perhaps, if the name were different, the contents of that location would fool the assembler into doing the right thing despite the bug. Play it safe and give a specific, complete example. That is the easiest thing for you to do, and the most helpful.

Keep in mind that the purpose of a bug report is to enable us to fix the bug if it is new to us. Therefore, always write your bug reports on the assumption that the bug has not been reported previously.

Sometimes people give a few sketchy facts and ask, “Does this ring a bell?” This cannot help us fix a bug, so it is basically useless. We respond by asking for enough details to enable us to investigate. You might as well expedite matters by sending them to begin with.

10 Acknowledgements

If you have contributed to as and your name isn't listed here, it is not meant as a slight. We just don't know about it. Send mail to the maintainer, and we'll correct the situation. Currently the maintainer is Ken Raeburn (email address raeburn@cygnus.com).

Jay Fenlason maintained GAS for a while, adding support for GDB-specific debug information and the 68k series machines, most of the preprocessing pass, and extensive changes in messages.c, input-file.c, write.c.

K. Richard Pixley maintained GAS for a while, adding various enhancements and many bug fixes, including merging support for several processors, breaking GAS up to handle multiple object file format back ends (including heavy rewrite, testing, an integration of the coff and b.out back ends), adding configuration including heavy testing and verification of cross assemblers and file splits and renaming, converted GAS to strictly ANSI C including full prototypes, added support for m680[34]0 and cpu32, did considerable work on i960 including a COFF port (including considerable amounts of reverse engineering), a SPARC opcode file rewrite, DECstation, rs6000, and hp300hpux host ports, updated “know” assertions and made them work, much other reorganization, cleanup, and lint.

Ken Raeburn wrote the high-level BFD interface code to replace most of the code in format-specific I/O modules.

The original VMS support was contributed by David L. Kashtan. Eric Youngdale has done much work with it since.

The Motorola 88k machine description was contributed by Devon Bowen of Buffalo University and Torbjorn Granlund of the Swedish Institute of Computer Science.

Keith Knowles at the Open Software Foundation wrote the original MIPS back end (tc-mips.c, tc-mips.h), and contributed Rose format support (which hasn't been merged in yet). Ralph Campbell worked with the MIPS code to support a.out format.

Support for the Zilog Z8k and Renesas H8/300 and H8/500 processors (tc-z8k, tc-h8300, tc-h8500), and IEEE 695 object file format (obj-ieee), was written by Steve Chamberlain of Cygnus Support. Steve also modified the COFF back end to use BFD for some low-level operations, for use with the H8/300 and AMD 29k targets.

John Gilmore built the AMD 29000 support, added .include support, and simplified the configuration of which versions accept which directives. He updated the 68k machine description so that Motorola's opcodes always produced fixed-size instructions (e.g., jsr), while synthetic instructions remained shrinkable (jbsr). John fixed many bugs, including true tested cross-compilation support, and one bug in relaxation that took a week and required the proverbial one-bit fix.

Ian Lance Taylor of Cygnus Support merged the Motorola and MIT syntax for the 68k, completed support for some COFF targets (68k, i386 SVR3, and SCO Unix), added support for MIPS ECOFF and ELF targets, wrote the initial RS/6000 and PowerPC assembler, and made a few other minor patches.

Jeff Law wrote GAS and BFD support for the native HPPA object format (SOM) along with a fairly extensive HPPA testsuite (for both SOM and ELF object formats). This work was supported by both the Center for Software Science at the University of Utah and Cygnus Support.

Support for ELF format files has been worked on by Mark Eichin of Cygnus Support (original, incomplete implementation for SPARC), Pete Hoogenboom and Jeff Law at the University of Utah (HPPA mainly), Michael Meissner of the Open Software Foundation (i386 mainly), and Ken Raeburn of Cygnus Support (sparc, and some initial 64-bit support).

Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote GAS and BFD support for openVMS/Alpha.

Timothy Wall, Michael Hayes, and Greg Smart contributed to the various tic* flavors.

David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from Tensilica, Inc. added support for Xtensa processors.

Several engineers at Cygnus Support have also provided many small bug fixes and configuration enhancements.

Many others have contributed large or small bugfixes and enhancements. If you have contributed significant work and are not mentioned on this list, and want to be, let us know. Some of the history has been lost; we are not intentionally leaving anyone out.

Appendix A GNU Free Documentation License

ADDENDUM: How to use this License for your documents

To use this License in a document you have written, include a copy of the License in the document and put the following copyright and license notices just after the title page:

If you have no Invariant Sections, write “with no Invariant Sections” instead of saying which ones are invariant. If you have no Front-Cover Texts, write “no Front-Cover Texts” instead of “Front-Cover Texts being list”; likewise for Back-Cover Texts.

If your document contains nontrivial examples of program code, we recommend releasing these examples in parallel under your choice of free software license, such as the GNU General Public License, to permit their use in free software.

Index