See the SmartGen Cores Reference Guide for additional information on this core.
Parameterized word length
Optional carry-in and carry-out signals
Asynchronous reset
Accumulator enable
Multiple gate-level implementations (speed/area tradeoffs)
Behavioral simulation model in VHDL and Verilog
ACT 1, ACT 2, ACT 3, 3200DX, MX, SX, SX-A, eX, Axcelerator, PA, 500K, ProASIC3/E, Fusion
Port Description |
Port Name |
Size |
Type |
Req/Opt |
Function |
DataA |
WIDTH |
Input |
Req. |
Input Data |
Cin |
1 |
Input |
Opt. |
Carry-in |
Sum |
WIDTH |
Output |
Req. |
Sum |
Cout |
1 |
Output |
Opt. |
Carry-out |
Enable |
1 |
Input |
Opt |
Enable |
Clock |
1 |
Input |
Req. |
Clock |
Aclr |
1 |
Input |
Opt |
Asynchronous Reset |
Parameter Description |
Parameter |
Family |
Value |
Function |
WIDTHA |
500K, PA |
2-128 |
Word length of DataA, DataB and Sum |
Axcelerator |
2-156 |
||
All others |
2-32 |
||
MAXFANOUT |
500K, PA |
0 |
Automatic choice |
2-16 |
Manual setting of Max. Fanout | ||
CI_POLARITY |
ALL |
0 1 2 |
Carry-in polarity (active low, active high, and not used) |
CO_POLARITY
|
ALL |
0 1 2 |
Carry-out polarity (active low, active high, and not used) |
CLR_POLARITY |
|
0 1 2 |
Asynchronous reset (active high, active low, and not used) |
EN_POLARITY |
|
0 1 2 |
Asynchronous enable (active high, active low, and not used) |
FFTYPE |
ALL except Flash |
REGULAR TMR |
FF type used (Regular, Triple Voting) |
CLK_EDGE |
|
RISE FALL |
|
A. The Brent-Kung Accumulator extends the ranges from 32 to 128 bit for SX, SX-A and from 20 to 128 bit for 500K.
B. TMR is Triple Module Redundancy. Choosing this option makes SmartGen use TMR Flip-Flops that are used to avoid Single Event Upsets (SEUs) for Rad-hard Designs. Choosing this option causes the Sequential resource usage to be tripled in families where no TMR is implemented in silicon.
Fan-In Control Parameters |
Parameter |
Value |
CLR_FANIN |
AUTO MANUAL |
CLR_VAL |
<val> [default value for AUTO is 8, 1 for MANUAL] |
EN_FANIN |
AUTO MANUAL |
EN_VAL |
<val> [default value for AUTO is 6, 1 for MANUAL] |
CLK_FANIN |
AUTO MANUAL |
CLK_VAL |
<val> [default value for AUTO is 8, 1 for MANUAL] |
Implementation Parameters |
Parameter |
Family |
ValueJK |
Description |
LPMTYPE |
All |
LPM_ADD_SUB |
Adder category |
LPM_HINT |
500K, PA |
SKACC |
Sklansky model |
FBKACC |
Fast Brent-Kung model | ||
BKACC |
Compact Brent-Kung model | ||
ALL |
FACCA |
Very fast carry select model | |
MFACCA |
Fast carry select model | ||
RIPACC |
Ripple carry model | ||
LPMTYPE |
Axcelerator |
LPM_FC_ADD_SUB |
Fast carry chain Adder category |
LPM_HINT |
FC_FACC |
Fast carry chain carry select model | |
FC_RIPACC |
Fast carry chain ripple carry model |
A. FACC and MFACC are not recommended for Flash devices.
Functional Description |
DataA |
Sumn+1 |
CoutA |
m[width-1 : 0] |
(m + Sumn + Cin )[width-1 : 0] |
(m + Sumn + Cin)[width] |
A. Cin and Cout are assumed to be active high. |