Parameterized word length
Parameterized multiplexer input number
Behavioral simulation model in VHDL and Verilog
ACT 1, ACT 2, ACT 3, 3200DX, MX, SX, SX-A, eX, 500K, PA, Axcelerator, ProASIC3/E, Fusion
|
Port Description |
|
Port Name |
Size |
Type |
Req/Opt |
Function |
|
Data0_port |
WIDTH |
Input |
Req. |
Input data |
|
Data1_port |
WIDTH |
Input |
Req. |
Input data |
|
… |
… |
… |
… |
… |
|
DataSIZE-1_port |
WIDTH |
Input |
Req. |
Input data |
|
Sel0 |
1 |
Input |
Req. |
Select line |
|
Sel1 |
1 |
Input |
Req. |
Select line |
|
… |
… |
… |
… |
… |
|
SelSIZELN-1 |
1 |
Input |
Req. |
Select line |
|
Result |
WIDTH |
Output |
Req. |
Output |
|
Parameter Description |
|
Parameter |
Family |
Value |
Function |
|
WIDTH |
APA, 500K |
1-48 |
Word length of Data |
|
All Others |
1-32 |
||
|
SIZE |
All |
2-32 |
Number of data inputs |
|
Functional Description |
|
Data0 |
Data1 |
… |
DataSIZE-1 |
Sel0 |
Sel1 |
… |
SelSIZELN-1 |
Result |
|
m0 |
m1 |
… |
mSIZE-1 |
0 |
0 |
… |
0 |
m0 |
|
m0 |
m1 |
… |
mSIZE-1 |
1 |
0 |
… |
0 |
m1 |
|
… |
… |
… |
… |
… |
… |
… |
… |
… |
|
m0 |
m1 |
… |
mSIZE-1 |
1 |
1 |
… |
1 |
mSIZE-1 |