Tri-State Buffers

Features

Family Support

ACT2, ACT3, 3200DX, MX, SX, SX-A, eX, 500K, PA, Axcelerator, ProASIC3/E, Fusion

Description

SmartGen generates different types of Input Buffers with specified data width.

Port Description

Port Name

Size

Type

Req/Opt

Function

PAD

WIDTH

Inout

Req.

Inout Data

Data / A (Flash)

WIDTH

Input

Req.

Input Data

Trien / ENABLE (Flash)

1

Input

Req.

Enable

Parameter Description

Parameter

Value

Function

WIDTH

1-99 (Limit may vary depend­ing on the family)

Data Width

VOLT (Flash only)

0,1,2,3,4,5

Choice of different voltage levels. 3.3v (PCI), 3.3v & Low Strength, 2.5v & High Strength*, 2.5v & Low Strength*, 2.5v (Low Power) & High Strength, or 2.5v (Low Power) & Low Strength

SLEW (Flash only)

0,1,2

Choice of the slew rates: Low, Normal, or High

TRIEN_POLARITY / EN_POLARITY
(Flash only)

0,1

Enable Polarity

TYPE (Axcelerator Only)

REG, S_8, S_12, S_16, S_24, F_8, F_12, F_16, F_24, LVCMOS25, LVCMOS18, LVCMOS15, PCI, PCIX, GTLP25, GTLP33, S_8U, S_12U, S_16U, S_24U, F_8U, F_12U, F_16U, F_24U, S_8D, S_12D, S_16D, S_24D, F_8D, F_12D, F_16D, F_24D, LVCMOS25U, LVCMOS25D, LVCMOS18U, LVCMOS18D, LVCMOS15U, LVCMOS15D, HSTL_I, SSTL2_I, SSTL2_II, SSTL3_I, SSTL3_II

Type of Buffer. Note : "S" in S_* denotes Low Slew Rage and "F" in F_* denotes High Slew Rate. Also 8,12,16,24 denote Output drive strengths of 1x, 2x, 3x, 4x respec­tively

* Not supported in ProASICPLUS

Implementation Parameters

Parameter

Value

Function

LPMTYPE

LPM_IO / LPM_OB_IO

Tri-State buffers

LPM_HINT

TRIBUFF / OTB (Flash)

Regular Tri-State Buffers

TRIBUFF_SP (Axcelerator Only)

Special Tri-State Buffers

TRIBUFF_PU (Axcelerator Only)

Pull-up Tri-State Buffers

TRIBUFF_PD (Axcelerator Only)

Pull-down Tri-State Buffers