SmartGen creates the following output files in your project directory when you generate an analog system.
HDL Source Files
<user_name>.vhd/.v – Top level design that combines all the blocks together
<user_name>_assc_wrapper.vhd/.v – Analog system controller instantiation wrapper for this design
<user_name>_smev_wrapper.vhd/.v – Analog system data processing module instantiation
<user_name>_smtr_wrapper.vhd/.v – Analog system data processing module instantiation
<user_name>_assc_ram.vhd/v – Analog system controller RAM
<user_name>_smev_ram.vhd/v – Analog system data processing module RAM
<user_name>_smtr_ram.vhd/v – Analog system data processing module RAM
<workspace_directory/<common>/<Vhdl>/<Verilog>/assc.vhd/v – Analog sample sequence controller file; common file for all analog system cores.
<workspace_directory/<common>/<Vhdl>/<Verilog>/smev.vhd/v – Analog system data processing module file, common for all analog cores.
<workspace_directory/<common>/<Vhdl>/<Verilog>/smtr.vhd/v – Analog system data processing module file, common for all analog cores.
Memory Files
These memory files are used by the NVM system (or any external microprocessor) to initialize the contents of the RAM and AB.
<user_name>_acm_ram.hex/ .s - Intel-hex or Motorola-S memory files for AB Hard IP
<user_name>_assc_ram.hex/ .s - Intel-hex or Motorola-S memory files for ASSC RAM
<user_name>_smev_ram.hex/ .s - Intel-hex or Motorola-S memory files for SMEV RAM
<user_name>_smtr_ram.hex/ .s - Intel-hex or Motorola-S memory files for SMTR RAM
The memory files below are used to initialize the RAM contents for simulation only. These files enable simulation of the Analog system in isolation (there is no need to connect the initialization circuitry).
<user_name>_acm_R0_C0.mem - Memory File for simulation for AB
<user_name>_assc_ram_R*_C*.mem - Memory Files for simulation for ASSC RAM
<user_name>_smev_ram_R*_C*.mem - Memory Files for simulation for SMEV RAM
<user_name>_smtr_ram_R*_C*.mem - Memory Files for simulation for SMTR RAM
Configuration Files
<user_name>.ncf – The embedded Flash configuration file used to communicate information from the Analog System to the NVM system regarding the size of the Analog System Client and the location of the memory content.
<user_name>.cfg – This captures information about the settings that were specified for the system.
<user_name>.gen – The SmartGen GEN file. Enables SmartGen to open the system with your saved specifications.
<user_name>.cxf – The SmartGen Core Configuration file that contains information required by the Libero IDE for file management.
Log Files
The log file contains all the information SmartGen used to generate your system, as well as any messages related to conflicts or system resource limitations. The file is called <user_name>.log.