Conflict: When a GCF constraint is already present in the system with different parameters.
Ambiguity: When multiple valid options are possible for the translation of a GCF constraint.
Alternative: An alternate translation option for a GCF constraint, exported as a comment.
Translates GCF constraints according to the rules numbered by decreasing priority.
Updates Designer with the translated GCF timing constraints.
Generates an SDC file with all timing constraints.
Adds translation details and ambiguities as comments at the end of the generated SDC file.
Verification rule: If a GCF constraint object (net, pin…) is not found, the GCF constraint is skipped and its translation status is set to “Error”.
Matching rule: If a matching constraint exists on the same object, the GCF constraint is skipped and its translation status is set to “OK”.
Conflict rule: If a conflicting constraint exists on the same object, the GCF constraint has higher priority over the existing constraint and the latter is exported as an alternative to the GCF constraint.
A GCF clock constraint on a net is translated into a clock constraint on one of the eligible clocks (Timer potential clocks connected to this net: port, register output, PLL).
Ambiguity rule: If an ambiguity exists on all or a subset of the eligible clocks, one clock is selected and the others are exported as alternatives to the selected option.
If a matching constraint exists on many eligible clocks, the ambiguity rule is applied on this subset of eligible clocks followed by the matching rule.
If a conflicting constraint exists on many eligible clocks, the ambiguity rule is applied on this subset of eligible clocks followed by the conflict rule.
If many eligible clocks exist and none has a constraint, the ambiguity rule is applied on all the eligible clocks.
A low-level set_max_path_delay GCF constraint (max-delay with multiple –through for all pins on the path) is translated into a max-delay with only a –from –to options. For example:
# GCF Constraint: set_max_path_delay 4.000000 s_reg_5.CLK s_reg_5.Q U15.A U15.PAD
# Status: successful
# SDC: set_max_delay 4.000000 -from [get_pins {s_reg_5:CLK}] -to [get_pins {U15:PAD}]
A set_input_to_register_delay GCF constraint is translated into a max-delay constraint. For example:
# GCF Constraint: set_input_to_register_delay 3.000000 -from dat*
# Status: successful
# SDC: set_max_delay 3.000000 -from [get_ports {dat*}] -to [get_clocks {*}]
A set_register_to_output_delay GCF constraint is translated into a max-delay constraint.
# GCF Constraint: set_register_to_output_delay 2.000000 -to out
# Status: successful
# SDC: set_max_delay 2.000000 -from [get_clocks {*}] -to [get_ports {out}]