To access this dialog, from the Edit menu, choose I/O Bank Settings, and then click More Attributes.
Although designed for high performance, the Axcelerator architecture also allows you to place the device into a low-power (LP) mode via a dedicated LP pin. Asserting the LP pin, which is grounded in normal operation, activates LP mode on all the I/O banks. When LP mode is activated, I/O banks are disabled (inputs disabled, outputs tristated), and PLLs are placed in a power-down mode. All internal register states are maintained in this mode. Furthermore, you can configure individual I/O banks to opt out of the LP mode, giving you access to critical signals while the rest of the chip is in LP mode.
Using the following options in the More Attributes dialog box, you can individually configure each I/O bank in an Axcelerator device when in low-power mode:
Low-Power Mode
Enable Input Buffers- Select to enable input buffers. If this option is selected, all used input buffers within this bank will remain enabled whether or not the LP pin is asserted.
Enable Output Buffers - Select to enable output buffers. If this option is selected, all used output buffers within this bank will remain enabled whether or not the LP pin is asserted.
Input Delay
Drag the slider bar to your desired delay. The delay is bank-specific. The delay code and typical value appear. Click View All Delays to see all the delay values (Best, Worst, Typical, Rise-Rise, Fall-Fall) for the input delay selected. You must select a technology to see the input delays.
Note: The Low-Power mode and Input Delay options are not supported in the RTAX-S, ProASIC3E, and ProASIC3 families.
For more information, refer to the datasheet for your device. Datasheets are available from the Actel web site.