ProASIC and ProASICPLUS Compile Options

Include RAM and I/O in Spine and Net Regions

This option affects the behavior of the following:

Selecting Include RAM and I/O in Spine and Net Regions enables you to assign memory and I/O to spine (LocalClock) and net regions.

When this option is selected, Designer applies the use_global and set_net_region constraints to core cells, memory, and I/O. When cleared, Designer applies the use_global and set_net_region constraints to core cells only. For new designs, this box is automatically checked. For designs created with v5.1 or earlier, this option is cleared by default. If you change this default setting, you must recompile your design.

This option also determines whether memory and I/O are included in a LocalClock region that you create with the ChipPlanner tool. If selected, memory and I/O are included. If cleared, they are excluded.