WaveFormer Lite is a special version of WaveFormer Pro that can generate VHDL and Verilog stimulus-based testbenches for Libero IDE. WaveFormer Lite fits perfectly into Libero’s design environment, automatically extracting signal information from your HDL design files and producing HDL test bench code that can be used for VHDL or Verilog simulation. WaveFormer Lite now supports VCD files.
WaveFormer Lite generates VHDL and Verilog testbenches from drawn waveforms. WaveFormer Lite can generate the following:
Reactive testbenches
VHDL transport testbench (*.vhd) that uses assignment statements
VHDL wait testbench (*.vhd) that uses wait statements
Verilog (*.v) file with Verilog stimulus statements
Note: WaveFormer Lite comes with its own online help. After starting WaveFormer Lite, click the Help menu.