Advanced Communication Board Developer Toolkit 

ABSTRACT:  INT2.C                                                            

INT2.C is an interrupt driven SDLC\HDLC terminal program. The base address
is 238 Hex and the IRQ should be jumpered to 5. The interrupt mode jumper
should be set to shared if the ACB is sharing an IRQ or to normal if the ACB
is the only device on the IRQ. Please note that if an ACB is sharing an IRQ
with another device, that device must be disabled when executing this example
program. Other than clocking options, No additional jumpers are needed. To
build the program, the ACB.C and the INT.C files must be built/included from the
\LIBRARY directory. The program will terminate when the "Esc" key is typed
from the keyboard. This program is set up for 19.2K bps. This program will
interrupt on receive characters only. All transmitted characters are sent
in a polling loop in the main() function. All characters received in the
interrupt service routine are stored in the frame buffer until an End of Frame
interrupt is pending. Once the End of Frame is detected, the contents of
the frame buffer is copied to the receive buffer. The buffer size is fixed
at 500 and the frame size is 100. The buffer contents is displayed once the
"Esc" key is pressed. Keep in mind that this example is a very simple
interrupt driven program. Please refer to the DMA and / or interrupt driven
examples for higher throughput
examples.

SDLC\HDLC Note:

Each character that is typed on the keyboard is transmitted as an HDLC frame.
The program may be changed to buffer keyboard characters and send a string
as a frame. Note that the End of Frame interrupt is generated before the
last byte of the 16 bit CRC is received (see the eof_flag variable in the
code). In this example all CRCs are ignored and removed from the frame buffer.
This example is a very simple implementation of SDLC\HLDC. Please note the
structure of the Interrupt Service Routine (ISR). The ISR may be easily
modified to service any SCC interrupt.

Cables:

For SDLC\HDLC mode, transmit, receive, Tx Clock, and Rx Clock are needed. The
program may be used in a stand alone loop-back configuration, or with another
PC with an ACB or SDLC adapter installed. For most ACB adapters use TSET or
TT for an output clock and RxC as an input clock. Please note that TSET
(Transmit Signal Element Timing) is the EIA-530 equivalent of TT, the RS-232
signal Terminal Timing. For a loop-back plug connect the Transmit signal(s)
to the receive signal(s) and the TSET (EIA-530) or TT (RS-232) signal(s) to
the RxC signal(s).

  For Loop-Back Plug:

     For Single Ended (RS-232, MIL-188/114)
	Connect Tx to Rx
	Connect TSET or TT to RxC

     For Differential Interface (RS-530, V.35, MIL-188/C, etc.)
	Connect Tx+ to  Rx+
	Connect Tx- to  Rx-
	Connect TSET+ or TT+ to RxC+
	Connect TSET- or TT- to RxC-

  Point to Point Cable:

     For Single Ended (RS-232, MIL-188/114)
	Connect Tx at point A to Rx at point B
	Connect TSET or TT at point A to RxC at point B
	Connect Tx at point B to Rx at point A
	Connect TSET or TT at point B to RxC at point A

     For Differential Interface (RS-530, V.35, MIL-188/C, etc.)
	Connect Tx+ at point A to Rx+ at point B
	Connect Tx- at point A to Rx- at point B
	Connect TSET+ or TT+ at point A to RxC+ at point B
	Connect TSET- or TT- at point A to RxC- at point B
	Connect Tx+ at point B to Rx+ at point A
	Connect Tx- at point B to Rx- at point A
	Connect TSET+ or TT+ at point B to RxC+ at point A
	Connect TSET- or TT- at point B to RxC- at point A

Dip-Switch and Jumpers:

Note: If a jumper is not listed, that jumper is not relevant to this example.

    ACB-104             ACB-II          ACB-530
	SW1 2,3,4,8 On      SW1 1 On        SW1 2,3,4,8 On
	E3 5,R              E9 On           E1 N or M
					    E3 5

    ACB-III             ACB-IV          ACB-V
	SW2 2,3,4 On        SW1 2,3,4 On    SW1 2,3,4 On
	E8 5,N              E8 5,N          E3 5,N
                            E2 00||0||00

   ACB-VI               ACB-MP          MAXPORT
       SW1 2,3,4,8 On       See Note 2      SW1 2,3,4,8 On
       E9 N or M                            E2 5
       E11 5                                E3 N or M
       See Note 1

   PC-ACB
	Address 238
	IRQ 5
	
Note 1:  The source code must be modified to enable the interrupts on the
       ACB-VI. The ACB-VI has the ability to enable and disable interrupts
       from the on-board status control register.

Note 2: This example sets up an interrupt service routine by replacing a
       vector entry in the interrupt vector table. On a Micro Channel
       Architecture (MCA) computer this is not the recommended method of
       installing an interrupt handler. This example can be modified to chain
       the vector rather than replace / restore. For further assistance,
       please contact technical support at the numbers listed in the
       README.TXT file in the root directory of this diskette.

Note 3: For the PCMCIA cards, Card and Socket services must make sure that the 
	I/O address and IRQ is setup before the program is executed. This program
	is NOT "PC Card aware" (notified when a PCMCIA socket event occurs.


Build Dependencies:

INT2.C
 * BUFFER.C
 * BUFFER.H
 * ACB.OBJ
 * ACB.H
 * INT.OBJ
 * INT.H
 * Z8530.H

 * Denotes that files are located in the \LIBRARY directory.