Advanced Communication Board Developer Toolkit

ABSTRACT:  INTDMA2.C

INTDMA2.C is a half-duplex Direct Memory Access interrupt driven SDLC/HDLC
test program.  The base address 238 Hex and IRQ5 is used for this test. DMA
jumpers on the ACB card should be set for WAIT/REQ on receive for DMA
channel 1.  The "DMA always enabled" jumper on the ACB must be "ON". The
Interrupt on DMA Terminal Count feature on the ACB-530 and the ACB-VI is not
implemented here so that jumper needs to be in the "OFF" position. No
additional jumpers are needed. To build the program, the ACB.C, INT.C, DMA.C, 
and BUFFER.C files must be built/included from the \LIBRARY directory.

This program is set up for SDLC/HDLC at 19.2K bps. This program will transmit
and receive multiple SDLC/HDLC frames. All characters in a SDLC/HDLC frame
are transferred using DMA. Interrupts are used to signal three conditions,
1) the end of a received frame, 2) underrun of the transmitter (loading of
the CRC, 3) the moment that the CRC has been shifted out of the
transmitter and 4) when the transmit buffer is empty. When servicing these
interrupts, the program will transmit the next character in the transmit
frame, buffer the frame and prepare for the next frame, OR disable the device
if the frame buffer is full (receive).

Please note that this example uses half-duplex DMA. The ACB-II only supports
half-duplex DMA.

Cables:

For SDLC\HDLC mode, transmit, receive, Tx Clock, and Rx Clock are needed. The
program may be used in a stand alone loop-back configuration, or with another
PC with an ACB or SDLC adapter installed. For most ACB adapters use TSET or
TT for an output clock and RxC as an input clock. Please note that TSET
(Transmit Signal Element Timing) is the EIA-530 equivalent of TT, the RS-232
signal Terminal Timing. For a loop-back plug connect the Transmit signal(s)
to the receive signal(s) and the TSET (EIA-530) or TT (RS-232) signal(s) to
the RxC signal(s).

  For Loop-Back Plug:

     For Single Ended (RS-232, MIL-188/114)
	Connect Tx to Rx
	Connect TSET or TT to RxC

     For Differential Interface (RS-530, V.35, MIL-188/C, etc.)
	Connect Tx+ to  Rx+
	Connect Tx- to  Rx-
	Connect TSET+ or TT+ to RxC+
	Connect TSET- or TT- to RxC-


Dip-Switch and Jumpers:

Note: If a jumper is not listed, that jumper is not relevant to this example.

    ACB-104             ACB-530             ACB-VI
	SW1 2,3,4,8 On      SW1 2,3,4,8 On      SW1 2,3,4,8 On
	E2 O                E8 0|0000           E9 A,B
	E1 A,B,D            E2 0|0000           E15 00||0000
			    E4 000000||         E16 000000||
			    E5 00||0000

    ACB-III             ACB-IV              ACB-V
	SW2 2,3,4 On        SW1 2,3,4 On        SW1 2,3,4 On
	E10 |00|            E2 00||0||00        E2 1,4
	E6  |0000|          E3 1,4              E1 1,4,6,7
	E4 1,4              E5 1,4,6,7          (See Note 3)
	E5 1,4,6
	E9 1

    ACB-II
        SW1 1 On
        E1  OFF
        E9  ON
        E3  1
        E4  RC, TC
        E7  A
        RTS OFF


   Note 1: The ACB-II does not support Full-Duplex DMA (See file APP_NOTE.TXT)

   Note 2: The ACB-MP and MAXPORT do not support DMA transfers.

   Note 3: The ACB-V can only receive clocks. To use this example
	   modify WR11 to receive transmit or to receive clocks,
	   or contact technical support for a copy of the modification to
	   allow the ACB-V to source clocks. CCITT V.35 does not specify
	   a clock output.

SDLC/HDLC Note:

In this test will transmit the test string ("THE QUICK BROWN FOX...") as a
SDLC/HDLC frame. Note that in the program the DMA Terminal Count is normally
one less than the number of bytes transferred. An example of this is in the
example program DMA1.C the terminal count is TERM_COUNT-1, but in this example
the terminal count is TERM_COUNT+1 on receive. This difference is due to the
2 byte CRC that is appended to each SDLC/HDLC frame. The transmitter will not
have these extra bytes added to the terminal count because the CRC is added
once the transmitter underruns and is an internal function of the SCC (i.e.
the transmission of CRCs is not involved in a DMA transfer).

Build Dependencies:

INTDMA2.C
 * BUFFER.OBJ
 * BUFFER.H
 * ACB.OBJ
 * ACB.H
 * DMA.OBJ
 * DMA.H
 * Z8530.H

 * Denotes that files are located in the \LIBRARY directory.