Advanced Communication Board Developer Toolkit 

ABSTRACT:  DMA2.C

DMA2.C is an Direct Memory Access SDLC\HDLC loop-back program. The base
address is 238 Hex and no IRQ is used for this test. DMA jumpers on the ACB
card should be set for WAIT/REQ on receive for DMA channel 1 and DTR/REQ on
transmit for DMA channel 3.  The "DMA always enabled" jumper on the ACB must
be "ON". No additional jumpers are needed. To build the program, the
ACB.OBJ and the DMA.OBJ file must be linked from the \LIBRARY directory.

This program is set up for SDLC\HDLC at 19.2K bps. This program will transmit
and receive all characters as a SDLC\HDLC frame using DMA. The program will
terminate when the DMA channel 1 has reached Terminal Count or any key on the
keyboard is pressed. Keep in mind that this example is a very simple DMA
program. A combination of DMA and interrupts yields the highest throughput
on an ACB adapter.

Please note that this example uses full duplex DMA. The ACB-II only supports
half duplex DMA. Either the program or your ACB-II should be modified to use
this program. Please refer to the \APP_NOTE directory on this diskette for
details on ACB-II full duplex modifications.

Cables:

For SDLC\HDLC mode, transmit, receive, Tx Clock, and Rx Clock are needed. The
program may be used in a stand alone loop-back configuration, or with another
PC with an ACB or SDLC adapter installed. For most ACB adapters use TSET or
TT for an output clock and RxC as an input clock. Please note that TSET
(Transmit Signal Element Timing) is the EIA-530 equivalent of TT, the RS-232
signal Terminal Timing. For a loop-back plug connect the Transmit signal(s)
to the receive signal(s) and the TSET (EIA-530) or TT (RS-232) signal(s) to
the RxC signal(s).

  For Loop-Back Plug:

     For Single Ended (RS-232, MIL-188/114)
	Connect Tx to Rx
	Connect TSET or TT to RxC

     For Differential Interface (RS-530, V.35, MIL-188/C, etc.)
	Connect Tx+ to  Rx+
	Connect Tx- to  Rx-
	Connect TSET+ or TT+ to RxC+
	Connect TSET- or TT- to RxC-


Dip-Switch and Jumpers:

Note: If a jumper is not listed, that jumper is not relevant to this example.

    ACB-104             ACB-530             ACB-VI
	SW1 2,3,4,8 On      SW1 2,3,4,8 On      SW1 2,3,4,8 On
	E2 O                E8 0|0000           E9 A,B
	E1 A,B,D            E2 0|0000           E15 00||0000
			    E4 000000||         E16 000000||
			    E5 00||0000

    ACB-III             ACB-IV              ACB-V
	SW2 2,3,4 On        SW1 2,3,4 On        SW1 2,3,4 On
	E10 |00|            E2 00||0||00        E2 1,4
	E6  |0000|          E3 1,4              E1 1,4,6,7
	E4 1,4              E5 1,4,6,7          (See Note 3)
	E5 1,4,6
	E9 1

   Note 1: The ACB-II does not support Full-Duplex DMA (See file APP_NOTE.TXT)

   Note 2: The ACB-MP and MAXPORT do not support DMA transfers.

   Note 3: The ACB-V can only receive clocks. To use this example you will
	   either need to modify WR11 to receive transmit and receive clocks,
	   or contact technical support for a copy of the modification to
	   allow the ACB-V to source clocks. CCITT V.35 does not specify
	   a clock output.

SDLC\HDLC Note:

In this test will transmit the test string ("THE QUICK BROWN FOX...") as a
SDLC\HDLC frame. Note that in the program the DMA Terminal Count is normally
one less than the number of bytes transferred. When using SDLC\HDLC you must
add 2 to the DMA Terminal Count before it is written to the DMA controller.
An example of this is in the example program DMA1.C the terminal count is
TERM_COUNT-1,  but in this example the terminal count is TERM_COUNT+1. This
difference is due to the 2 byte CRC that is appended to each SDLC\HDLC frame.

Build Dependencies:

DMA2.C
 * ACB.OBJ
 * ACB.H
 * DMA.OBJ
 * DMA.H
 * Z8530.H

 * Denotes that files are located in the \LIBRARY directory.