AN00011.TXT

Route 56 Developer's Toolkit 1995
    

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Subject: Constructing a Loop-Back Plug for Testing.

Loop-back plugs are diagnostic tools that do just as their name suggests,
they "loop-back" signals from one place on the external connector to another.  
They are required when an "external loop-back test" is performed.  In their 
simplest form only the Transmit Data (TD) and Receive Data signal are "looped"
together.  This is accomplished by taking a wire with the correct gender pin
attached and connecting on the external connector signals TD to RD.  For 
example the RS-232 data loop-back would be pin 2 (TD) to pin 3 (RD).  To 
perform more thorough diagnostic testing more signals can be added to the 
loop-back. The following table diagrams the typical RS-232 Diagnostic 
loop-back.

When constructing a loop-back for testing purposes, first decide which 
signals need to be tested. In most cases, it will be necessary to loop-back
the Transmit and Receive signals. When testing a synchronous protocol such
as HDLC or SDLC, clock signals will be needed. The Route 56 adapter has
three clock signals. When making the loop-back plug, remember if using a 
differential interface, such as RS-422, EIA-530, MIL-188/114 or V.35, 
connect positive signals to positive signals (i.e. TX+ to RX+ and TX- to 
RX-). The following is a listing of common loop-back wiring diagrams. If 
loop-back configuration needed is not listed, or if there are any questions 
concerning the listed examples, please contact technical support at the 
numbers listed in the README.TXT file located in the root directory of 
this disk.

Async Point to Point:

     RS-232				

  Route 56	 DTE	    DCE 	  
  ----------	-----	   -----	
  TD(2) ------	RD(3) ---  RD(2)	 
  RD(3) ------	TD(2) ---  TD(3)	 
  GND(7) ------ GND(7) --- GND(7)	 
					 

	RS-530

   Route 56	   DTE	 	  DCE
   --------	 ---------	--------
   TD+ (14) ---  RD+ (16)  ---	RD+ (14)
   TD- (2)  ---  RD- (3)   ---	RD- (2)
   RD+ (16) ---  TD+ (14)  ---	TD+ (16)
   RD- (3)  ---  TD- (2)   ---	TD- (3)



	RS-232		      
   ------------------------	
   TD(2)   ----------  RD(3)		 
   RD(3)   ----------  TD(2)		 
   RTS(4)  ----------  CTS(5)		
					 
					 
	RS-530		 
    ------------------------		 
    TD+  (14) ----- RD+  (16)
    TD-  (2)  ----- RD-  (3)
    RD+  (16) ----- TD+  (14)
    RD-  (3)  ----- TD-  (2)
    RTS+ (19) ----- CTS+ (13)
    RTS- (4)  ----- CTS- (5)
    CTS+ (13) ----- RTS+ (19)
    CTS- (5)  ----- RTS- (4)


Use the following loop-back connections for sync mode:

    TD  (2)  ------ RD  (3)
    RTS (4)  ------ CTS (5)
    RTS (4)  ------ RI	(22) * 
    DTR (20) ------ DCD (8)	
    DTR (20) ------ DSR (6)
    TXC (15) ------ RXC (17) *
 
 *  Often the TSET signal are used in place of the TXC signals. In this case
    substitute pins 24 for TSET.

When working with RS-422 or RS-530 both sets of differential signals must be 
looped back.  The following example illustrates the RS-530 loop-back.

    TD-  (2)  ------ RD-  (3)
    TD+  (14) ------ RD+  (16)
    RTS- (4)  ------ CTS- (5)
    RTS+ (19) ------ CTS+ (13)
    DTR- (20) ------ DCD- (8)
    DTR+ (23) ------ DCD+ (10)
    DTR- (20) ------ DSR- (6)
    DTR+ (23) ------ DSR+ (22)   
    TXC- (15) ------ RXC- (17) *
    TXC+ (12) ------ RXC+ (9)  *

 *  Often the TSET signals are used in place of the TXC signals. In this case
    substitute pins 11 & 24 for TSET +/-.

To run all Asynchronous Loop-back test samples, only a simple data loop-back 
(TD-RD) is needed.  To run the synchronous loop-back test, the loop-back must
include data and clock signals (TD-RD and TXC-RXC).