Route 56 Developer Toolkit

ABSTRACT:  DLC1.C

DLC1.C is a Direct Memory Access interrupt driven SDLC/HDLC test program.
The base address 300 Hex and IRQ11 is used for this test. To build the 
program, the R56_IO.C file must be linked from the \LIBRARY directory.

Cables:

For SDLC\HDLC mode, transmit, receive, Tx Clock, and Rx Clock are needed. The
program may be used in a stand alone loop-back configuration, or with another
PC with a Route 56 or SDLC adapter installed.  Please note that TSET
(Transmit Signal Element Timing) is the EIA-530 equivalent of TT, the RS-232
signal Terminal Timing. For a loop-back plug connect the Transmit signal(s)
to the receive signal(s) and the TSET (EIA-530) or TT (RS-232) signal(s) to
the RxC signal(s).

  For Loop-Back Plug:

     For Single Ended (RS-232, MIL-188/114)
	Connect Tx to Rx
	Connect TSET or TT to RxC

     For Differential Interface (RS-530, V.35, MIL-188/C, etc.)
	Connect Tx+ to  Rx+
	Connect Tx- to  Rx-
	Connect TSET+ or TT+ to RxC+
	Connect TSET- or TT- to RxC-


Build Dependencies:

DLC1.C
 * R56_IO.C
 * R56_IO.H
 * Z16C32.H

 * Denotes that files are located in the \LIBRARY directory.