;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Sealevel 5010 Test Program R56 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Status: define modem control loopback test when interface approved ;; R56 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; TITLE 5010 DOSSEG include gen.inc include int.inc include r56_io.inc include cpu.inc include Z16C32.inc include sldebug.inc SELECT_V35 equ Port3_PinCtrl_Output1 OR Port2_PinCtrl_Output0 SELECT_EIA530 equ Port3_PinCtrl_Output1 OR Port2_PinCtrl_Output1 SELECT_RS232 equ Port3_PinCtrl_Output0 OR Port2_PinCtrl_Output0 SELECT_X21 equ Port3_PinCtrl_Output1 OR Port2_PinCtrl_Output1 RTS_ON equ Port7_PinCtrl_Output1 RTS_OFF equ Port7_PinCtrl_Output0 DTR_ON equ Port6_PinCtrl_Output1 DTR_OFF equ Port6_PinCtrl_Output0 CTS_OFF equ CTS_PinStatus_Zero CTS_ON equ CTS_PinStatus_One DCD_OFF equ DCD_PinStatus_Zero DCD_ON equ DCD_PinStatus_One TXC_OUTPUT equ Port5_PinCtrl_Output0 P0_IS_CLOCK equ Port0_PinCtrl_CTR0_Clock IFNDEF V35 V35 = 0 ENDIF IFNDEF EIA530 EIA530 = 0 ENDIF IFNDEF RS232 RS232 = 0 ENDIF IF V35 INTERFACE equ SELECT_V35 + P0_IS_CLOCK + TXC_OUTPUT ENDIF IF EIA530 INTERFACE equ SELECT_EIA530 + P0_IS_CLOCK + TXC_OUTPUT ENDIF IF RS232 INTERFACE equ SELECT_RS232 + P0_IS_CLOCK + TXC_OUTPUT ENDIF IFDEF FAST IO_SPEED equ ZERO_WS ELSEIFDEF SLOW IO_SPEED equ NO_ZERO_WS ELSE IO_SPEED equ ZERO_WS ENDIF ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Macros ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; TEST_ERROR MACRO local LAB1 cmp ErrorPointer, 0 jz LAB1 jmp ER_END LAB1: ENDM ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; BitCheckIUSC MACRO Register,ANDER,cmpER, BError LOCAL LABEL1 invoke IUSCin, addr CARD1,Register and ax,ANDER cmp ax,cmpER jz LABEL1 LOG_ERROR BError ret LABEL1: ENDM ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; LOG_ERROR MACRO Berror push bx mov bx, ErrorPointer mov ErrorArray[bx], Berror ; WORD pointer inc bx inc bx mov ErrorPointer, bx pop bx ENDM ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Function Prototypes (program specific) ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; wrt_word PROTO near MemoryTest PROTO C wIOBASE:WORD ClockTest PROTO C wIOBASE:WORD InterruptTest PROTO C wIOBASE:WORD ExternalData PROTO C wIOBASE:WORD InternalData PROTO C wIOBASE:WORD PollTest PROTO C wIOBASE:WORD DMATest PROTO C wIOBASE:WORD CheckDMA PROTO C wIOBASE:WORD, bPAGE:BYTE WriteLink PROTO C, wIOBASE:WORD,wNumBuffers:WORD,wLinkOffset:WORD,bPAGE:BYTE,wBUFFER:WORD, wCC:WORD, bMODE:BYTE PrintDMA proto C, wIOBASE:WORD, bPAGE:BYTE ModemControlTest PROTO C wIOBASE:WORD ErrorCheck PROTO isrForR56Test PROTO FAR ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; TIME_OUT_VALUE equ 0FFh IO_BASE equ 300h TEST_SEGMENT equ 0d000h TXDMA equ 1 RXDMA equ 0 .MODEL SMALL .STACK 100H ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; DATA Segment ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .DATA CARD1 R56_INFO <0d0000000h,far ptr AValues, far ptr isrForR56Test,0,0,IO_BASE,0,0,0,0> SignOn db 'ÉÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍ»',CR,LF db 'º R56 part # 5010 : Base Address - 238 Hex º',CR,LF db 'º IRQ - 3,4,7,10,11,12,15 º',CR,LF db 'º Memory D000-D200, º',CR,LF db 'º NOTE: This test requires a 386 or better. º',CR,LF db 'ÈÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍÍͼ',CR,LF,'$' SM_STATUS db 'Status: $' SM_RESET1 db '5010 adapter reset after $' SM_RESET2 db ' write(s) to Base+3.',CR,LF,'$' SM_IRQ1 db 'IRQ $' SM_IRQ2 db ' is not responding.',CR,LF,'$' ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Debug Messages ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; DM_ERRERR db 'Debug log is corrupt!',CR,LF,'$' DM_PREERROR db 0ah,0dh,'DEBUG: $' ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Error Messages ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; EM_ERRERR db 'Error log is corrupt!',CR,LF,'$' EM_PASSED db CR,LF,'Passed.',CR,LF,BEL,'$' EM_FAILED db CR,LF,'Failed.',CR,LF,BEL,BEL,BEL,'$' EM_PREERROR db 0ah,0dh,'Error: $' EM_NOERROR db 'No Errors.',CR,LF,'$' EM_BADCPU db 'This test requires a 80286 or higher.',CR,LF,'$' EM_BADRESET db 'The RESET signal to the IUSC is always ON.',CR,LF,'$' EM_RESETTO db 'The RESET signal failed to turn OFF, reset time out.',CR,LF,'$' EM_BADIO db 'The Base I/O address of the 5010 adapter is not responding.',CR,LF,'$' EM_INTERNAL db 'Internal polled data loopback test failed.',CR,LF,'$' EM_EXTERNAL db 'External polled data loopback test failed.',CR,LF,'$' EM_CLOCK db 'Failure testing clocks.',CR,LF,'$' EM_DMA db 'DMA transfer failure.',CR,LF,'$' EM_BADMEM db 'The Memory address range of the 5010 adapter is not responding.',CR,LF,'$' EM_BADCKSUM db 'Checksum error testing onboard RAM.',CR,LF,'$' EM_BADIRQ db 'Failure testing IRQ signal.',CR,LF,'$' EM_INIT db 'IUSC Initilization Failure.',CR,LF,'$' IF V35 EM_INTERFACE db 'Testing V.35 Modem Control Signals.',CR,LF,EOL ELSEIF EIA530 EM_INTERFACE db 'Testing EIA-530 Modem Control Signals.',CR,LF,EOL ELSEIF RS232 EM_INTERFACE db 'Testing RS-232 Modem Control Signals.',CR,LF,EOL ENDIF EM_HEADER db 'Incorrect jumper settings, check test procedure and re-test.',CR,LF,'$' EM_RTS1 db 'RTS=0,DTR=0,Failure resetting RTS and DTR.',CR,LF,'$' EM_RTS2 db 'RTS=1,DTR=0,Failure setting RTS.',CR,LF,'$' EM_DTR1 db 'RTS=0,DTR=1,Failure setting DTR.',CR,LF,'$' EM_RTSCTS db 'RTS=0,DTR=0,Expecting DCD and CTS to be off.',CR,LF,'$' EM_RTSCTS1 db 'RTS=1,DTR=0,Expecting CTS=1 and DCD=0.',CR,LF,'$' EM_RTSCTS2 db 'RTS=0,DTR=1,Expecting CTS=0 and DCD=1.',CR,LF,'$' EM_RTSRI db 'RTS - RI failure.',CR,LF,'$' EM_DTRTM db 'DTR - TM failure.',CR,LF,'$' EM_DTRDSR db 'DTR - DSR failure.',CR,LF,'$' EM_DTRDCD db 'DTR - DCD failure.',CR,LF,'$' EM_PARITY db 'Parity Error.',CR,LF,'$' EM_TXTO db 'Time out waiting for Transmitter to become empty.',CR,LF,'$' EM_RXTO db 'Time out waiting for Receiver to empty.',CR,LF,'$' EM_BADMEM2 db CR,LF,'Error at address $' EM_BADMEM3 db ':$' EM_BADMEM4 db ' on page $' EM_BADMEM5 db '.',CR,LF,'$' ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; MAX_DEBUG equ 010h ; Maximum number of error conditions DebugArray dw (MAX_Debug * 2) DUP(0) DebugPointer dw 0 MAX_ERRORS equ 010h ; Maximum number of error conditions ErrorArray dw (MAX_ERRORS * 2) DUP(0) ErrorPointer dw 0 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; Initialization string for the IUSC ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; EVEN IValues dw BCR +writeW, BRQ_Signal_TotemPole + \ BusWidth_16BitBus + \ IRQ_Signal_OpenDrain + \ ShiftedAddr_ShiftRightMode ; bus configuration dw PCR +writeW+checkW, Port7_PinCtrl_Output1 + \ ; RTS off Port6_PinCtrl_Output1 + \ ; DTR off Port5_PinCtrl_Output0 + \ ; Enable TxC driver to modem Port3_PinCtrl_Output1 + \ ; balanced TxD,TxC drive (RS-449, V.35, X.21) Port2_PinCtrl_Output1 + \ ; balanced RTS,DTR drive (RS-449, X.21) Port1_PinCtrl_Output0 + \ ; Drive P1 low, not used Port0_PinCtrl_CTR0_Clock ; P0 is on board OSC input dw IOCR+writeW+checkW, TxC_PinControl_TxClkOutput + \ TxD_PinControl_Output1 ; block serial data out for internal loopback dw CCSR+writeW+checkL, RCC_FIFO_Clear_Reset + \ ; PORT0_1BypassCTR_Yes ; use P0 clock not CTR0 dw CMCR+writeW+checkW, BRG0_ClkSource_CTR0_Output + \ TxClkSource_BRG0_Output+ \ RxClkSource_BRG0_Output IF RS232 dw TC0R+writeW+checkW, 0150 ; 16/(10+1)=1.4545... Mbps dw TC0R+writeW+checkW, 0150 ; 16/(10+1)=1.4545... Mbps ELSE dw TC0R+writeW+checkW, 010 ; 16/(10+1)=1.4545... Mbps dw TC0R+writeW+checkW, 010 ; 16/(10+1)=1.4545... Mbps ENDIF dw HCR +writeW+checkW, BRG0_Enable_Yes ; enable BRG0 dw CCR +writeW+checkW, TxCtrlBlockXfer_2WordCtrlBlock+ \ RxStatBlockXfer_2WordStatBlock dw CMR +writeW+checkW, TxMode_HDLC+ \ ; Rx HDLC operation TxUnderCondHDLC_ExtendedAbort+ \ RxMode_HDLC ; Rx HDLC operation dw RICR+checkH, 0 ; Make sure Rx FIFO is empty dw RCSR+writeW, RxCommand_SelectIntLevel+ \ 1FFH ; unlatch all status flags dw RICR+writeW+checkW, 31* 100h+ \ StatusOn_Words+ \ RxOverrunIA_Yes ; arm overrun dw RCSR+writeH, RxCommand_SelectReqLevel dw RICR+writeH+checkH, 11* 100h ; RxDMA 12 bytes in FIFO dw RCSR+writeH, RxCommand_SelectFilLevel dw RICR+checkH, 0 ; check fill level 0 dw RCLR+writeW+checkW, -1 dw TICR+checkH, 32* 100h ; check Tx FIFO empty dw TCSR+writeW, TxCommand_SelectIntLevel+ \ 0FFh dw TICR+writeW+checkW, 31* 100h+ \ TxUnderrunIA_Yes ; arm underrun dw TCSR+writeH, TxCommand_SelectReqLevel dw TICR+writeH+checkH, 11* 100h ; TxDMA 12 bytes in FIFO dw TCSR+writeH, TxCommand_SelectFilLevel dw TICR+checkH, 32* 100h ; check TX emptiness level dw DCCR+writeW, IP_Command_ResetIP_IUS+ \ 3FH ; clear all serial IP & IUS dw DCR +writeW+checkW, BinaryValueOrder_Z80_Intel+ \ ChannelPriority_Rx ; IF LList dw RDMR+writeW+checkW, RxChannelMode_LinkedList+ \ RxDMAAdvStatHdl_Yes+ \ RxTermEnable_Yes dw TDMR+writeW+checkW, TxChannelMode_LinkedList+ \ TxDMAAdvStatHdl_Yes ; ELSEIF ; dw RDMR+writeW+checkW, RxChannelMode_Array+ \ ; RxDMAAdvStatHdl_Yes+ \ ; RxTermEnable_Yes ; dw TDMR+writeW+checkW, TxChannelMode_Array+ \ ; TxDMAAdvStatHdl_Yes ; ENDIF dw CCAR+writeW, ChannelCommand_SelctD7_0_1st+ \ ModeControl_IntLocalLpback dw CCAR+checkH, ModeControl_IntLocalLpback ; check CCAR readback dw TMR +writeW+checkW, TxCRC_Polynomial_CRC_CCITT+ \ TxCRC_PresetVal_Ones+ \ TxCRC_Enable_Yes+ \ TxCRC_On_EOF_EOM_Yes+ \ TxEnable_Enable dw RMR +writeW+checkW, RxCRC_Polynomial_CRC_CCITT+ \ RxCRC_PresetVal_Ones+ \ RxCRC_Enable_Yes+ \ RxAbortHandling_Yes + \ RxEnable_Enable dw -1 ; end of table EVEN AValues dw BCR +writeW, BRQ_Signal_TotemPole + \ BusWidth_16BitBus + \ IRQ_Signal_OpenDrain + \ ShiftedAddr_ShiftRightMode ; bus configuration dw PCR +writeW+checkW, Port7_PinCtrl_Output1 + \ ; RTS off Port6_PinCtrl_Output1 + \ ; DTR off Port5_PinCtrl_Output0 + \ ; Enable TxC driver to modem Port3_PinCtrl_Output1 + \ ; balanced TxD,TxC drive (RS-449, V.35, X.21) Port2_PinCtrl_Output1 + \ ; balanced RTS,DTR drive (RS-449, X.21) Port1_PinCtrl_Output0 + \ ; Drive P1 low, not used Port0_PinCtrl_CTR0_Clock ; P0 is on board OSC input dw IOCR+writeW+checkW, TxC_PinControl_TxClkOutput + \ TxD_PinControl_Output1 ; block serial data out for internal loopback ;TxD_PinControl_TxDataOutput ; dw CCSR+writeW+checkL, RCC_FIFO_Clear_Reset + \ ; PORT0_1BypassCTR_Yes ; use P0 clock not CTR0 dw CMCR+writeW+checkW, BRG0_ClkSource_CTR0_Output + \ TxClkSource_BRG0_Output+ \ RxClkSource_BRG0_Output IF RS232 dw TC0R+writeW+checkW, 0150 ; 16/(10+1)=1.4545... Mbps dw TC0R+writeW+checkW, 0150 ; 16/(10+1)=1.4545... Mbps ELSE dw TC0R+writeW+checkW, 010 ; 16/(10+1)=1.4545... Mbps dw TC0R+writeW+checkW, 010 ; 16/(10+1)=1.4545... Mbps ENDIF dw HCR +writeW+checkW, BRG0_Enable_Yes ; enable BRG0 dw CCR +writeW+checkW, TxCtrlBlockXfer_2WordCtrlBlock+ \ RxStatBlockXfer_2WordStatBlock dw CMR +writeW+checkW, TxMode_Asynchronous+ \ ; Rx HDLC operation TxStopBitsAsync_One+ \ TxClockRateAsync_DataRate16X+ \ RxClockRateAsync_DataRate16X+ \ RxMode_Asynchronous ; Rx HDLC operation dw RICR+checkH, 0 ; Make sure Rx FIFO is empty dw RCSR+writeW, RxCommand_SelectIntLevel+ \ 1FFH ; unlatch all status flags dw RICR+writeW+checkW, 31* 100h dw RCSR+writeH, RxCommand_SelectReqLevel dw RICR+writeH+checkH, 1 * 100h ;30 ; RxDMA 12 bytes in FIFO dw RCSR+writeH, RxCommand_SelectFilLevel dw RICR+checkH, 0 ; check fill level 0 dw RCLR+writeW+checkW, -1 dw TICR+checkH, 31* 100h ; check Tx FIFO empty dw TCSR+writeW, TxCommand_SelectIntLevel+ 0FFh dw TICR+writeW+checkW, 31* 100h dw TCSR+writeH, TxCommand_SelectReqLevel dw TICR+writeH+checkH, 31* 100h ;31 ; TxDMA 12 bytes in FIFO dw TCSR+writeH, TxCommand_SelectFilLevel dw TICR+checkH, 32* 100h ; check TX emptiness level dw DCCR+writeW, IP_Command_ResetIP_IUS+ \ 3FH ; clear all serial IP & IUS dw DCR +writeW+checkW, BinaryValueOrder_Z80_Intel+ \ ChannelPriority_Rx ; IF LList dw RDMR+writeW+checkW, RxChannelMode_LinkedList+ \ RxDMAAdvStatHdl_Yes+ \ RxTermEnable_Yes dw TDMR+writeW+checkW, TxChannelMode_LinkedList+ \ TxDMAAdvStatHdl_Yes ; ELSEIF ; dw RDMR+writeW+checkW, RxChannelMode_Array+ \ ; RxDMAAdvStatHdl_Yes+ \ ; RxTermEnable_Yes ; dw TDMR+writeW+checkW, TxChannelMode_Array+ \ ; TxDMAAdvStatHdl_Yes ; ENDIF dw CCAR+writeW, ChannelCommand_SelctD7_0_1st+ \ ModeControl_IntLocalLpback dw CCAR+checkH, ModeControl_IntLocalLpback ; check CCAR readback dw TMR +writeW+checkW, TxEnable_Enable dw RMR +writeW+checkW, RxEnable_Enable dw -1 ; end of table ;ModeControl_NormalOp ; ;ModeControl_NormalOp ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; PresentIRQ db 10 IRQptr db 0 IRQTable db 3,3,9,10,11,11,11, 0 ;BugBug: replace IRQ3 with IRQ4 for real test. ValueTable db SEL_IRQ_3, SEL_IRQ_3, SEL_IRQ_9, SEL_IRQ_10 db SEL_IRQ_11, SEL_IRQ_11, SEL_IRQ_11, 0 IRQCount dw 0 DMAAddressTable dd 00000000h ;Page 0 dd 00004000h ;Page 1 >4 Tx dd 00008000h ;Page 2 >8 Tx dd 0000c000h ;Page 3 >12 Tx dd 00010000h ;Page 4 >16 Rx dd 00014000h ;Page 5 >20 Rx dd 00018000h ;Page 6 >24 Rx dd 0001c000h ;Page 7 dd 00020000h ;Page 8 dd 00024000h ;Page 9 dd 00028000h ;Page 10 dd 0002c000h ;Page 11 dd 00030000h ;Page 12 dd 00034000h ;Page 13 dd 00038000h ;Page 14 dd 0003c000h ;Page 15 DMAAddressTable2 dd 00000000h ;Page 0 dd 00000040h ;Page 1 >4 Tx dd 00000080h ;Page 2 >8 Tx dd 000000c0h ;Page 3 >12 Tx dd 01000000h ;Page 4 >16 Rx dd 01000040h ;Page 5 >20 Rx dd 01000080h ;Page 6 >24 Rx dd 010000c0h ;Page 7 dd 02000000h ;Page 8 dd 02000040h ;Page 9 dd 02000080h ;Page 10 dd 020000c0h ;Page 11 dd 03000000h ;Page 12 dd 03000040h ;Page 13 dd 03000080h ;Page 14 dd 030000c0h ;Page 15 TestLength equ offset TestTxBuffer - offset TestRxBuffer TestRxBuffer db 50 dup (0),'$' TestTxBuffer db 'ABCDEFGHIGHLMNOPQRSTUVWXYZ01234$' TestDMATx db 'The quick brown fox jumped over the lazy dogs back' TestDMARx db ' ' FRAME_LENGTH equ offset TestDMARx - offset TestDMATx ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; CODE Segment ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; .CODE START: mov ax, @DATA mov ds, ax INVOKE cls INVOKE wrt_mess, offset SignOn INVOKE GetCPU cmp al, PROC_80386 jge @f LOG_ERROR offset EM_BADCPU TEST_ERROR @@: INVOKE VerifyR56, addr CARD1 ; Test for board presence cmp al, 0 jz @f LOG_ERROR offset EM_BADIO TEST_ERROR @@: INVOKE ResetIUSC, addr CARD1 ; test al, ER_BADRESET jz @f LOG_ERROR offset EM_BADRESET ; Return Error Code @@: test al, ER_RESETTO jz @f LOG_ERROR offset EM_RESETTO ; Reset timeout error @@: TEST_ERROR ; Possibly make this message optional. push dx INVOKE wrt_mess, offset SM_RESET1 pop dx mov ax, dx INVOKE wrt_hex INVOKE wrt_mess, offset SM_RESET2 INVOKE InitIUSC, addr CARD1 cmp ax, 0 jz @f LOG_ERROR offset EM_INIT INVOKE wrt_word TEST_ERROR @@: INVOKE MemoryTest, IO_BASE TEST_ERROR INVOKE InternalData, IO_BASE TEST_ERROR ;Set up for External INVOKE ExternalData, IO_BASE TEST_ERROR INVOKE ClockTest, IO_BASE TEST_ERROR INVOKE ModemControlTest, IO_BASE TEST_ERROR INVOKE InterruptTest, IO_BASE TEST_ERROR INVOKE ClockTest, IO_BASE TEST_ERROR INVOKE DMATest, IO_BASE TEST_ERROR INVOKE wrt_mess, offset EM_PASSED mov ax, 4c00h int 21h ER_END: mov dx, IO_BASE mov al, MEM_WIN_ON OR IUSC_DISABLE OR MEM_PAGE_0 out dx, al IO_Pause inc dx mov al, SEL_IRQ_NONE OR MEM_LO_D000 out dx, al IO_Pause inc dx mov al, LOADD OR EN_16_BIT OR IO_SPEED OR ISA_IRQ out dx, al IO_Pause call ErrorCheck mov ah, 4ch int 21h ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ExternalData PROC C PUBLIC USES DX, wIOBASE:WORD INVOKE IUSCout,addr CARD1,IOCR,TxC_PinControl_TxClkOutput OR TxD_PinControl_TxDataOutput INVOKE IUSCout,addr CARD1,CCAR, ModeControl_NormalOp INVOKE PollTest, IO_BASE or ax, ax jz @f LOG_ERROR offset EM_EXTERNAL @@: ret ExternalData ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; InternalData PROC C PUBLIC USES DX, wIOBASE:WORD ;; Set up for Internal Test INVOKE IUSCout,addr CARD1,IOCR, TxC_PinControl_TxClkOutput OR TxD_PinControl_Output1 INVOKE IUSCout,addr CARD1,CCAR, ModeControl_IntLocalLpback INVOKE PollTest, IO_BASE or ax, ax jz @f LOG_ERROR offset EM_INTERNAL @@: ret InternalData ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ClockTest ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ClockTest PROC C PUBLIC USES DX, wIOBASE:WORD mov dx, wIOBASE ;; Set up for Internal Test INVOKE IUSCout,addr CARD1,IOCR, TxC_PinControl_TxClkOutput OR TxD_PinControl_Output1 INVOKE IUSCout,addr CARD1,CCAR, ModeControl_IntLocalLpback ;Select TxC output / Select interface / RTS On INVOKE IUSCout, addr CARD1, PCR, INTERFACE + RTS_ON + DTR_OFF ;Select Tx and Rx Clocks INVOKE IUSCout, addr CARD1, CMCR, BRG0_ClkSource_CTR0_Output + TxClkSource_BRG0_Output+ RxClkSource_RxC_Pin INVOKE PollTest, IO_BASE push ax ;; Reset to normal INVOKE IUSCout,addr CARD1,IOCR,TxC_PinControl_TxClkOutput OR TxD_PinControl_TxDataOutput INVOKE IUSCout,addr CARD1,CCAR, ModeControl_NormalOp pop ax cmp ax, 0 jz CT1 LOG_ERROR offset EM_CLOCK CT1: ret ClockTest ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; MemoryTest : ;; This routine will test 256K of onboard memory in the low ;; (paged) address mode. ;; BugBug: possibly test several (all) memory ranges. ;; BugBug: possibly test several other memory modes (ZERO WAIT STATE) ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; MemoryTest PROC C PUBLIC USES DX, wIOBASE:WORD mov dx, wIOBASE add dx, 2 ; Base +2 mov al, LOADD OR EN_16_BIT OR IO_SPEED OR ISA_IRQ out dx, al IO_Pause sub dx, 1 mov al, MEM_LO_D000 OR SEL_IRQ_NONE out dx, al ; Base +1 IO_Pause sub dx, 1 mov al, IUSC_DISABLE OR MEM_WIN_ON OR MEM_PAGE_FIRST out dx, al ; Base +0 IO_Pause mov ax, TEST_SEGMENT mov es, ax mov cx, MEM_PAGE_FIRST MG2: cmp cx, MEM_PAGE_LAST jg MG1 INVOKE ChangeR56Page, addr CARD1, cl xor di, di @@: mov word ptr es:[di], 55aah ; Write cmp word ptr es:[di], 55aah ; Verify jnz MER mov word ptr es:[di], 0aa55h ; Write cmp word ptr es:[di], 0aa55h ; Verify jnz MER mov byte ptr es:[di], cl ; Write cmp byte ptr es:[di], cl ; Verify jnz MER add di, 2 cmp di, R56_PAGE_SIZE ; Is this the end of the page jle @b inc cx ; Goto next page jmp MG2 MG1: xor ax, ax ; Return no error ret MER: push cx push di push es INVOKE wrt_mess, offset EM_BADMEM2 pop ax call wrt_word INVOKE wrt_mess, offset EM_BADMEM3 pop ax call wrt_word INVOKE wrt_mess, offset EM_BADMEM4 pop ax call wrt_word INVOKE wrt_mess, offset EM_BADMEM5 LOG_ERROR offset EM_BADMEM mov ax, 1 ret MemoryTest ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; wrt_word PROC near push ax xchg ah, al INVOKE wrt_hex pop ax INVOKE wrt_hex ret wrt_word ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; isrForR56Test : far : Interrupt Service Routine ;; Note: this ISR assumes that the R56 memory window is on ;; and the IUSC registers are visible. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; isrForR56Test PROC FAR PUSH AX PUSH BX PUSH CX PUSH DX PUSH SI PUSH DI PUSH BP PUSH DS PUSH ES MOV AX,@DATA MOV DS,AX ;--------------------------------- inc word ptr IRQCount mov dx, TEST_SEGMENT mov es, dx mov ax, RxStatusIP_Yes OR IP_Command_ResetIP mov es:[DCCR], ax ;--------------------------------- mov al, 20h cmp PresentIRQ, 7 jle @f out 0a0h,al @@: out 20h, al POP ES POP DS POP BP POP DI POP SI POP DX POP CX POP BX POP AX iret isrForR56Test ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; InterruptTest : Distance is model dependant ;; This will test the IRQ on the R56 adapter. All interrupt ;; tests are performed at D000. The memory range should have ;; been tested in MemoryTest. ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; InterruptTest PROC C PUBLIC USES DX, wIOBASE:WORD mov dx, wIOBASE inc dx mov al, MEM_LO_D000 OR SEL_IRQ_NONE out dx, al ; Base +1 IO_Pause mov al, MEM_WIN_ON OR MEM_PAGE_FIRST dec dx out dx, al IO_Pause mov ax, TEST_SEGMENT mov es, ax mov byte ptr IRQptr, 0 ;test to make sure int is not pending on PIC and IUSC TopIRQ: mov word ptr IRQCount,0 xor bx, bx mov bl, IRQptr mov al, byte ptr IRQTable[bx] cmp al, 0 jz EndIRQ mov PresentIRQ, al mov al, ValueTable[bx] or al, MEM_LO_D000 mov dx, wIOBASE inc dx out dx, al IO_Pause mov word ptr es:[ICR],MasterIntEnable_Yes+IE_Command_SetIE+RxStatusIE_Yes INVOKE SaveIRQMask INVOKE IRQSetupEx, PresentIRQ, addr isrForR56Test mov cx, 10 @@: mov word ptr es:[DCCR], RxStatusIP_Yes OR IP_Command_SetIP call Delay2 call Delay2 loop @b ; loop here until I get 10 interrupts mov word ptr es:[DCCR], RxStatusIP_Yes OR IP_Command_ResetIP mov word ptr es:[ICR], IE_Command_ResetIE+RxStatusIE_Yes INVOKE IRQUnsetup, PresentIRQ INVOKE ReturnIRQMask cmp word ptr IRQCount,10 jl @f inc byte ptr IRQptr jmp TopIRQ ret @@: INVOKE wrt_mess, offset SM_IRQ1 mov al, PresentIRQ INVOKE wrt_hex INVOKE wrt_mess, offset SM_IRQ2 LOG_ERROR offset EM_BADIRQ EndIRQ: ret InterruptTest ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; PollTest : ;; This routine will test on board Data transfers (Polled) in ;; the R56 adapter. All tests are performed at D000. ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; PollTest PROC C PUBLIC USES DX, wIOBASE:WORD mov dx, wIOBASE in al, dx ; Read Value at 1st I/O location jmp short $+2 jmp short $+2 mov al, IUSC_ENABLE OR MEM_WIN_ON OR MEM_PAGE_FIRST out dx, al ; Turn memory window ON and point to first page IO_Pause inc dx mov al, MEM_LO_D000 OR SEL_IRQ_NONE out dx, al IO_Pause inc dx mov al,LOADD OR EN_16_BIT OR IO_SPEED OR ISA_IRQ ;EN0W8+EN16+EDGEY out dx, al ; make it go fast and set low address mode IO_Pause dec dx dec dx ; back to Base I/O address ;Display message to video ;Set / Check Modem Interface ; Now enable the appropriate line drivers by setting bits in PCR INVOKE IUSCout, addr CARD1, PCR, INTERFACE + RTS_ON + DTR_OFF call Delay2 mov si, offset TestTxBuffer mov ax, TEST_SEGMENT mov es, ax mov cx, 30 ;15 @@: mov al, byte ptr [si] ; get char from buffer mov byte ptr es:[TDR],al ; send the char inc si ;inc si loop @b ; call Delay2 ; call Delay2 call Delay2 xor bx, bx mov si, offset TestRxBuffer mov cx, 30 ; 15 ;TestLength / 2 @@: mov al, byte ptr es:[RDR] mov byte ptr [si], al ;inc si inc si loop @b mov al, '$' inc si mov [si], al mov si, offset TestRxBuffer mov di, offset TestTxBuffer mov cx, 30 @@: mov al, [di] cmp al, [si] jnz @f inc si inc di loop @b xor ax, ax ret @@: INVOKE wrt_mess, offset TestRxBuffer mov ax, 0ffh ret PollTest ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; DMATest : ;; This routine will test on board DMA of the R56 adapter. ;; All DMA tests are performed at D000. ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; DMATest PROC C PUBLIC USES ES AX DX, wIOBASE:WORD mov dx, wIOBASE in al, dx ; Read Value at 1st I/O location jmp short $+2 jmp short $+2 mov al, IUSC_DISABLE OR MEM_WIN_ON OR MEM_PAGE_FIRST out dx, al ; Turn memory window ON and point to first page IO_Pause inc dx mov al, MEM_LO_D000 OR SEL_IRQ_NONE out dx, al IO_Pause inc dx mov al,LOADD OR EN_16_BIT OR IO_SPEED OR ISA_IRQ ;EN0W8+EN16+EDGEY out dx, al ; make it go fast and set low address mode IO_Pause dec dx dec dx ; back to Base I/O address mov ax, TEST_SEGMENT mov es, ax INVOKE ChangeR56Page, addr CARD1, MEM_PAGE_0 ; 1) Setup buffers and link list array ;TRAP mov al, IUSC_ENABLE OR MEM_WIN_ON OR MEM_PAGE_FIRST mov dx, wIOBASE out dx, al IO_Pause ;INVOKE IUSCout, addr CARD1, DCAR, DMA_ChannelCmd_PauseBoth INVOKE IUSCout, addr CARD1, PCR, INTERFACE + RTS_ON + DTR_OFF call Delay2 mov al, IUSC_DISABLE OR MEM_WIN_ON OR MEM_PAGE_FIRST mov dx, wIOBASE out dx, al IO_Pause INVOKE WriteLink, wIOBASE,3, 0200h, 1,offset TestDMATx, FRAME_LENGTH, TXDMA INVOKE WriteLink, wIOBASE, 3,300h, 5,offset TestDMARx, FRAME_LENGTH, RXDMA call ShowDMABuffers ; 2) program IUSC mov al, IUSC_ENABLE OR MEM_WIN_ON OR MEM_PAGE_FIRST mov dx, wIOBASE out dx, al IO_Pause call Delay2 mov ax, TEST_SEGMENT mov es, ax INVOKE IUSCout, addr CARD1, NTARU, 00h INVOKE IUSCout, addr CARD1, NTARL, 0200h INVOKE IUSCout, addr CARD1, NRARU, 00h INVOKE IUSCout, addr CARD1, NRARL, 0300h ; 3) start transfer mov ax, TEST_SEGMENT mov es, ax or word ptr es:[CCAR],ChannelCommand_LoadTxCharCt ;INVOKE IUSCout, addr CARD1, CCAR, ChannelCommand_LoadTxCharCt + ModeControl_NormalOp ;ModeControl_IntLocalLpback ;INVOKE IUSCin, addr CARD1, TCCR ;call wrt_word INVOKE IUSCout, addr CARD1, DCAR, DMA_ChannelCmd_StartInitBoth + MasterBusReqEn_Yes ; 4) monitor status ;TRAP mov al, IUSC_ENABLE OR MEM_WIN_ON OR MEM_PAGE_FIRST mov dx, wIOBASE out dx, al IO_Pause mov cx, 100h ;100h JASON @@: INVOKE CURSOR, 1500h ;100h JASON ;INVOKE IUSCin, addr CARD1, RCCR ;call wrt_word ;INVOKE IUSCin, addr CARD1, TCCR ;call wrt_word call Delay2 ;call Delay2 ;call Delay2 ;call Delay2 loop @b ; 5) stop transfer and turn IUSC off mov al, IUSC_ENABLE OR MEM_WIN_ON OR MEM_PAGE_FIRST mov dx, wIOBASE out dx, al IO_Pause INVOKE IUSCout, addr CARD1, DCAR, DMA_ChannelCmd_PauseBoth ; 6) check data mov al, IUSC_DISABLE OR MEM_WIN_ON OR MEM_PAGE_FIRST mov dx, wIOBASE out dx, al IO_Pause call ShowDMABuffers INVOKE CheckDMA, IO_BASE, 5 cmp ax, 0 jz @f LOG_ERROR offset EM_DMA jmp eerdma @@: INVOKE CheckDMA, IO_BASE, 6 cmp ax, 0 jz @f LOG_ERROR offset EM_DMA jmp eerdma @@: INVOKE CheckDMA, IO_BASE, 7 cmp ax, 0 jz @f LOG_ERROR offset EM_DMA jmp eerdma @@: eerdma: mov al, IUSC_ENABLE OR MEM_WIN_ON OR MEM_PAGE_FIRST mov dx, wIOBASE out dx, al IO_Pause ret DMATest ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ShowDMABuffers proc near INVOKE CURSOR, 0a00h INVOKE PrintDMA, IO_BASE, 1 INVOKE CURSOR, 0b00h INVOKE PrintDMA, IO_BASE, 2 INVOKE CURSOR, 0c00h INVOKE PrintDMA, IO_BASE, 3 INVOKE CURSOR, 0d00h INVOKE PrintDMA, IO_BASE, 5 INVOKE CURSOR, 0e00h INVOKE PrintDMA, IO_BASE, 6 INVOKE CURSOR, 0f00h INVOKE PrintDMA, IO_BASE, 7 INVOKE CURSOR, 01000h ret ShowDMABuffers ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; WriteLink : ;; This routine will put a link list array of nNumBuffers + 1 on the first ;; (0) page. Each buffer in the link starts on a new page. The starting ;; buffer is specified by bPage. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; WriteLink proc C USES AX BX CX DX SI DI ES, wIOBASE:WORD,wNumBuffers:WORD,wLinkOffset:WORD,bPAGE:BYTE,wBUFFER:WORD, wCC:WORD, bMODE:BYTE .386 mov ax, TEST_SEGMENT mov es, ax xor ebx, ebx mov bx, wLinkOffset ; ebx=link offset mov cx, wNumBuffers ; cx=Number of Buffers xor dx, dx mov dl, bPAGE ;Starting Page TD1: mov si, offset DMAAddressTable push bx ; save onboard mem offset push dx ; 'mul' writes on DX mov bx, dx ; put page # in bx mov ax, 4 ; adjust for word ptr mul bx ; mov bx, ax ; mov result to bx mov eax, [si+bx] ; get address of selected page pop dx ; restore dx pop bx ; restor onboard mem offset mov es:[bx], eax ; write buffer address add bx, 4 mov ax, wCC mov word ptr es:[bx], ax ; write frame length add bx, 2 ; ;mov word ptr es:[bx],04000h ; set Control or Status (word) mov word ptr es:[bx],0000h ; set Control or Status (word) add bx, 2 mov word ptr es:[bx], ax ; TCC/RCC not used add bx, 2 mov word ptr es:[bx], 0FFFFh ; TCC/RCC not used add bx, 6 ; point to next link mov es:[bx-4], ebx ; write address of next link to current link INVOKE ChangeR56Page, addr CARD1, dl ; change to selected page push cx ; save loop count push si ; save address table offset mov si, 0 ; mov cx, FRAME_LENGTH ; loop for number of characters in frame mov di, wBUFFER @@: mov al, [di] ; get char from DS mov es:[si], al ; put char in onboard RAM inc si ; inc ptr inc di ; inc ptr loop @b ; loop until done with frame pop si ; restore address table offset pop cx ; restore loop count INVOKE ChangeR56Page, addr CARD1, MEM_PAGE_0 ; point to page zero again inc dx ; inc to next link/page/page address loop TD1 ; do next one xor eax, eax mov ax, wLinkOffset ; Now put the Address of the first link in mov dword ptr es:[bx], 0 ; the last link add bx, 4 ;Buffer address mov dword ptr es:[bx], 0 add bx, 4 ;Buffer length of Zero terminates mov dword ptr es:[bx], 0 add bx, 4 ;Next Buffer mov dword ptr es:[bx], 0 add bx, 4 ;Next Buffer .8086 ret WriteLink ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; CheckDMA : ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; CheckDMA proc C USES DX, wIOBASE:WORD, bPAGE:BYTE INVOKE ChangeR56Page, addr CARD1, bPAGE mov ax, TEST_SEGMENT mov es, ax mov di, 0 mov cx, FRAME_LENGTH mov si, offset TestDMATx @@: mov al, es:[di] cmp al, byte ptr[si] jnz @f inc si inc di loop @b xor ax, ax ret @@: mov ax, 0ffh ret CheckDMA endp ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; PrintDMA : ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; PrintDMA proc C USES AX DX, wIOBASE:WORD, bPAGE:BYTE INVOKE ChangeR56Page, addr CARD1, bPAGE mov ax, TEST_SEGMENT mov es, ax mov di, 0 mov cx, FRAME_LENGTH @@: mov al, es:[di] INVOKE WRT inc di loop @b ret PrintDMA endp ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ModemControlTest : ;; This routine will test modem control signals on the R56 adapter. ;; All MCS tests are performed at D000. The test will assemble for ;; three configurations pending on the kewords V35=1 or EIA530=1 or ;; RS232=1, if no define is stated, it will test for RS-232. ;; Note: Port7 = RTS ;; Port6 = DTR ;; Port5 = Control TxC an input or output ;; Port4 = TM ;; Port3 = Select interface ;; Port2 = Select interface ;; Port1 = Not used ;; Port0 = OSC input ;; RxREQ = DSR ;; TxREQ = RI ;; Port7_PinCtrl_Output1 + \ ; RTS off ;; Port6_PinCtrl_Output1 + \ ; DTR off ;; Port5_PinCtrl_Output0 + \ ; Enable TxC driver to modem ;; Port3_PinCtrl_Output1 + \ ; balanced TxD,TxC drive (RS-449, V.35, X.21) ;; Port2_PinCtrl_Output1 + \ ; balanced RTS,DTR drive (RS-449, X.21) ;; Port1_PinCtrl_Output0 + \ ; Drive P1 low, not used ;; Port0_PinCtrl_CTR0_Clock ; P0 is on board OSC input ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ModemControlTest PROC C PUBLIC USES DX, wIOBASE:WORD mov dx, wIOBASE in al, dx ; Read Value at 1st I/O location jmp short $+2 jmp short $+2 mov al, MEM_WIN_ON OR MEM_PAGE_FIRST out dx, al ; Turn memory window ON and point to first page IO_Pause inc dx mov al, MEM_LO_D000 OR SEL_IRQ_NONE out dx, al IO_Pause inc dx mov al,LOADD OR EN_16_BIT OR IO_SPEED OR ISA_IRQ ;EN0W8+EN16+EDGEY out dx, al ; make it go fast and set low address mode IO_Pause dec dx dec dx ; back to Base I/O address ;Display message to video INVOKE wrt_mess, offset EM_INTERFACE ;Set / Check Modem Interface ; mov dx, wIOBASE ; add dx, 3 ; in al, dx ; test al, 80h ;BugBug: will this change to an equate V35_0 ; IF V35 ; jnz @f ; ELSE ; jz @f ; ENDIF ; LOG_ERROR offset EM_HEADER ; ret ;@@: ; Now enable the appropriate line drivers by setting bits in PCR ;Test RTS-CTS INVOKE IUSCout, addr CARD1, PCR, INTERFACE + RTS_OFF + DTR_OFF call Delay2 BitCheckIUSC PCR, INTERFACE + RTS_OFF + DTR_OFF, INTERFACE + RTS_OFF + DTR_OFF, offset EM_RTS1 BitCheckIUSC MISR, DCD_ON + CTS_ON, DCD_ON + CTS_ON, offset EM_RTSCTS INVOKE IUSCout, addr CARD1, PCR, INTERFACE + RTS_ON + DTR_OFF call Delay2 BitCheckIUSC PCR, INTERFACE + RTS_ON + DTR_ON, INTERFACE + RTS_ON + DTR_OFF, offset EM_RTS2 ;BugBug BitCheckIUSC MISR, DCD_ON + CTS_ON, DCD_ON + CTS_OFF, offset EM_RTSCTS1 INVOKE IUSCout, addr CARD1, PCR, INTERFACE + RTS_OFF + DTR_OFF call Delay2 BitCheckIUSC PCR, INTERFACE + RTS_OFF + DTR_OFF, INTERFACE + RTS_OFF + DTR_OFF, offset EM_RTS1 BitCheckIUSC MISR, DCD_ON + CTS_ON, DCD_ON + CTS_ON, offset EM_RTSCTS ;Test DTR-DCD INVOKE IUSCout, addr CARD1, PCR, INTERFACE + RTS_OFF + DTR_OFF call Delay2 BitCheckIUSC PCR, INTERFACE + RTS_OFF + DTR_OFF, INTERFACE + RTS_OFF + DTR_OFF, offset EM_RTS1 BitCheckIUSC MISR, DCD_ON + CTS_ON, DCD_ON + CTS_ON, offset EM_RTSCTS INVOKE IUSCout, addr CARD1, PCR, INTERFACE + RTS_OFF + DTR_ON call Delay2 BitCheckIUSC PCR, INTERFACE + RTS_ON + DTR_ON, INTERFACE + RTS_OFF + DTR_ON, offset EM_DTR1 ;BugBug BitCheckIUSC MISR, DCD_ON + CTS_ON, DCD_OFF + CTS_ON, offset EM_RTSCTS2 INVOKE IUSCout, addr CARD1, PCR, INTERFACE + RTS_OFF + DTR_OFF call Delay2 BitCheckIUSC PCR, INTERFACE + RTS_OFF + DTR_OFF, INTERFACE + RTS_OFF + DTR_OFF, offset EM_RTS1 BitCheckIUSC MISR, DCD_ON + CTS_ON, DCD_ON + CTS_ON, offset EM_RTSCTS ;Test ;BugBug: need to make and easy macro or routine to set and or reset bits ret ModemControlTest ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Delay2 PROC near push cx mov cx, 0FFFEh @@: loop @b pop cx ret Delay2 ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; DebugCheck PROC NEAR USES DX cmp DebugPointer, 0 jnz @f xor ax, ax ret @@: cmp DebugPointer, 0 jz @f dec DebugPointer ; Fix ErrorPointer to show dec DebugPointer ; last error INVOKE wrt_mess, offset DM_PREERROR ; Print Preamble mov bx, DebugPointer mov cx, DebugArray[bx] ; Get the error condition cmp ax, 0 ; Is this our last one? jz @f ; If so jump to the top cmp bx, MAX_DEBUG ; Invalid Error? jg ErrorE ; Jump to error message INVOKE wrt_mess, cx jmp @b @@: mov ax, 1 ret ErrorE: INVOKE wrt_mess, offset DM_ERRERR mov ax, 1 ret DebugCheck ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ErrorCheck : ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ErrorCheck PROC NEAR USES DX cmp ErrorPointer, 0 jnz @f INVOKE wrt_mess, offset EM_PASSED xor ax, ax ret @@: INVOKE wrt_mess, offset EM_FAILED @@: cmp ErrorPointer, 0 jz @f dec ErrorPointer ; Fix ErrorPointer to show dec ErrorPointer ; last error INVOKE wrt_mess, offset EM_PREERROR ; Print Preamble mov bx, ErrorPointer mov cx, ErrorArray[bx] ; Get the error condition cmp ax, 0 ; Is this our last one? jz @f ; If so jump to the top cmp bx, MAX_ERRORS ; Invalid Error? jg ErrorE ; Jump to error message INVOKE wrt_mess, cx jmp @b @@: mov ax, 1 ret ErrorE: INVOKE wrt_mess, offset EM_ERRERR mov ax, 1 ret ErrorCheck ENDP ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; END START COMMENT~ Todo: Work on R56 library file 1) Support multiple cards 2) Keep memory image of all I/O ports 3) Make it easy to use 4) Note: IRQ12 failes on IBM MOD35 IRQ15 conflicts with Lantastic LAN adapter in Jason's PC at work Hidden Refresh BIOS Chipset option conflicts with IUSC access on Jason's PC at work There seems to be some speed related issues with the 5010 Rev A card vs. the Eagle Card. Modem control signals may be a problem on the Rev A card. Note: To enable external loopback the IOCR needs to enable the totem pole Transmitter output and the CCAR needs to select external operation (normal operation) ~