/***************************************************************************
****************************************************************************
***
***  Program File:  @(#)dma_reg.v
***
***
****************************************************************************
****************************************************************************/
// -----------------------------------------------------------------------------
//
//    COPYRIGHT (C) 1995 BY RAVIcad, Inc.
//    ALL RIGHTS RESERVED
//    PROPRIETARY AND TRADE SECRET
//    USAGE AND DISCLOSURE AS PER LICENSE AGREEMENT.
//
// ----------------------------------------------------------------------------
// @(#)dma_reg.v	1.3 2/1/96

/************************************************************************

		File Name = dma_reg.v

	This file contains the DMA registers for the PCI bus master.
	It contains the address incrementing logic and the byte
	count control for the pre-fetch.

************************************************************************/

/****************************************************************************** 
        PCI Core can interface with two internal blocks requesting data
        transfers 
 
        First Interface  
 
                host_req1       request signal 
                command1        Command in terms of PCI cmds (4 bits)
                address1        pci address of 32 bits 
                wcount1         no of 32 bit words requested in the transaction.
 
******************************************************************************/
 

module dma_reg
`ifdef VCS  // VCS Release 5.0.1A
`protected
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`endprotected
`endif
endmodule 		// end of DMA module.