/******************************************************************************/ 
/*                                                                            */ 
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved.             */ 
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/******************************************************************************/ 
/*
	  Directed pci operations. Use  PLI to take pci commands from an input file.

*/

module	dma_test();

reg [31:0] filept0;
reg [31:0] filept1;
reg [31:0] filept2;
reg [31:0] filept3;
reg [31:0] filept4;
reg [31:0] filept5;
reg [31:0] filept6;
reg [31:0] filept7;


reg     [31:0]  save_addr;     
reg     [3:0]   save_mask;
reg     [7:0]   disp_byte;

reg	go_pci;

/*
	Wait for cfg_mem_enable to be turned on by cpu then, start PLI driver.
*/
task startPCI;

integer i;

begin

#500;

   while(go_pci == 0)
   begin
	#100;
   end

   $display("Starting PLI PCI master driver");
   $PCI_openfiles(filept0, filept1, filept2, filept3, filept4,
                   filept5, filept6, filept7);
   #5;
   $display("Opened fileptrs %d %d %d %d",filept0,filept1,filept2,filept3);
   fork
   if (filept0 != 0) Msystem.pciM.dofile(0, filept0);
   if (filept1 != 0) Msystem.pciM1.dofile(1, filept1);
   if (filept2 != 0) Msystem.pciM2.dofile(2, filept2);
   if (filept3 != 0) Msystem.pciM3.dofile(3, filept3);
   join

end
endtask 


initial	begin
	   go_pci = 0;
	   startPCI;
	end

always @ (posedge afx_mon.write_flag) 
begin

            // save info from 1st cycle of write

            save_addr[28:3] = afx_mon.address[28:3];
            save_mask = afx_mon.mask;

            // Wait until data is asserted

            @(posedge afx_mon.mon_clk)
                if((save_mask == 4'b0100) && (save_addr[28] == 1))
		begin
		   save_addr[2:0] = 3'b100;
                   disp_byte = afx_mon.data[31:24];

// Check to see if we turned on the bus-master enable in the control reg

                   if(save_addr[27:0] == 'hc0004) // Control reg address
		   begin
		      if(disp_byte & 4)		 // Bus-master enable bit
	                 go_pci = 1;
                   end
	         end

end

endmodule