/******************************************************************************/ 
/*                                                                            */ 
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved.             */ 
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/* The contents of this file are subject to the current version of the Sun    */ 
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/* foreign patents, or pending applications.                                  */ 
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/******************************************************************************/ 
// @(#)iotlb_defs.v	1.2 8/21/91
//******************** define IOTLB size parameters
`define IOTLBENTRIES 16
`define IOTLBTAG_WIDTH 42 
`define IOTLBDATA_WIDTH 28

//******************** define IOTLB tag entry 
// An IMASK bit =1 indicates that the corresponding INDEX field
//  should be ignored.
// A SUPERVISOR bit =1 indicates that a context match is NOT required.


/*********************************************************************************/
/**                  IOTLB TAG hardware representation                            **/
/**                                                                             **/
/**     +---+---+---------+--+-------+--+-------+-----------+---+---+---+---+---+---+---+---+---+---+   **/
/**     | V |L1 |  INDX1  |L2| INDX2 |L3| INDX3 |  Context  | UE| UR| UW| SE| SR| SW| S | IO| P | M |   **/
/**     +---+---+---------+--+-------+--+-------+-----------+---+---+---+---+---+---+---+---+---+---+   **/
/**      41  40  39     32 31 30   25 24 23   18 17       10  9   8   7   6   5   4   3   2   1    0    **/
/**     +---+---+---------+--+-------+--+-------+-----------+---+---+---+---+---+---+---+---+---+---+   **/
/**     | V |L1 |  INDX1  |L2| INDX2 |L3| INDX3 |     0     | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |   **/
/**     +---+---+---------+--+-------+--+-------+-----------+---+---+---+---+---+---+---+---+---+---+   **/
/*********************************************************************************/


`define VALIDBIT 41                 /* V-bit                tlb_tag[31] */
`define IMASK0 40                   /* level bit 1          tlb_tag[33] */
				    /* this is used to clear all */
`define IMASK1 31                   /* Level bit 2          tlb_tag[22] */
`define IMASK2 24                   /* Level bit 3          tlb_tag[15] */
`define INDEX1 39:32                /* Virtual tag index 1  tlb_tag[30:23] */
`define INDEX2 30:25                /* Virtual tag index 2  tlb_tag[21:16] */
`define INDEX3 23:18                 /* Virtual tag index 3  tlb_tag[14:09] */
`define CONTEXT 17:10                /* Context              tlb_tag[08:03] */
`define SUPERVISOR 3                /* S-bit                tlb_tag[02] */
`define IO_PTE 2                    /* IO-bit               tlb_tag[01] */
`define PTP_BIT 1                   /* PTP-bit              tlb_tag[00] */
`define UE 9
`define UR 8
`define UW 7
`define SE 6
`define SR 5
`define SW 4
`define M  0

//******************** define IOTLB data entry types

/*************************************************************************/
/**                      IOTLB DATA representation                        **/
/**                                                                     **/
/**          PTE                                                             **/
/**     +-----+-------------------------*---+---+---+---+-----------+      **/
/**     |lvl  |Physical Page Number (PPN)   | C | M | 1 |     ACC   |      **/
/**     +-----+-----------------------------+---+---+---+-----------+      **/
/**      27 25 24			     6  5   4   3  2         0       **/
/**                                                                     **/
/**     IOPTE                                                           **/
/**     +--------------------------------+---+---+---+---+---+---+      **/
/**     |   Physical Page Number (PPN)   | 0 | 0 | 0 | 0 | 0 | W |      **/
/**     +--------------------------------+---+---+---+---+---+---+      **/
/**      24                             6  5   4   3   2   1   0        **/
/**                                                                     **/
/**     PTP                                                             **/
/**     +------------------------------------------------+---+---+      **/
/**     |   Page Table Pointer (PTP)                     | 0 | 0 |      **/
/**     +------------------------------------------------+---+---+      **/
/**      24                                             2  1   0        **/
/**                                                                     **/
/*************************************************************************/

// **** define PTE entry fields
`define PPN 24:6
`define C_BIT 5                      /* Cacheable bit */
`define MOD_BIT 4                    /* Modified bit */
`define REF_BIT 3                    /* Reference Bit - a "1" indicates an PTE */
`define ACCESS 2:0                   /* Access field */

// **** define IOPTE entry fields
`define W_BIT 0
`define IO_BIT 3                     /* Reference Bit - a "0" indicates an IOPTE */

// **** define PTP entry fields
`define PTP 24:2

// **** define LVL entry field 

`define LVL 27:25

// **** define CLR_MASK to be used to flush entire IOTLB
`define CLR_MASK 42'h1ffffffffff