/******************************************************************************/
/* */
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved. */
/* */
/* The contents of this file are subject to the current version of the Sun */
/* Community Source License, microSPARCII ("the License"). You may not use */
/* this file except in compliance with the License. You may obtain a copy */
/* of the License by searching for "Sun Community Source License" on the */
/* World Wide Web at http://www.sun.com. See the License for the rights, */
/* obligations, and limitations governing use of the contents of this file. */
/* */
/* Sun Microsystems, Inc. has intellectual property rights relating to the */
/* technology embodied in these files. In particular, and without limitation, */
/* these intellectual property rights may include one or more U.S. patents, */
/* foreign patents, or pending applications. */
/* */
/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos, */
/* Solaris, Java and all Java-based trademarks and logos are trademarks or */
/* registered trademarks of Sun Microsystems, Inc. in the United States and */
/* other countries. microSPARC is a trademark or registered trademark of */
/* SPARC International, Inc. All SPARC trademarks are used under license and */
/* are trademarks or registered trademarks of SPARC International, Inc. in */
/* the United States and other countries. Products bearing SPARC trademarks */
/* are based upon an architecture developed by Sun Microsystems, Inc. */
/* */
/******************************************************************************/
/***************************************************************************
****************************************************************************
***
*** Program File: @(#)iudisp.v
***
****************************************************************************
****************************************************************************/
// iudisp.v
//------------------------------------------------------------------------------
module Mdisplay
;
// task to display machine state
task disp;
begin
$display;
$display;
$display;
$display;
`IU.iuchip.decode.ir.disp;
`IU.iuchip.regfile.disp;
/* Removed from SUNERGY
`IU.iuchip.ib.disp;
`IU.iuchip.din.disp;
`IU.iuchip.pc.disp;
*/
end
endtask
function [7:0] phys_adr;
input [2:0] window;
input [4:0] log_adr;
reg [2:0] window_;
reg [3:0] windowp1_;
//reg [2:0] windowmm1_;
reg [4:0] in_blk, local_blk, out_blk, global_blk;
reg [3:0] rg;
reg [2:0] cwp;
begin
window_ = ~window;
windowp1_ = ({1'b0,window_}) + 4'b0001;
// windowp1_ = ~(window == 6 ? 3'b0 : window + 1);
// windowmm1_ = ~(window + 1);
/*
* No redundant block in SUNERGY Puma
in_blk = (`IU.iuchip.bad_rf_blk == {windowp1_, 1'b1})
? 4'b0001 : {windowp1_,1'b1};
local_blk = (`IU.iuchip.bad_rf_blk=={window_, 1'b0})
? 4'b0001 : {window_, 1'b0};
out_blk = (`IU.iuchip.bad_rf_blk=={window_, 1'b1})
? 4'b0001 : {window_, 1'b1};
*/
/*
* OLD for 128 registers
in_blk = {windowp1_,1'b1};
local_blk = {window_, 1'b0};
out_blk = {window_, 1'b1};
global_blk = 0;
*/
/*
* for tsunami
//works for 120 registers
in_blk = {windowp1_,1'b0};
local_blk = {windowmm1_, 1'b1};
out_blk = {window_, 1'b0};
*/
in_blk = (window_ == 3'b0) ? {1'b1,window_,1'b0} : {1'b0,window_,1'b0};
local_blk = {1'b0,window_,1'b1};
out_blk = {windowp1_,1'b0};
global_blk = 0;
case ({log_adr[4], log_adr[3]})
2'b00: phys_adr = {global_blk, log_adr[2:0]};
2'b01: phys_adr = {out_blk, log_adr[2:0]};
2'b10: phys_adr = {local_blk, log_adr[2:0]};
2'b11: phys_adr = {in_blk, log_adr[2:0]};
default: phys_adr = {4'bxxxx, log_adr[2:0]};
endcase
end
endfunction
task disp_window;
input [2:0] window;
input use_cwp; // if set, get CWP value from the PSR cwp
reg [3:0] rg;
reg [2:0] cwp;
begin
if(use_cwp) cwp = `IU.iuchip.cwp;
else cwp = window;
$display(" WINDOW %d", cwp);
$display(" INS LOCALS OUTS GLOBALS");
for(rg=0; rg < 8; rg = rg + 1) begin
$write("%d: %x ", rg,
`IU.iuchip.regfile.rf_ram.memory_array[phys_adr(cwp, rg+24)]);
$write("%x ",
`IU.iuchip.regfile.rf_ram.memory_array[phys_adr(cwp, rg+16)]);
$write("%x ",
`IU.iuchip.regfile.rf_ram.memory_array[phys_adr(cwp, rg+8)]);
if(rg==0)
$display("%x ", 32'h0);
else
$display("%x ",
`IU.iuchip.regfile.rf_ram.memory_array[phys_adr(cwp, rg)]);
end
$display("---------------------------------------------------------------------------");
end
endtask
task dump_regs;
/*
task to dump the register file for comparison with sas
*/
reg [4:0] rg;
reg [2:0] window;
reg [31:0] fp; // file handle
begin
fp = $fopen({Mclocks.working_dir,"/rdump.v"});
if(fp != 0) begin
$fdisplay(fp, "0x%h", `IU.iuchip.exec.psrm); // PSR
// TBR
// $fdisplay(fp, "0x%h", {`IU.iuchip.tbrm, 4'h0});
// added by for sas compare stuff in no force env
// update at july 8
if (`IU.iuchip.tbrm !== 28'h00000XX) begin
$fdisplay(fp,"0x%h", {`IU.iuchip.tbrm, 4'h0});
end
else begin
$fdisplay(fp,"0x00000aa0");
end
$fdisplay(fp, "0x%h",
// {`IU.iuchip.wim_mod.TESTRF,
// `IU.iuchip.wim_mod.xcr,
{25'h0,
`IU.iuchip.exec.wim_mod.wimm}); // WIM
$fdisplay(fp, "0x%h", `IU.iuchip.exec.ym); // Y
// $display("0x%h", `IU.iuchip.exec.psrm); // PSR
// $display("0x%h", {`IU.iuchip.tbrm, 4'h0}); // TBR
// $display("0x%h",
// {`IU.iuchip.wim_mod.TESTRF,
// `IU.iuchip.wim_mod.xcr,
// 15'h0,
// `IU.iuchip.wim_mod.wim}); // WIM
// $display("0x%h", `IU.iuchip.ym); // Y
$fdisplay(fp, "0x%h", 32'h0); // GLOBAL 0
// $display("0x%h", 32'h0);
for(rg=1; rg < 8; rg = rg + 1) begin // GLOBALS
$fdisplay(fp, "0x%h",
`IU.iuchip.regfile.rf_ram.memory_array[phys_adr(3'h0, rg)]);
// $display("0x%h",
// `IU.iuchip.regfile.rf_ram.file[phys_adr(3'h0, rg)]);
end
for(window = 0; window < 7; window = window + 1) begin
for(rg=8; rg < 16; rg = rg + 1) begin // OUTS
$fdisplay(fp, "0x%h",
`IU.iuchip.regfile.rf_ram.memory_array[phys_adr(window, rg)]);
// $display("0x%h",
//`IU.iuchip.regfile.rf_ram.file[phys_adr(window,rg)]);
end
for(rg=16; rg < 24; rg = rg + 1) begin // LOCALS
$fdisplay(fp, "0x%h",
`IU.iuchip.regfile.rf_ram.memory_array[phys_adr(window, rg)]);
// $display("0x%h",
//`IU.iuchip.regfile.rf_ram.file[phys_adr(window,rg)]);
end
end
$fclose(fp);
end
else
$display("*** couldn't open 'rdump.v' for writing");
end
endtask
task disp_psr;
reg [31:0] d_psr;
begin
$display(" PSR = %h", `IU.iuchip.exec.psrm);
$display(" imp ver nzvc (rsvd) ecp efp pil s ps et ucwp cwp");
// 0000 0000 0000 000000 0 0 0000 0 0 0 00 000
$display("%b %b %b %b %b %b %b %b %b %b %b %b",
`IU.iuchip.exec.psrm[31:28], // IMPLEMENTATION
// 4'b0100, // IMPLEMENTATION
`IU.iuchip.exec.psrm[27:24], // VERSION
// 4'b0001, // VERSION
`IU.iuchip.exec.psrm[23:20], // Condition Codes
`IU.iuchip.exec.psrm[19:14], // RESERVED
// 6'b0, // RESERVED
`IU.iuchip.exec.psrm[13], // Enable Co-processor
`IU.iuchip.exec.psrm[12], // Enable FPU
`IU.iuchip.exec.psrm[11:8], // Processor Interrupt Level
`IU.iuchip.exec.psrm[7], // Supervisor bit
`IU.iuchip.exec.psrm[6], // Previous state bit
`IU.iuchip.exec.psrm[5], // Enable traps bit
`IU.iuchip.exec.psrm[4:3], // Unused bits of the CWP
// 2'b0, // Unused bits of the CWP
`IU.iuchip.exec.psrm[2:0] // Current Window Pointer
);
$display("---------------------------------------------------------------------------");
end
endtask
endmodule
This page: |
Created: | Thu Aug 19 12:00:17 1999 |
| From: |
../../../sparc_v8/env/rtl/iudisp.v
|