/******************************************************************************/ 
/*                                                                            */ 
/* Copyright (c) 1999 Sun Microsystems, Inc. All rights reserved.             */ 
/*                                                                            */ 
/* The contents of this file are subject to the current version of the Sun    */ 
/* Community Source License, microSPARCII ("the License"). You may not use    */ 
/* this file except in compliance with the License.  You may obtain a copy    */ 
/* of the License by searching for "Sun Community Source License" on the      */ 
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/* obligations, and limitations governing use of the contents of this file.   */ 
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/* technology embodied in these files. In particular, and without limitation, */ 
/* these intellectual property rights may include one or more U.S. patents,   */ 
/* foreign patents, or pending applications.                                  */ 
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/* Sun, Sun Microsystems, the Sun logo, all Sun-based trademarks and logos,   */ 
/* Solaris, Java and all Java-based trademarks and logos are trademarks or    */ 
/* registered trademarks of Sun Microsystems, Inc. in the United States and   */ 
/* other countries. microSPARC is a trademark or registered trademark of      */ 
/* SPARC International, Inc. All SPARC trademarks are used under license and  */ 
/* are trademarks or registered trademarks of SPARC International, Inc. in    */ 
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/* are based upon an architecture developed by Sun Microsystems, Inc.         */ 
/*                                                                            */ 
/******************************************************************************/ 
/***************************************************************************
****************************************************************************
***
***  Program File:  @(#)opcode.h
***
***
****************************************************************************
****************************************************************************/
`define CALL 3'b0_01 /* CALL instruction */      

`define SETHI 6'b0_00_100 /* SETHI instruction */      
`define BICC 6'b0_00_010 /* integer conditional branch */     
`define BFCC 6'b0_00_110 /* floating conditional branch */     
`define BCCC 6'b0_00_111 /* co-processor conditional branch */     
`define UNIMP 6'b0_00_000 /* architecturally unimplemented */      

`define ALU 4'b0_10_0 /* ALU (non-SHIFT group */     
`define SHIFTX 4'b0_10_1 /* SHIFT group mulscc spec. reg. */   

`define MEM 4'b0_11_0 /* Memory access insts. incl. alt. */   
`define MEMN 5'b0_11_00 /* Memory access insts. */     
`define MEMA 5'b0_11_01 /* Alternate Memory access insts. */    

`define MEMF 5'b0_11_10 /* Floating-point loads and stores */    
`define MEMC 5'b0_11_11 /* Co-processor loads and stores */    
`define STOREF 7'b0_11_1001 /* Floating-point stores */      
`define STOREFJ 7'b0_11_1011 /* STF2 and STF3 synonym opcodes */   
`define STOREC 7'b0_11_1101 /* Co-processor stores */      
`define STORECJ 7'b0_11_1111 /* STC2 and STC3 synonym opcodes */   
`define STI 7'b0_11_0001 /* Integer Stores (non. Alt */    
`define STIA 7'b0_11_0101 /* Integer Store Alternates */     
`define MEMALL 3'b0_11 /* All memory access instructions */    

`define WR 7'b0_10_1100 /* WRPSR TBR WIM Y */    
`define RD 7'b0_10_1010 /* RDPSR TBR WIM Y */    

/* HELP Groups */

`define HSHIFTX 4'b1_10 /* Help JMP and RETT */    
`define HMEM 4'b1_11_0 /* Help st std ldst swap */   
`define HMEMN 5'b1_11_00 /* Help st std ldst swap */   
`define HMEMA 5'b1_11_01 /* Help st std ldst swap Alternate */  
`define HMEMF 5'b1_11_10 /* Help Floating-point stores */     
`define HMEMC 5'b1_11_11 /* Help Co-processor stores */     
`define HSTI 7'b1_11_0001 /* Help Integer Stores (non. Alt */   
`define HSTIA 7'b1_11_0101 /* Help Integer Store Alternates */    
`define HMEMALL 3'b1_11 /* Help memory access instructions */    

/* BRANCH CONDITIONS */

`define BR_ALWAYS 4'b1000 // Branch Always       

/* OPCODES */

/* integer load */

`define LDSB 9'o311 /* LoaD Signed Byte */     
`define LDUB 9'o301 /* LoaD Unsigned Byte */     
`define LDSH 9'o312 /* LoaD Signed Halfword */     
`define LDUH 9'o302 /* LoaD Unsigned Halfword */     
`define LD 9'o300 /* LoaD (word */      
`define LDD 9'o303 /* LoaD Double */      
`define SWAP 9'o317 /* Swap (register with memory */    

`define LDSBA 9'o331 /* LoaD Signed Byte Alternate */    
`define LDUBA 9'o321 /* LoaD Unsigned Byte Alternate */    
`define LDSHA 9'o332 /* LoaD Signed Halfword Alternate */    
`define LDUHA 9'o322 /* LoaD Unsigned Halfword Alternate */    
`define LDA 9'o320 /* LoaD Alternate (word */     
`define LDDA 9'o323 /* LoaD Double Alternate */     
`define SWAPA 9'o337 /* Swap Alternate */      

/* floating point load */

`define LDF 9'o340 /* LoaD Floating */      
`define LDDF 9'o343 /* LoaD Double Floating */     
`define LDFSR 9'o341 /* LoaD Floating Status Register */    

`define LDF2 9'o350 /* LoaD Floating Synonym */     
`define LDF3 9'o351 /* LoaD Floating Synonym */     

/* co-processor load */

`define LDC 9'o360 /* LoaD Co-processor */      
`define LDDC 9'o363 /* LoaD Double Co-processor */     
`define LDCSR 9'o361 /* LoaD Co-processor Status Register */    

`define LDC2 9'o370 /* LoaD Co-processor Synonym */     
`define LDC3 9'o371 /* LoaD Co-processor Synonym */     

/* integer store */

`define STB 9'o305 /* STore Byte */      
`define STH 9'o306 /* STore Halfword */      
`define ST 9'o304 /* STore (word */      
`define LDSTB 9'o315 /* LoaD SeT Byte (atomic */    
`define STD 9'o307 /* STore Double */      

`define STBA 9'o325 /* STore Byte Alternate */     
`define STHA 9'o326 /* STore Halfword Alternate */     
`define STA 9'o324 /* STore Alternate (word */     
`define LDSTBA 9'o335 /* LoaD SeT Byte Alternate (atomic */   
`define STDA 9'o327 /* STore Double Alternate */     

/* floating point store */

`define STF 9'o344 /* STore Floating */      
`define STDF 9'o347 /* STore Double Floating */     
`define STFSR 9'o345 /* STore Floating Status Register */    
`define STDFQ 9'o346 /* STore Double Floating Queue */    

`define STF2 9'o354 /* STore Floating synonym */     
`define STF3 9'o355 /* STore Floating synonym */     

/* co-processor store */

`define STC 9'o364 /* STore Co-processor */      
`define STDC 9'o367 /* STore Double Co-processor */     
`define STCSR 9'o365 /* STore Co-processor Status Register */    
`define STDCQ 9'o366 /* STore Double Co-processor Queue */    

`define STC2 9'o374 /* STore Co-processor synonym */     
`define STC3 9'o375 /* STore Co-processor synonym */     

/* IMULIDIV group */
`define UMUL 9'o212 /* UMUL (Unsigned Multiply */     
`define SMUL 9'o213 /* SMUL (signed Multiply */     
`define UMULCC 9'o232 /* UMUL (Unsign Multiply and set cc */  
`define SMULCC 9'o233 /* SMUL (signed Multiply and set cc */  
`define UDIV 9'o216 /* UDIV (Unsigned Divide */     
`define SDIV 9'o217 /* SDIV (signed Divide */     
`define UDIVCC 9'o236 /* UDIV (Unsigned Divide and set cc */  
`define SDIVCC 9'o237 /* SDIV (signed Divide and set cc */  

/* ALU group */

`define ADD 9'o200 /* ADD (integer */      
`define ADDX 9'o210 /* ADD eXtended (with carry */    
`define SUB 9'o204 /* SUBtract (integer */      
`define SUBX 9'o214 /* SUBtract eXtended (with borrow */    
`define AND 9'o201 /* AND (logical */      
`define ANDN 9'o205 /* AND Not (logical */     
`define OR 9'o202 /* OR (logical */      
`define ORN 9'o206 /* OR Not (logical */     
`define XOR 9'o203 /* eXclusive OR (logical */     
`define XNOR 9'o207 /* eXclusive NOR (logical */     

`define ADDCC 9'o220 /* ADD set Condition Codes */    
`define ADDXCC 9'o230 /* ADD eXtended set Condition Codes */   
`define SUBCC 9'o224 /* SUBtract set Condition Codes */    
`define SUBXCC 9'o234 /* SUBtract eXtended set Cond. Codes */   
`define ANDCC 9'o221 /* AND set Condition Codes */    
`define ANDNCC 9'o225 /* AND Not set Condition Codes */   
`define ORCC 9'o222 /* OR set Condition Codes */    
`define ORNCC 9'o226 /* Or Not set Condition Codes */   
`define XORCC 9'o223 /* eXclusive OR set Condition Codes */   
`define XNORCC 9'o227 /* eXclusive Nor set Condition Codes */   

/* SHIFTX group */

`define TADDCC 9'o240 /* Tagged ADD set Condition Codes */   
`define TSUBCC 9'o241 /* Tagged SUBtract set Condition Codes */   
`define TADDCCTV 9'o242 /* Tagged ADD set Cond. Codes Trap oVerflow */ 
`define TSUBCCTV 9'o243 /* Tagged SUB set Cond. Codes Trap oVerflow */ 

`define MULSCC 9'o244 /* MULtiply Step set Condition Codes */   

`define SLL 9'o245 /* Shift Left Logical */     
`define SRL 9'o246 /* Shift Right Logical */     
`define SRA 9'o247 /* Shift Right Arithmetic */     

`define RDY 9'o250 /* ReaD Y register */     
`define RDPSR 9'o251 /* ReaD PSR register */     
`define RDWIM 9'o252 /* ReaD WIM register */     
`define RDTBR 9'o253 /* ReaD TBR register */     

`define WRY 9'o260 /* WRite Y register */     
`define WRPSR 9'o261 /* WRite PSR register */     
`define WRWIM 9'o262 /* WRite WIM register */     
`define WRTBR 9'o263 /* WRite TBR register */     

`define FPOP 9'o264 /* Floating-Point OPerate */      
`define FPCMP 9'o265 /* Floating-Point CoMPare */      
`define CPOP 9'o266 /* Co-Processor OPerate */      
`define CPCMP 9'o267 /* Co-Processor CoMPare */      

`define SAVE 9'o274 /* SAVE register window and add */   
`define RESTORE 9'o275 /* RESTORE register window and add */   
`define JMP 9'o270 /* JuMP to computed address */    
`define RETT 9'o271 /* RETurn from Trap */     
`define TICC 9'o272 /* Trap on Integer Condition Codes */   
`define IFLUSH 9'o273 /* I-cache FLUSH */      


/* special "event" opcode - it's still an illegal op but it is used
 * in debug to count "events."
 */

`define EVENT 9'o277 /* event illegal opcode */     
`define ONOP 8'o000          
`define OTRAP 8'o010          



/* HELPS */

`define HJMP		{`JMP | 9'o400, 2'b00}
`define HRETT		{`RETT | 9'o400, 2'b00}

/* INTEGER LDA HELP */

`define HLDA		{`LDA | 9'o400, 2'b00}

/* INTEGER LDD HELP */

`define HLDD		{`LDD | 9'o400, 2'b00}
`define HLDDA		{`LDDA | 9'o400, 2'b00}

/* INTEGER STORE HELP */

`define HLDSTB		{`LDSTB | 9'o400, 2'b00}

`define HSTD0		{`STD | 9'o400, 2'b00}

`define HSWAP		{`SWAP | 9'o400, 2'b00}


`define HSTA0		{`STA  | 9'o400, 2'b00}
`define HSTA1		{`STA  | 9'o400, 2'b01}

`define HLDSTBA	{`LDSTBA | 9'o400, 2'b00}

`define HSTDA0		{`STDA | 9'o400, 2'b00}

`define HSWAPA		{`SWAPA | 9'o400, 2'b00}

/* IMULIDIV HELP */
`define HUMUL0		{`UMUL | 9'o400, 2'b00}
`define HUMUL1		{`UMUL | 9'o400, 2'b01}
`define HUMUL2		{`UMUL | 9'o400, 2'b10}
`define HSMUL0		{`SMUL | 9'o400, 2'b00}
`define HSMUL1		{`SMUL | 9'o400, 2'b01}
`define HSMUL2		{`SMUL | 9'o400, 2'b10}
`define HUMULCC0	{`UMULCC | 9'o400, 2'b00}
`define HUMULCC1	{`UMULCC | 9'o400, 2'b01}
`define HUMULCC2	{`UMULCC | 9'o400, 2'b10}
`define HSMULCC0	{`SMULCC | 9'o400, 2'b00}
`define HSMULCC1	{`SMULCC | 9'o400, 2'b01}
`define HSMULCC2	{`SMULCC | 9'o400, 2'b10}


`define HUDIV0		{`UDIV | 9'o400, 2'b00}
`define HUDIV1		{`UDIV | 9'o400, 2'b01}
`define HUDIV2		{`UDIV | 9'o400, 2'b10}
`define HUDIV3		{`UDIV | 9'o400, 2'b11}
`define HSDIV0		{`SDIV | 9'o400, 2'b00}
`define HSDIV1		{`SDIV | 9'o400, 2'b01}
`define HSDIV2		{`SDIV | 9'o400, 2'b10}
`define HSDIV3		{`SDIV | 9'o400, 2'b11}
`define HUDIVCC0	{`UDIVCC | 9'o400, 2'b00}
`define HUDIVCC1	{`UDIVCC | 9'o400, 2'b01}
`define HUDIVCC2	{`UDIVCC | 9'o400, 2'b10}
`define HUDIVCC3	{`UDIVCC | 9'o400, 2'b11}
`define HSDIVCC0	{`SDIVCC | 9'o400, 2'b00}
`define HSDIVCC1	{`SDIVCC | 9'o400, 2'b01}
`define HSDIVCC2	{`SDIVCC | 9'o400, 2'b10}
`define HSDIVCC3	{`SDIVCC | 9'o400, 2'b11}

/* IFLUSH HELPS */

`define HIFLUSH0	{`IFLUSH | 9'o400, 2'b00}
`define HIFLUSH1	{`IFLUSH | 9'o400, 2'b01}

/* CO-PROCESSOR STORE HELP */


/* internally generated helps */

`define HSTB         {`STB | 9'o400, 2'b00}
`define HSTBA        {`STBA | 9'o400, 2'b00}






`define HSTH		{`STH | 9'o400, 2'b00}
`define HST		{`ST  | 9'o400, 2'b00}
`define HSTD1	{`STD | 9'o400, 2'b01}
`define HSTHA	{`STHA | 9'o400, 2'b00}
`define HSTDA1	{`STDA | 9'o400, 2'b01}
`define HSTF		{`STF | 9'o400, 2'b00}
`define HSTDF0		{`STDF | 9'o400, 2'b00}
`define HSTDF1		{`STDF | 9'o400, 2'b01}
`define HSTFSR		{`STFSR | 9'o400, 2'b00}
`define HSTDFQ0	{`STDFQ | 9'o400, 2'b00}
`define HSTDFQ1	{`STDFQ | 9'o400, 2'b01}
`define HIFLUSH2	{`IFLUSH | 9'o400, 2'b10}
`define HSTC		{`STC | 9'o400, 2'b00}
`define HSTDC		{`STDC | 9'o400, 2'b00}
`define HSTCSR		{`STCSR | 9'o400, 2'b00}
`define HSTDCQ0	{`STDCQ | 9'o400, 2'b00}
`define HSTDCQ1	{`STDCQ | 9'o400, 2'b01}