component stmach_v
  port (CLK: in STD_LOGIC;
        reset: in STD_LOGIC;
        strtstop: in STD_LOGIC;
        clkout: out STD_LOGIC;
        rst: out STD_LOGIC);
end component;


instance_name : stmach_v
( CLK => ,
  clkout => ,
  reset => ,
  rst => ,
  strtstop => );