LCANET, 5 PROG, XNFMERGE, pre-5.0.0o, "Created from rcp.sxnf: Wed Feb 9 14:47:14 1994: Options: d p f a" PROG, Synopsys, v3.1a-beta2, "Created from rcp.db" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 16:45:00 PST 1992" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.9, "Last modified on 1/19/93 17:26:08" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.0, "Last modified on 10/19/92 13:13:18" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.1, "Last modified on 7/28/93 13:25:24" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, byhand, 1.2, "Created on Wed July 29, 14:45:00 PST 1992" PROG, XNFPREP, pre5.0.0q, "1994/02/09 16:57:59" PART, XC4010XL-PQ208-1 USER, OLDLCANET, 4 SYM, TSR59, TIMESPEC, TS466=P2S:75.0:tone_key, TS465=P2S:75.0:tone_key, TS464=P2S:75.0:rcp_ad_bus<4> END SYM, TSR58, TIMESPEC, TS463=P2S:75.0:rcp_ad_bus<4>, TS462=P2S:75.0:rcp_ad_bus<0>, TS461=P2S:75.0:rcp_ad_bus<0>, TS460=P2S:75.0:rcp_ad_bus<9>, TS459=P2S:75.0:rcp_ad_bus<9>, TS458=P2S:75.0:rcp_ad_bus<3>, TS457=P2S:75.0:rcp_ad_bus<3>, TS456=P2S:75.0:rcp_ad_bus<13> END SYM, TSR57, TIMESPEC, TS455=P2S:75.0:rcp_ad_bus<13>, TS454=P2S:75.0:rcp_wr_n, TS453=P2S:50.0:rcp_a_bus<18>, TS452=P2S:75.0:rcp_ad_bus<4>, TS451=P2S:75.0:rcp_ad_bus<4>, TS450=P2S:75.0:rcp_ad_bus<3>, TS449=P2S:75.0:rcp_ad_bus<3>, TS448=P2S:50.0:rcp_ad_bus<0> END SYM, TSR56, TIMESPEC, TS447=P2S:75.0:rcp_ad_bus<0>, TS446=P2S:75.0:aud_ctl_dat, TS445=P2S:75.0:rcp_ad_bus<0>, TS444=P2S:75.0:aud_ctl_dat, TS443=P2S:75.0:rcp_ad_bus<9>, TS442=P2S:75.0:iic_sda, TS441=P2S:75.0:rcp_ad_bus<9>, TS440=P2S:75.0:iic_sda END SYM, TSR55, TIMESPEC, TS439=P2S:75.0:rcp_wr_n, TS438=P2S:75.0:rcp_ad_bus<5>, TS437=P2S:75.0:rcp_ad_bus<5>, TS436=P2S:75.0:rcp_ad_bus<1>, TS435=P2S:75.0:rcp_ad_bus<1>, TS434=P2S:75.0:rcp_ad_bus<8>, TS433=P2S:75.0:rcp_ad_bus<8>, TS432=P2S:75.0:ext_bs_dati END SYM, TSR54, TIMESPEC, TS431=P2S:75.0:ext_bs_dati, TS430=P2S:75.0:rcp_ad_bus<4>, TS429=P2S:75.0:rcp_ad_bus<2>, TS428=P2S:75.0:rcp_ad_bus<3>, TS427=P2S:75.0:rcp_ad_bus<15>, TS426=P2S:75.0:fnc_cs_n, TS425=P2S:75.0:rcp_ad_bus<1>, TS424=P2S:75.0:rcp_ad_bus<4> END SYM, TSR53, TIMESPEC, TS423=P2S:75.0:rcp_ad_bus<2>, TS422=P2S:75.0:rcp_ad_bus<3>, TS421=P2S:75.0:rcp_ad_bus<15>, TS420=P2S:75.0:fnc_cs_n, TS419=P2S:75.0:rcp_ad_bus<1>, TS418=P2S:75.0:rcp_ad_bus<12>, TS417=P2S:75.0:rcp_ad_bus<12>, TS416=P2S:75.0:rcp_wr_n END SYM, TSR52, TIMESPEC, TS415=P2S:75.0:rcp_ad_bus<0>, TS414=P2S:75.0:rcp_ad_bus<0>, TS413=P2S:50.0:rcp_a_bus<17>, TS412=P2S:75.0:ext_tod_in, TS411=P2S:75.0:rcp_ad_bus<3>, TS410=P2S:75.0:rcp_ad_bus<3>, TS409=P2S:75.0:rcp_ad_bus<1>, TS408=P2S:75.0:rcp_ad_bus<1> END SYM, TSR51, TIMESPEC, TS407=P2S:75.0:rcp_ad_bus<7>, TS406=P2S:75.0:rcp_ad_bus<7>, TS405=P2S:25.0:rcp_ale, TS404=P2S:75.0:radio_rly_ky, TS403=P2S:75.0:radio_rly_ky, TS402=P2S:75.0:rcp_ad_bus<0>, TS401=P2S:75.0:rcp_ad_bus<8>, TS400=P2S:75.0:rcp_ad_bus<0> END SYM, TSR50, TIMESPEC, TS399=P2S:75.0:rcp_ad_bus<8>, TS398=P2S:75.0:rcp_1553_csi_n, TS397=P2S:75.0:rcp_ad_bus<10>, TS396=P2S:75.0:rcp_ad_bus<10>, TS395=P2S:75.0:rcp_ad_bus<6>, TS394=P2S:75.0:rcp_ad_bus<6>, TS393=P2S:75.0:rcp_ad_bus<2>, TS392=P2S:75.0:rcp_ad_bus<2> END SYM, TSR49, TIMESPEC, TS391=P2S:75.0:rcp_ad_bus<7>, TS390=P2S:75.0:rcp_ad_bus<7>, TS389=P2S:75.0:rcp_wr_n, TS388=P2S:75.0:ext_bs_dati, TS387=P2S:75.0:ext_bs_dati, TS386=P2S:75.0:rcp_ad_bus<8>, TS385=P2S:75.0:rcp_ad_bus<9>, TS384=P2S:75.0:rcp_ad_bus<8> END SYM, TSR48, TIMESPEC, TS383=P2S:75.0:rcp_ad_bus<9>, TS382=P2S:75.0:rcp_ad_bus<8>, TS381=P2S:75.0:rcp_ad_bus<8>, TS380=P2S:75.0:rcp_ad_bus<11>, TS379=P2S:75.0:rcp_ad_bus<11>, TS378=P2S:50.0:rcp_a_bus<16>, TS377=P2S:75.0:rcp_ad_bus<2>, TS376=P2S:75.0:rcp_ad_bus<2> END SYM, TSR47, TIMESPEC, TS375=P2S:75.0:rcp_ad_bus<2>, TS374=P2S:75.0:rcp_ad_bus<2>, TS373=P2S:75.0:rcp_ad_bus<6>, TS372=P2S:75.0:rcp_ad_bus<6>, TS371=P2S:75.0:rcp_ad_bus<1>, TS370=P2S:75.0:rcp_ad_bus<9>, TS369=P2S:75.0:rcp_ad_bus<1>, TS368=P2S:75.0:rcp_ad_bus<9> END SYM, TSR46, TIMESPEC, TS367=P2S:75.0:rcp_ad_bus<11>, TS366=P2S:75.0:rcp_ad_bus<11>, TS365=P2S:75.0:rcp_ad_bus<7>, TS364=P2S:75.0:rcp_ad_bus<7>, TS363=P2S:75.0:rcp_ad_bus<3>, TS362=P2S:75.0:rcp_ad_bus<3>, TS361=P2S:75.0:rcp_ad_bus<6>, TS360=P2S:75.0:rcp_ad_bus<6> END SYM, TSR45, TIMESPEC, TS359=P2S:75.0:rcp_ad_bus<9>, TS358=P2S:75.0:rcp_ad_bus<8>, TS357=P2S:75.0:rcp_ad_bus<9>, TS356=P2S:75.0:rcp_ad_bus<8>, TS355=P2S:75.0:rcp_ad_bus<10>, TS354=P2S:75.0:rcp_ad_bus<10>, TS353=P2S:50.0:rcp_ad_bus<15>, TS352=P2S:75.0:rcp_ad_bus<1> END SYM, TSR44, TIMESPEC, TS351=P2S:75.0:rcp_ad_bus<1>, TS350=P2S:75.0:rcp_ad_bus<3>, TS349=P2S:75.0:rcp_ad_bus<3>, TS348=P2S:75.0:rcp_ad_bus<5>, TS347=P2S:75.0:rcp_ad_bus<5>, TS346=P2S:75.0:rcp_ad_bus<2>, TS345=P2S:75.0:rcp_ad_bus<10>, TS344=P2S:75.0:rcp_ad_bus<2> END SYM, TSR43, TIMESPEC, TS343=P2S:75.0:rcp_ad_bus<10>, TS342=P2S:75.0:rcp_ad_bus<12>, TS341=P2S:75.0:rcp_ad_bus<12>, TS340=P2S:75.0:rcp_ad_bus<4>, TS339=P2S:75.0:rcp_ad_bus<4>, TS338=P2S:75.0:rcp_ad_bus<5>, TS337=P2S:75.0:rcp_ad_bus<5>, TS336=P2S:75.0:rcp_ad_bus<9> END SYM, TSR42, TIMESPEC, TS335=P2S:75.0:rcp_ad_bus<9>, TS334=P2S:75.0:rcp_ad_bus<8>, TS333=P2S:75.0:rcp_ad_bus<9>, TS332=P2S:75.0:rcp_ad_bus<8>, TS331=P2S:75.0:rcp_ad_bus<9>, TS330=P2S:75.0:rcp_ad_bus<9>, TS329=P2S:75.0:rcp_ad_bus<9>, TS328=P2S:25.0:rcp_ale END SYM, TSR41, TIMESPEC, TS327=P2S:75.0:rcp_ad_bus<10>, TS326=P2S:75.0:rcp_ad_bus<10>, TS325=P2S:50.0:rcp_ad_bus<9>, TS324=P2S:75.0:rcp_ad_bus<4>, TS323=P2S:75.0:rcp_ad_bus<3>, TS322=P2S:75.0:rcp_ad_bus<15>, TS321=P2S:75.0:fnc_cs_n, TS320=P2S:75.0:rcp_ad_bus<1> END SYM, TSR40, TIMESPEC, TS319=P2S:75.0:rcp_ad_bus<2>, TS318=P2S:75.0:rcp_ad_bus<4>, TS317=P2S:75.0:rcp_ad_bus<3>, TS316=P2S:75.0:rcp_ad_bus<15>, TS315=P2S:75.0:fnc_cs_n, TS314=P2S:75.0:rcp_ad_bus<1>, TS313=P2S:75.0:rcp_ad_bus<2>, TS312=P2S:50.0:rcp_ad_bus<14> END SYM, TSR39, TIMESPEC, TS311=P2S:75.0:rcp_ad_bus<0>, TS310=P2S:75.0:rcp_ad_bus<0>, TS309=P2S:75.0:rcp_ad_bus<4>, TS308=P2S:75.0:rcp_ad_bus<4>, TS307=P2S:75.0:rcp_ad_bus<6>, TS306=P2S:75.0:rcp_ad_bus<6>, TS305=P2S:75.0:rcp_ad_bus<4>, TS304=P2S:75.0:rcp_ad_bus<4> END SYM, TSR38, TIMESPEC, TS303=P2S:75.0:rcp_ad_bus<4>, TS302=P2S:75.0:rcp_ad_bus<1>, TS301=P2S:75.0:rcp_ad_bus<3>, TS300=P2S:75.0:rcp_ad_bus<15>, TS299=P2S:75.0:fnc_cs_n, TS298=P2S:75.0:rcp_ad_bus<2>, TS297=P2S:75.0:rcp_ad_bus<4>, TS296=P2S:75.0:rcp_ad_bus<1> END SYM, TSR37, TIMESPEC, TS295=P2S:75.0:rcp_ad_bus<3>, TS294=P2S:75.0:rcp_ad_bus<15>, TS293=P2S:75.0:fnc_cs_n, TS292=P2S:75.0:rcp_ad_bus<2>, TS291=P2S:25.0:rcp_ale, TS290=P2S:75.0:rcp_ad_bus<3>, TS289=P2S:75.0:rcp_ad_bus<11>, TS288=P2S:75.0:rcp_ad_bus<3> END SYM, TSR36, TIMESPEC, TS287=P2S:75.0:rcp_ad_bus<11>, TS286=P2S:25.0:rcp_ale, TS285=P2S:75.0:rcp_wr_n, TS284=P2S:75.0:rcp_ad_bus<13>, TS283=P2S:75.0:rcp_ad_bus<13>, TS282=P2S:75.0:rcp_ad_bus<5>, TS281=P2S:75.0:rcp_ad_bus<5>, TS280=P2S:75.0:rcp_ad_bus<4> END SYM, TSR35, TIMESPEC, TS279=P2S:75.0:rcp_ad_bus<4>, TS278=P2S:75.0:rcp_ad_bus<4>, TS277=P2S:75.0:rcp_ad_bus<2>, TS276=P2S:75.0:rcp_ad_bus<3>, TS275=P2S:75.0:rcp_ad_bus<15>, TS274=P2S:75.0:fnc_cs_n, TS273=P2S:75.0:rcp_ad_bus<1>, TS272=P2S:75.0:rcp_ad_bus<4> END SYM, TSR34, TIMESPEC, TS271=P2S:75.0:rcp_ad_bus<2>, TS270=P2S:75.0:rcp_ad_bus<3>, TS269=P2S:75.0:rcp_ad_bus<15>, TS268=P2S:75.0:fnc_cs_n, TS267=P2S:75.0:rcp_ad_bus<1>, TS266=P2S:25.0:rcp_ale, TS265=P2S:75.0:rcp_ad_bus<8>, TS264=P2S:75.0:rcp_ad_bus<8> END SYM, TSR33, TIMESPEC, TS263=P2S:75.0:rcp_ad_bus<11>, TS262=P2S:75.0:rcp_ad_bus<11>, TS261=P2S:50.0:rcp_ad_bus<8>, TS260=P2S:75.0:rcp_ad_bus<2>, TS259=P2S:75.0:rcp_ad_bus<3>, TS258=P2S:75.0:rcp_ad_bus<15>, TS257=P2S:75.0:fnc_cs_n, TS256=P2S:75.0:rcp_ad_bus<1> END SYM, TSR32, TIMESPEC, TS255=P2S:75.0:rcp_ad_bus<4>, TS254=P2S:75.0:rcp_ad_bus<2>, TS253=P2S:75.0:rcp_ad_bus<3>, TS252=P2S:75.0:rcp_ad_bus<15>, TS251=P2S:75.0:fnc_cs_n, TS250=P2S:75.0:rcp_ad_bus<1>, TS249=P2S:75.0:rcp_ad_bus<4>, TS248=P2S:75.0:rcp_ad_bus<10> END SYM, TSR31, TIMESPEC, TS247=P2S:75.0:rcp_ad_bus<10>, TS246=P2S:50.0:rcp_ad_bus<13>, TS245=P2S:75.0:rcp_ad_bus<5>, TS244=P2S:75.0:rcp_ad_bus<5>, TS243=P2S:75.0:rcp_ad_bus<5>, TS242=P2S:75.0:rcp_ad_bus<5>, TS241=P2S:75.0:rcp_ad_bus<3>, TS240=P2S:75.0:rcp_ad_bus<3> END SYM, TSR30, TIMESPEC, TS239=P2S:75.0:rcp_ad_bus<4>, TS238=P2S:75.0:rcp_ad_bus<12>, TS237=P2S:75.0:rcp_ad_bus<4>, TS236=P2S:75.0:rcp_ad_bus<12>, TS235=P2S:75.0:rcp_ad_bus<14>, TS234=P2S:75.0:rcp_ad_bus<14>, TS233=P2S:25.0:rcp_ale, TS232=P2S:75.0:rcp_ad_bus<6> END SYM, TSR29, TIMESPEC, TS231=P2S:75.0:rcp_ad_bus<6>, TS230=P2S:75.0:rcp_wr_n, TS229=P2S:75.0:rcp_ad_bus<3>, TS228=P2S:75.0:rcp_ad_bus<3>, TS227=P2S:75.0:rcp_wr_n, TS226=P2S:75.0:rcp_ad_bus<12>, TS225=P2S:75.0:rcp_ad_bus<12>, TS224=P2S:50.0:rcp_ad_bus<7> END SYM, TSR28, TIMESPEC, TS223=P2S:75.0:rcp_ad_bus<8>, TS222=P2S:75.0:rcp_ad_bus<8>, TS221=P2S:75.0:rcp_ad_bus<11>, TS220=P2S:75.0:rcp_ad_bus<11>, TS219=P2S:50.0:rcp_ad_bus<12>, TS218=P2S:75.0:rcp_wr_n, TS217=P2S:75.0:rcp_ad_bus<6>, TS216=P2S:75.0:rcp_ad_bus<6> END SYM, TSR27, TIMESPEC, TS215=P2S:75.0:rcp_ad_bus<4>, TS214=P2S:75.0:rcp_ad_bus<4>, TS213=P2S:75.0:rcp_ad_bus<1>, TS212=P2S:75.0:rcp_ad_bus<1>, TS211=P2S:75.0:rcp_ad_bus<2>, TS210=P2S:75.0:rcp_ad_bus<2>, TS209=P2S:75.0:rcp_ad_bus<13>, TS208=P2S:75.0:rcp_ad_bus<5> END SYM, TSR26, TIMESPEC, TS207=P2S:75.0:rcp_ad_bus<13>, TS206=P2S:75.0:rcp_ad_bus<5>, TS205=P2S:75.0:rcp_ad_bus<7>, TS204=P2S:75.0:rcp_ad_bus<7>, TS203=P2S:75.0:rcp_wr_n, TS202=P2S:75.0:rcp_ad_bus<1>, TS201=P2S:75.0:rcp_ad_bus<1>, TS200=P2S:75.0:rcp_ad_bus<15> END SYM, TSR25, TIMESPEC, TS199=P2S:75.0:rcp_ad_bus<15>, TS198=P2S:75.0:rcp_ad_bus<7>, TS197=P2S:75.0:rcp_ad_bus<7>, TS196=P2S:75.0:rcp_ad_bus<2>, TS195=P2S:75.0:rcp_ad_bus<2>, TS194=P2S:75.0:rcp_wr_n, TS193=P2S:75.0:rcp_ad_bus<13>, TS192=P2S:75.0:rcp_ad_bus<13> END SYM, TSR24, TIMESPEC, TS191=P2S:50.0:rcp_ad_bus<6>, TS190=P2S:75.0:rcp_ad_bus<9>, TS189=P2S:75.0:rcp_ad_bus<9>, TS188=P2S:75.0:rcp_wr_n, TS187=P2S:75.0:rcp_ad_bus<12>, TS186=P2S:75.0:rcp_ad_bus<12>, TS185=P2S:50.0:rcp_ad_bus<11>, TS184=P2S:75.0:rcp_ad_bus<7> END SYM, TSR23, TIMESPEC, TS183=P2S:75.0:rcp_ad_bus<7>, TS182=P2S:75.0:rcp_ad_bus<3>, TS181=P2S:75.0:rcp_ad_bus<3>, TS180=P2S:75.0:rcp_ad_bus<1>, TS179=P2S:75.0:rcp_ad_bus<1>, TS178=P2S:75.0:rcp_wr_n, TS177=P2S:75.0:rcp_ad_bus<14>, TS176=P2S:75.0:rcp_ad_bus<6> END SYM, TSR22, TIMESPEC, TS175=P2S:75.0:rcp_ad_bus<14>, TS174=P2S:75.0:rcp_ad_bus<6>, TS173=P2S:75.0:rcp_ad_bus<8>, TS172=P2S:75.0:rcp_ad_bus<8>, TS171=P2S:75.0:rcp_ad_bus<8>, TS170=P2S:75.0:rcp_ad_bus<8>, TS169=P2S:75.0:rcp_wr_n, TS168=P2S:75.0:rcp_ad_bus<1> END SYM, TSR21, TIMESPEC, TS167=P2S:75.0:rcp_ad_bus<3>, TS166=P2S:75.0:rcp_ad_bus<15>, TS165=P2S:75.0:fnc_cs_n, TS164=P2S:75.0:rcp_ad_bus<2>, TS163=P2S:75.0:rcp_ad_bus<4>, TS162=P2S:75.0:rcp_ad_bus<1>, TS161=P2S:75.0:rcp_ad_bus<3>, TS160=P2S:75.0:rcp_ad_bus<15> END SYM, TSR20, TIMESPEC, TS159=P2S:75.0:fnc_cs_n, TS158=P2S:75.0:rcp_ad_bus<2>, TS157=P2S:75.0:rcp_ad_bus<4>, TS156=P2S:75.0:rcp_ad_bus<3>, TS155=P2S:75.0:rcp_ad_bus<15>, TS154=P2S:75.0:fnc_cs_n, TS153=P2S:75.0:rcp_ad_bus<1>, TS152=P2S:75.0:rcp_ad_bus<2> END SYM, TSR19, TIMESPEC, TS151=P2S:75.0:rcp_ad_bus<4>, TS150=P2S:75.0:rcp_ad_bus<3>, TS149=P2S:75.0:rcp_ad_bus<15>, TS148=P2S:75.0:fnc_cs_n, TS147=P2S:75.0:rcp_ad_bus<1>, TS146=P2S:75.0:rcp_ad_bus<2>, TS145=P2S:75.0:rcp_ad_bus<4>, TS144=P2S:75.0:rcp_ad_bus<1> END SYM, TSR18, TIMESPEC, TS143=P2S:75.0:rcp_ad_bus<1>, TS142=P2S:25.0:rcp_ale, TS141=P2S:75.0:rcp_wr_n, TS140=P2S:25.0:rcp_ale, TS139=P2S:75.0:rcp_wr_n, TS138=P2S:75.0:rcp_ad_bus<9>, TS137=P2S:75.0:rcp_ad_bus<9>, TS136=P2S:75.0:rcp_ad_bus<14> END SYM, TSR17, TIMESPEC, TS135=P2S:75.0:rcp_ad_bus<14>, TS134=P2S:50.0:rcp_ad_bus<5>, TS133=P2S:75.0:rcp_ad_bus<13>, TS132=P2S:75.0:rcp_ad_bus<13>, TS131=P2S:50.0:rcp_ad_bus<10>, TS130=P2S:75.0:rcp_ad_bus<2>, TS129=P2S:75.0:rcp_ad_bus<2>, TS128=P2S:75.0:rcp_ad_bus<0> END SYM, TSR16, TIMESPEC, TS127=P2S:75.0:rcp_ad_bus<0>, TS126=P2S:75.0:rcp_ad_bus<1>, TS125=P2S:75.0:rcp_ad_bus<1>, TS124=P2S:75.0:rcp_ad_bus<3>, TS123=P2S:75.0:rcp_ad_bus<3>, TS122=P2S:75.0:fnc_cs_n, TS121=P2S:75.0:rcp_ad_bus<15>, TS120=P2S:75.0:rcp_ad_bus<4> END SYM, TSR15, TIMESPEC, TS119=P2S:75.0:rcp_ad_bus<2>, TS118=P2S:75.0:rcp_ad_bus<1>, TS117=P2S:75.0:rcp_ad_bus<3>, TS116=P2S:75.0:fnc_cs_n, TS115=P2S:75.0:rcp_ad_bus<15>, TS114=P2S:75.0:rcp_ad_bus<4>, TS113=P2S:75.0:rcp_ad_bus<2>, TS112=P2S:75.0:rcp_ad_bus<1> END SYM, TSR14, TIMESPEC, TS111=P2S:75.0:rcp_ad_bus<3>, TS110=P2S:75.0:rcp_ad_bus<15>, TS109=P2S:75.0:rcp_ad_bus<7>, TS108=P2S:75.0:rcp_ad_bus<15>, TS107=P2S:75.0:rcp_ad_bus<7>, TS106=P2S:75.0:rcp_ad_bus<9>, TS105=P2S:75.0:rcp_ad_bus<9>, TS104=P2S:75.0:rcp_ad_bus<0> END SYM, TSR13, TIMESPEC, TS103=P2S:75.0:rcp_ad_bus<0>, TS102=P2S:75.0:rcp_ad_bus<8>, TS101=P2S:75.0:rcp_ad_bus<8>, TS100=P2S:75.0:rcp_ad_bus<15>, TS99=P2S:75.0:rcp_ad_bus<15>, TS98=P2S:50.0:rcp_ad_bus<4>, TS97=P2S:75.0:rcp_ad_bus<14>, TS96=P2S:75.0:rcp_ad_bus<14> END SYM, TSR12, TIMESPEC, TS95=P2S:75.0:rcp_ad_bus<15>, TS94=P2S:75.0:rcp_ad_bus<15>, TS93=P2S:75.0:rcp_ad_bus<1>, TS92=P2S:75.0:rcp_ad_bus<1>, TS91=P2S:75.0:rcp_ad_bus<0>, TS90=P2S:75.0:rcp_ad_bus<0>, TS89=P2S:75.0:rcp_ad_bus<11>, TS88=P2S:75.0:rcp_ad_bus<11> END SYM, TSR11, TIMESPEC, TS87=P2S:25.0:rcp_ale, TS86=P2S:75.0:rcp_wr_n, TS85=P2S:75.0:rcp_ad_bus<7>, TS84=P2S:75.0:rcp_ad_bus<7>, TS83=P2S:75.0:rcp_ad_bus<0>, TS82=P2S:75.0:rcp_ad_bus<0>, TS81=P2S:50.0:rcp_ad_bus<3>, TS80=P2S:75.0:rcp_ad_bus<15> END SYM, TSR10, TIMESPEC, TS79=P2S:75.0:rcp_ad_bus<15>, TS78=P2S:75.0:rcp_wr_n, TS77=P2S:75.0:rcp_ad_bus<0>, TS76=P2S:75.0:rcp_ad_bus<0>, TS75=P2S:75.0:rcv_tune_lb, TS74=P2S:75.0:rcv_tune_lb, TS73=P2S:75.0:rcp_ad_bus<3>, TS72=P2S:75.0:fnc_cs_n END SYM, TSR9, TIMESPEC, TS71=P2S:75.0:rcp_ad_bus<15>, TS70=P2S:75.0:rcp_ad_bus<4>, TS69=P2S:75.0:rcp_ad_bus<2>, TS68=P2S:75.0:rcp_ad_bus<1>, TS67=P2S:75.0:rcp_ad_bus<3>, TS66=P2S:75.0:fnc_cs_n, TS65=P2S:75.0:rcp_ad_bus<15>, TS64=P2S:75.0:rcp_ad_bus<4> END SYM, TSR8, TIMESPEC, TS63=P2S:75.0:rcp_ad_bus<2>, TS62=P2S:75.0:rcp_ad_bus<1>, TS61=P2S:75.0:ptt, TS60=P2S:75.0:ptt, TS59=P2S:75.0:rcp_wr_n, TS58=P2S:75.0:rcp_ad_bus<2>, TS57=P2S:75.0:rcp_ad_bus<2>, TS56=P2S:75.0:rcp_ad_bus<0> END SYM, TSR7, TIMESPEC, TS55=P2S:75.0:rcp_ad_bus<0>, TS54=P2S:75.0:rcp_ad_bus<15>, TS53=P2S:75.0:rcp_ad_bus<15>, TS52=P2S:75.0:rcp_wr_n, TS51=P2S:75.0:rcp_wr_n, TS50=P2S:75.0:rcp_ad_bus<6>, TS49=P2S:75.0:rcp_ad_bus<6>, TS48=P2S:75.0:rcp_ad_bus<1> END SYM, TSR6, TIMESPEC, TS47=P2S:75.0:rcp_ad_bus<1>, TS46=P2S:50.0:rcp_ad_bus<2>, TS45=P2S:75.0:rcp_wr_n, TS44=P2S:75.0:rcp_ad_bus<3>, TS43=P2S:75.0:rcp_ad_bus<15>, TS42=P2S:75.0:fnc_cs_n, TS41=P2S:75.0:rcp_ad_bus<1>, TS40=P2S:75.0:rcp_ad_bus<2> END SYM, TSR5, TIMESPEC, TS39=P2S:75.0:rcp_ad_bus<4>, TS38=P2S:75.0:rcp_ad_bus<3>, TS37=P2S:75.0:rcp_ad_bus<15>, TS36=P2S:75.0:fnc_cs_n, TS35=P2S:75.0:rcp_ad_bus<1>, TS34=P2S:75.0:rcp_ad_bus<2>, TS33=P2S:75.0:rcp_ad_bus<4>, TS32=P2S:75.0:rcp_ad_bus<10> END SYM, TSR4, TIMESPEC, TS31=P2S:75.0:rcp_ad_bus<10>, TS30=P2S:75.0:rcp_wr_n, TS29=P2S:75.0:rcp_ad_bus<4>, TS28=P2S:75.0:rcp_ad_bus<4>, TS27=P2S:25.0:rcp_ale, TS26=P2S:75.0:rcp_ad_bus<5>, TS25=P2S:75.0:rcp_ad_bus<5>, TS24=P2S:75.0:rcp_ad_bus<14> END SYM, TSR3, TIMESPEC, TS23=P2S:75.0:rcp_ad_bus<14>, TS22=P2S:75.0:rcp_ad_bus<2>, TS21=P2S:75.0:rcp_ad_bus<1>, TS20=P2S:75.0:rcp_ad_bus<3>, TS19=P2S:75.0:rcp_ad_bus<15>, TS18=P2S:75.0:fnc_cs_n, TS17=P2S:75.0:rcp_ad_bus<4>, TS16=P2S:75.0:rcp_ad_bus<2> END SYM, TSR2, TIMESPEC, TS15=P2S:75.0:rcp_ad_bus<1>, TS14=P2S:75.0:rcp_ad_bus<3>, TS13=P2S:75.0:rcp_ad_bus<15>, TS12=P2S:75.0:fnc_cs_n, TS11=P2S:75.0:rcp_ad_bus<4>, TS10=P2S:50.0:rcp_a_bus<19>, TS9=P2S:75.0:rcp_ad_bus<5>, TS8=P2S:75.0:rcp_ad_bus<5> END SYM, TSR1, TIMESPEC, TS7=P2S:75.0:rcp_ad_bus<2>, TS6=P2S:75.0:rcp_ad_bus<2>, TS5=P2S:50.0:rcp_ad_bus<1>, TS4=P2S:25.0:rcp_ale, TS3=P2S:75.0:rcp_ad_bus<2>, TS2=P2S:75.0:rcp_ad_bus<2>, TS1=C2S:50.0, TS0=C2S:50.0 END SYM, U2455_map, HMAP, BLKNM=U2088, MAP=PUC PIN, I1, I, n2194 PIN, O, I, n2193 PIN, I2, I, n2165 PIN, I3, I, n1889 END SYM, U2456_map, FMAP, BLKNM=U2088, MAP=PUC PIN, I1, I, n2213 PIN, I2, I, n2212 PIN, O, I, n2194 PIN, I3, I, n1866 PIN, I4, I, n1864 END SYM, U2459_map, HMAP, BLKNM=U2086, MAP=PUC PIN, I1, I, bootstrap/rx/sreg274<5> PIN, I2, I, bootstrap/decode/n701<0> PIN, O, I, bootstrap/decode/n691 PIN, I3, I, bootstrap/decode/int_active686 END SYM, U2460_map, FMAP, BLKNM=U2086, MAP=PUC PIN, I1, I, n2130 PIN, I2, I, bootstrap/n53 PIN, O, I, bootstrap/decode/n701<0> END SYM, U2463_map, HMAP, BLKNM=U2084, MAP=PUC PIN, I1, I, n2170 PIN, I2, I, n1877 PIN, O, I, audio_interface/aud/n365 PIN, I3, I, audio_interface/aud/busy360 END SYM, U2466_map, FMAP, BLKNM=U2084, MAP=PUC PIN, O, I, n2170 PIN, I1, I, n1825 PIN, I2, I, audio_interface/aud/cycle<2> PIN, I3, I, audio_interface/aud/cycle<1> PIN, I4, I, audio_interface/aud/cycle<0> END SYM, U2469_map, HMAP, BLKNM=U2082, MAP=PUC PIN, I1, I, n2079 PIN, I2, I, n1871 PIN, O, I, antenna_interface/ant/n248 PIN, I3, I, antenna_interface/ant/int_busy243 END SYM, U2471_map, FMAP, BLKNM=U2082, MAP=PUC PIN, I1, I, n2216 PIN, I2, I, n2215 PIN, O, I, n1871 PIN, I3, I, antenna_interface/ant/ser_clk234 PIN, I4, I, antenna_interface/ant/clock<6> END SYM, U2472_map, HMAP, BLKNM=U2080, MAP=PUC PIN, I1, I, rtc_divide/clock<5> PIN, I2, I, rtc_divide/clock<4> PIN, I3, I, n2226 PIN, O, I, n2225 END SYM, U2473_map, FMAP, BLKNM=U2080, MAP=PUC PIN, I1, I, rtc_divide/clock<3> PIN, I2, I, rtc_divide/clock<2> PIN, I3, I, rtc_divide/clock<1> PIN, I4, I, rtc_divide/clock<0> PIN, O, I, n2226 END SYM, U2475_map, FMAP, BLKNM=U1709, MAP=PUC PIN, I1, I, synthesizer_interface/synth/cycle<4> PIN, I2, I, synthesizer_interface/synth/cycle<3> PIN, I3, I, synthesizer_interface/synth/cycle<2> PIN, I4, I, n2025 PIN, O, I, n2024 END SYM, U2478_map, FMAP, BLKNM=U1709, MAP=PUC PIN, I1, I, synthesizer_interface/synth/clock<4> PIN, I2, I, synthesizer_interface/synth/clock<3> PIN, I3, I, synthesizer_interface/synth/clock<2> PIN, I4, I, synthesizer_interface/synth/clock<1> PIN, O, I, n2027 END SYM, U2481_map, FMAP, BLKNM=U1707, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<4> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<2> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<1> PIN, I4, I, tod_receiver/tod_receiver/n217<0> PIN, O, I, n1808 END SYM, U2482_map, FMAP, BLKNM=U1707, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<5> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<3> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<10> PIN, I4, I, rcp_tod_rd<15> PIN, O, I, n2230 END SYM, U2484_map, FMAP, BLKNM=U1705, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<15> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<14> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<12> PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<11> PIN, O, I, n2231 END SYM, U2485_map, FMAP, BLKNM=U1705, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<5> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<3> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<10> PIN, I4, I, rcp_tod_rd<15> PIN, O, I, n2232 END SYM, U2488_map, FMAP, BLKNM=U1703, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<6> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<4> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<2> PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<1> PIN, O, I, n2233 END SYM, U2489_map, FMAP, BLKNM=U1703, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<9> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<8> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<7> PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<13> PIN, O, I, n1882 END SYM, U2493_map, FMAP, BLKNM=U1701, MAP=PUC PIN, I1, I, rcp_audio_rd<8> PIN, I2, I, n2021 PIN, O, I, audio_interface/aud/n394<4> PIN, I3, I, audio_interface/aud/clock<4> PIN, I4, I, audio_interface/aud/clock<2> END SYM, U2496_map, FMAP, BLKNM=U1701, MAP=PUC PIN, I1, I, rcp_audio_rd<8> PIN, I2, I, n2201 PIN, I3, I, n1880 PIN, I4, I, audio_interface/aud/read_cycle PIN, O, I, audio_interface/aud/n413<0> END SYM, U2498_map, FMAP, BLKNM=U1549, MAP=PUC PIN, I1, I, interrupt_source/divide<0> PIN, O, I, n2324 END SYM, U2499_map, FMAP, BLKNM=U1547, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2155 PIN, O, I, n1991 PIN, I3, I, bs_addr<17> END SYM, U2500_map, FMAP, BLKNM=U1547, MAP=PUC PIN, I1, I, rcp_audio_rd<8> PIN, O, I, n2171 PIN, I2, I, audio_interface/aud/cycle<1> PIN, I3, I, audio_interface/aud/cycle<0> END SYM, U2502_map, FMAP, BLKNM=U1545, MAP=PUC PIN, I1, I, n2080 PIN, O, I, n2079 PIN, I2, I, antenna_interface/ant/cycle<4> PIN, I3, I, antenna_interface/ant/cycle<3> PIN, I4, I, antenna_interface/ant/cycle<2> END SYM, U2503_map, FMAP, BLKNM=U1545, MAP=PUC PIN, I1, I, synthesizer_interface/synth/cycle<1> PIN, I2, I, synthesizer_interface/synth/cycle<0> PIN, I3, I, rcp_sts2_rd PIN, O, I, n2081 END SYM, U2505_map, FMAP, BLKNM=U1543, MAP=PUC PIN, I1, I, n1983 PIN, I2, I, n1982 PIN, O, I, iic_bus_interface/iic/n451 PIN, I3, I, iic_bus_interface/iic/cycle<2> PIN, I4, I, iic_bus_interface/iic/cycle<1> END SYM, U2506_map, FMAP, BLKNM=U1543, MAP=PUC PIN, O, I, interrupt_source/n131<0> PIN, I1, I, interrupt_source/divide<1> PIN, I2, I, interrupt_source/divide<0> END SYM, U2508_map, FMAP, BLKNM=U1541, MAP=PUC PIN, I1, I, n2055 PIN, I2, I, n1940 PIN, O, I, bootstrap/wr_source/r20/n51<0> PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U2510_map, FMAP, BLKNM=U1541, MAP=PUC PIN, I1, I, rcp_addr_tri/y12<4> PIN, I2, I, rcp_addr_tri/y12<3> PIN, I3, I, rcp_addr_tri/y12<2> PIN, I4, I, rcp_addr_tri/y12<1> PIN, O, I, n1833 END SYM, U2514_map, FMAP, BLKNM=U1848, MAP=PUC PIN, O, I, n2285 PIN, I1, I, antenna_interface/ant/shift_reg_Q276<6> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<7> END SYM, U2518_map, FMAP, BLKNM=U1848, MAP=PUC PIN, I1, I, audio_interface/aud/comm_sreg_Q421<1> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<10> PIN, O, I, n2335 END SYM, U2522_map, FMAP, BLKNM=U1846, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<4> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<5> PIN, O, I, n2343 END SYM, U2526_map, FMAP, BLKNM=U1846, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<7> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<8> PIN, O, I, n2342 END SYM, U2530_map, FMAP, BLKNM=U1844, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<2> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<3> PIN, O, I, n2351 END SYM, U2534_map, FMAP, BLKNM=U1844, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<5> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<6> PIN, O, I, n2350 END SYM, U2538_map, FMAP, BLKNM=U1842, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg<0> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<1> PIN, O, I, n2359 END SYM, U2542_map, FMAP, BLKNM=U1842, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<3> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<4> PIN, O, I, n2358 END SYM, U2546_map, FMAP, BLKNM=U1840, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<13> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<14> PIN, O, I, n2367 END SYM, U2550_map, FMAP, BLKNM=U1840, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<1> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<2> PIN, O, I, n2366 END SYM, U2554_map, FMAP, BLKNM=U1689, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<9> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2056 PIN, I4, I, address_generator/int_addr30<10> END SYM, U2558_map, FMAP, BLKNM=U1689, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<12> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2057 PIN, I4, I, address_generator/int_addr30<13> END SYM, U2562_map, FMAP, BLKNM=U1687, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<11> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2058 PIN, I4, I, address_generator/int_addr30<12> END SYM, U2566_map, FMAP, BLKNM=U1687, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<14> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2059 PIN, I4, I, address_generator/int_addr30<15> END SYM, U2570_map, FMAP, BLKNM=U1685, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<16> PIN, I2, I, synthesizer_interface/synth/shift_reg<15> PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, I4, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2218 END SYM, U2574_map, FMAP, BLKNM=U1685, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<19> PIN, I2, I, synthesizer_interface/synth/shift_reg<18> PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, I4, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2219 END SYM, U2578_map, FMAP, BLKNM=U1683, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<18> PIN, I2, I, synthesizer_interface/synth/shift_reg<17> PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, I4, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2220 END SYM, U2582_map, FMAP, BLKNM=U1683, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<22> PIN, I2, I, synthesizer_interface/synth/shift_reg<21> PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, I4, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2221 END SYM, U2586_map, FMAP, BLKNM=U1681, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<21> PIN, I2, I, synthesizer_interface/synth/shift_reg<20> PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, I4, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2124 END SYM, U2590_map, FMAP, BLKNM=U1681, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<3> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2125 PIN, I4, I, address_generator/int_addr30<4> END SYM, U2594_map, HMAP, BLKNM=U1989, MAP=PUC PIN, I1, I, n1911 PIN, I2, I, bootstrap/tx/cycle<1> PIN, I3, I, bootstrap/tx/cycle127<0> PIN, O, I, n2401 END SYM, U2595_map, FMAP, BLKNM=U1989, MAP=PUC PIN, O, I, n1911 PIN, I1, I, bootstrap/tx_busy PIN, I2, I, bootstrap/tx/cycle<0> END SYM, U2597_map, HMAP, BLKNM=U1987, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<0> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/edge_n PIN, I3, I, n2290 PIN, O, I, n2404 END SYM, U2599_map, FMAP, BLKNM=U1987, MAP=PUC PIN, O, I, n2290 PIN, I1, I, n1948 PIN, I2, I, n1905 PIN, I3, I, n1904 PIN, I4, I, n1903 END SYM, U2603_map, HMAP, BLKNM=U1984, MAP=PUC PIN, I1, I, n2258 PIN, I2, I, bootstrap/rx/cycle<1> PIN, I3, I, bootstrap/rx/cycle246<0> PIN, O, I, n2408 END SYM, U2604_map, FMAP, BLKNM=U1984, MAP=PUC PIN, O, I, n2258 PIN, I1, I, bootstrap/rx/cycle<0> PIN, I2, I, bootstrap/rx/busy END SYM, U2605_map, HMAP, BLKNM=U2078, MAP=PUC PIN, I1, I, n1916 PIN, O, I, n1913 PIN, I2, I, antenna_interface/ant/clock<4> PIN, I3, I, antenna_interface/ant/clock<3> END SYM, U2606_map, FMAP, BLKNM=U2078, MAP=PUC PIN, O, I, n1916 PIN, I1, I, antenna_interface/ant/clock<2> PIN, I2, I, antenna_interface/ant/clock<1> PIN, I3, I, antenna_interface/ant/clock<0> END SYM, U2609_map, HMAP, BLKNM=U2076, MAP=PUC PIN, O, I, receiver_interface/dac/n300<0> PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, n1959 PIN, I3, I, n1934 END SYM, U2612_map, FMAP, BLKNM=U2076, MAP=PUC PIN, I1, I, receiver_interface/dac/clock<3> PIN, I2, I, receiver_interface/dac/clock<2> PIN, I3, I, receiver_interface/dac/clock<1> PIN, I4, I, receiver_interface/dac/clock<0> PIN, O, I, n1959 END SYM, U2615_map, HMAP, BLKNM=U2074, MAP=PUC PIN, O, I, rcp_ad_tri/y12<7> PIN, I1, I, n1874 PIN, I2, I, bootstrap/wr_source/r_hih<7> PIN, I3, I, n2417 END SYM, U2618_map, FMAP, BLKNM=U2074, MAP=PUC PIN, I1, I, n303 PIN, I2, I, n2119 PIN, I3, I, n2118 PIN, I4, I, n2117 PIN, O, I, n2417 END SYM, U2621_map, HMAP, BLKNM=U2072, MAP=PUC PIN, O, I, rcp_ad_tri/y12<2> PIN, I1, I, n1874 PIN, I2, I, bootstrap/wr_source/r_hih<2> PIN, I3, I, n2422 END SYM, U2624_map, FMAP, BLKNM=U2072, MAP=PUC PIN, I1, I, n303 PIN, I2, I, n2064 PIN, I3, I, n2063 PIN, I4, I, n2062 PIN, O, I, n2422 END SYM, U2627_map, HMAP, BLKNM=U2070, MAP=PUC PIN, O, I, rcp_ad_tri/y12<0> PIN, I1, I, n1874 PIN, I2, I, bootstrap/wr_source/r_hih<0> PIN, I3, I, n2427 END SYM, U2630_map, FMAP, BLKNM=U2070, MAP=PUC PIN, I1, I, n303 PIN, I2, I, n2109 PIN, I3, I, n2108 PIN, I4, I, n2107 PIN, O, I, n2427 END SYM, U2632_map, FMAP, BLKNM=U1539, MAP=PUC PIN, I1, I, n1941 PIN, I2, I, n1940 PIN, O, I, bootstrap/wr_source/r22/n51<0> PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U2634_map, FMAP, BLKNM=U1539, MAP=PUC PIN, I1, I, n2113 PIN, I2, I, n1940 PIN, O, I, bootstrap/wr_source/r11/n51<0> PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U2636_map, FMAP, BLKNM=U1537, MAP=PUC PIN, I1, I, n2055 PIN, I2, I, n1940 PIN, O, I, bootstrap/wr_source/r10/n51<0> PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U2638_map, FMAP, BLKNM=U1537, MAP=PUC PIN, I1, I, n2113 PIN, I2, I, n1940 PIN, O, I, bootstrap/wr_source/r21/n51<0> PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U2640_map, FMAP, BLKNM=U1535, MAP=PUC PIN, I1, I, n2129 PIN, I2, I, n1940 PIN, O, I, bootstrap/wr_source/r13/n51<0> PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U2643_map, FMAP, BLKNM=U1535, MAP=PUC PIN, O, I, n1940 PIN, I1, I, n1417 PIN, I2, I, bootstrap/rx/sreg274<2> PIN, I3, I, bootstrap/rx/sreg274<1> PIN, I4, I, bootstrap/n53 END SYM, U2644_map, FMAP, BLKNM=U1533, MAP=PUC PIN, I1, I, n2213 PIN, I2, I, n2212 PIN, I3, I, n2211 PIN, O, I, n1869 PIN, I4, I, n1866 END SYM, U2646_map, FMAP, BLKNM=U1533, MAP=PUC PIN, I1, I, n280 PIN, I2, I, external_port/sync/wr_n_latch PIN, I3, I, external_port/sync/ale_select PIN, O, I, n2436 END SYM, U2649_map, FMAP, BLKNM=U1531, MAP=PUC PIN, I1, I, n2171 PIN, O, I, n2136 PIN, I2, I, audio_interface/aud/cycle<4> PIN, I3, I, audio_interface/aud/cycle<3> PIN, I4, I, audio_interface/aud/cycle<2> END SYM, U2653_map, FMAP, BLKNM=U1531, MAP=PUC PIN, I1, I, n2171 PIN, I2, I, n1878 PIN, I3, I, audio_interface/aud/cycle<3> PIN, I4, I, audio_interface/aud/cycle<2> PIN, O, I, n2442 END SYM, U2657_map, FMAP, BLKNM=U1838, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<11> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<12> PIN, O, I, n2450 END SYM, U2661_map, FMAP, BLKNM=U1838, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<14> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<15> PIN, O, I, n2449 END SYM, U2665_map, FMAP, BLKNM=U1836, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<9> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<10> PIN, O, I, n2458 END SYM, U2669_map, FMAP, BLKNM=U1836, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<12> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<13> PIN, O, I, n2457 END SYM, U2671_map, FMAP, BLKNM=U1834, MAP=PUC PIN, I1, I, antenna_interface/ant/int_busy PIN, I2, I, antenna_interface/ant/cycle<0> PIN, O, I, n2460 END SYM, U2672_map, FMAP, BLKNM=U1834, MAP=PUC PIN, O, I, n1981 PIN, I1, I, bootstrap/rx/sreg274<2> PIN, I2, I, bootstrap/rx/sreg274<1> END SYM, U2674_map, FMAP, BLKNM=U1832, MAP=PUC PIN, I1, I, antenna_interface/ant/int_busy PIN, I2, I, antenna_interface/ant/cycle<1> PIN, I3, I, antenna_interface/ant/cycle<0> PIN, O, I, n2465 END SYM, U2677_map, FMAP, BLKNM=U1832, MAP=PUC PIN, I1, I, antenna_interface/ant/int_busy PIN, I2, I, antenna_interface/ant/cycle<2> PIN, I3, I, antenna_interface/ant/cycle<1> PIN, I4, I, antenna_interface/ant/cycle<0> PIN, O, I, n2464 END SYM, U2680_map, FMAP, BLKNM=U1830, MAP=PUC PIN, I1, I, n1871 PIN, I2, I, antenna_interface/ant/int_busy PIN, I3, I, antenna_interface/ant/clock<1> PIN, I4, I, antenna_interface/ant/clock<0> PIN, O, I, n2470 END SYM, U2682_map, FMAP, BLKNM=U1830, MAP=PUC PIN, I1, I, n1871 PIN, I2, I, antenna_interface/ant/int_busy PIN, I3, I, antenna_interface/ant/clock<0> PIN, O, I, n2469 END SYM, U2686_map, FMAP, BLKNM=U1679, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<2> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2126 PIN, I4, I, address_generator/int_addr30<3> END SYM, U2690_map, FMAP, BLKNM=U1679, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<5> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2127 PIN, I4, I, address_generator/int_addr30<6> END SYM, U2694_map, FMAP, BLKNM=U1677, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<4> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2128 PIN, I4, I, address_generator/int_addr30<5> END SYM, U2698_map, FMAP, BLKNM=U1677, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<1> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2266 PIN, I4, I, address_generator/int_addr30<2> END SYM, U2701_map, FMAP, BLKNM=U1675, MAP=PUC PIN, O, I, n2268 PIN, I1, I, n2165 PIN, I2, I, n1841 PIN, I3, I, bs_addr<3> PIN, I4, I, bs_addr<2> END SYM, U2705_map, FMAP, BLKNM=U1675, MAP=PUC PIN, O, I, n2269 PIN, I1, I, n2208 PIN, I2, I, bs_addr<7> PIN, I3, I, bs_addr<6> END SYM, U2709_map, FMAP, BLKNM=U1673, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<7> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n1929 PIN, I4, I, address_generator/int_addr30<8> END SYM, U2713_map, FMAP, BLKNM=U1673, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<6> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n1930 PIN, I4, I, address_generator/int_addr30<7> END SYM, U2716_map, FMAP, BLKNM=U1671, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2035 PIN, O, I, n1931 PIN, I3, I, bs_addr<11> PIN, I4, I, bs_addr<10> END SYM, U2719_map, FMAP, BLKNM=U1671, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2052 PIN, O, I, n1932 PIN, I3, I, bs_addr<11> PIN, I4, I, bs_addr<10> END SYM, U2720_map, HMAP, BLKNM=U1978, MAP=PUC PIN, I1, I, n1944 PIN, O, I, bootstrap/rd_control/n106 PIN, I2, I, n2499 END SYM, U2722_map, FMAP, BLKNM=U1978, MAP=PUC PIN, I1, I, n2055 PIN, I2, I, n1980 PIN, I3, I, bootstrap/rx/sreg274<2> PIN, I4, I, bootstrap/rx/sreg274<1> PIN, O, I, n2499 END SYM, U2724_map, FMAP, BLKNM=U1976, MAP=PUC PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, address_generator/int_addr30<9> PIN, I3, I, address_generator/int_addr30<8> PIN, O, I, n2503 END SYM, U2726_map, FMAP, BLKNM=U1976, MAP=PUC PIN, I1, I, synthesizer_interface/synth/clock<0> PIN, I2, I, rcp_sts2_rd PIN, O, I, n2502 END SYM, U2728_map, FMAP, BLKNM=U1974, MAP=PUC PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, address_generator/int_addr30<9> PIN, I3, I, address_generator/int_addr30<8> PIN, O, I, n2507 END SYM, U2730_map, FMAP, BLKNM=U1974, MAP=PUC PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, address_generator/int_addr30<9> PIN, I3, I, address_generator/int_addr30<8> PIN, O, I, n2506 END SYM, U2731_map, FMAP, BLKNM=U1972, MAP=PUC PIN, I1, I, audio_interface/aud/ser_stb342 PIN, I2, I, audio_interface/aud/read_cycle PIN, O, I, n2510 END SYM, U2734_map, FMAP, BLKNM=U1972, MAP=PUC PIN, I1, I, rcp_addr_tri/y12<4> PIN, I2, I, rcp_addr_tri/y12<3> PIN, I3, I, rcp_addr_tri/y12<2> PIN, I4, I, rcp_addr_tri/y12<1> PIN, O, I, n2181 END SYM, U2736_map, FMAP, BLKNM=U1970, MAP=PUC PIN, O, I, n2286 PIN, I1, I, iic_bus_interface/iic/shift_reg_Q459<0> PIN, I2, I, iic_bus_interface/iic/busy427 END SYM, U2738_map, FMAP, BLKNM=U1970, MAP=PUC PIN, I1, I, receiver_interface/sync/wr_n_latch PIN, I2, I, receiver_interface/sync/ale_select PIN, I3, I, n280 PIN, O, I, n2513 END SYM, U2741_map, HMAP, BLKNM=U2068, MAP=PUC, TRIM PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, I, n2521 PIN, I3, I, n2520 END SYM, U2745_map, FMAP, BLKNM=U2068, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/int_busy137 PIN, I2, I, bootstrap/rd_sel PIN, I3, I, address_generator/int_addr30<7> PIN, I4, I, address_generator/int_addr30<15> PIN, O, I, n2520 END SYM, U2749_map, HMAP, BLKNM=U2066, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/sreg_Q150<8> PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, I, n2529 PIN, I3, I, n2528 END SYM, U2753_map, FMAP, BLKNM=U2066, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/int_busy137 PIN, I2, I, bootstrap/rd_sel PIN, I3, I, address_generator/int_addr30<6> PIN, I4, I, address_generator/int_addr30<14> PIN, O, I, n2528 END SYM, U2757_map, HMAP, BLKNM=U2064, MAP=PUC PIN, I1, I, rtc_divide/clock<6> PIN, I2, I, rtc_divide/clk111 PIN, I3, I, n2225 PIN, O, I, n2534 END SYM, U2760_map, FMAP, BLKNM=U2064, MAP=PUC PIN, I1, I, rtc_divide/clock<6> PIN, I2, I, rtc_divide/clock<5> PIN, O, I, rtc_divide/clk111 PIN, I3, I, n2023 PIN, I4, I, n1876 END SYM, U2763_map, HMAP, BLKNM=U2062, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/sreg_Q150<7> PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, I, n2542 PIN, I3, I, n2541 END SYM, U2767_map, FMAP, BLKNM=U2062, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/int_busy137 PIN, I2, I, bootstrap/rd_sel PIN, I3, I, address_generator/int_addr30<5> PIN, I4, I, address_generator/int_addr30<13> PIN, O, I, n2541 END SYM, U2771_map, HMAP, BLKNM=U2060, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/sreg_Q150<6> PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, I, n2550 PIN, I3, I, n2549 END SYM, U2775_map, FMAP, BLKNM=U2060, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/int_busy137 PIN, I2, I, bootstrap/rd_sel PIN, I3, I, address_generator/int_addr30<4> PIN, I4, I, address_generator/int_addr30<12> PIN, O, I, n2549 END SYM, U2780_map, FMAP, BLKNM=U1529, MAP=PUC PIN, O, I, n2296 PIN, I1, I, n2021 PIN, I2, I, audio_interface/aud/clock<4> PIN, I3, I, audio_interface/aud/clock<2> PIN, I4, I, audio_interface/aud/clock<0> END SYM, U2782_map, FMAP, BLKNM=U1529, MAP=PUC PIN, I1, I, receiver_interface/dac/shift_reg<0> PIN, I2, I, receiver_interface/dac/busy285 PIN, O, I, n2556 END SYM, U2785_map, FMAP, BLKNM=U1527, MAP=PUC PIN, I1, I, rcp_addr_tri/y12<4> PIN, I2, I, rcp_addr_tri/y12<3> PIN, I3, I, rcp_addr_tri/y12<2> PIN, I4, I, rcp_addr_tri/y12<1> PIN, O, I, n2180 END SYM, U2787_map, FMAP, BLKNM=U1527, MAP=PUC PIN, O, I, n2018 PIN, I1, I, iic_bus_interface/iic/cycle<3> PIN, I2, I, iic_bus_interface/iic/cycle<2> PIN, I3, I, iic_bus_interface/iic/cycle<1> END SYM, U2790_map, FMAP, BLKNM=U1525, MAP=PUC PIN, O, I, n1868 PIN, I1, I, bootstrap/tx/cycle<3> PIN, I2, I, bootstrap/tx/cycle<2> PIN, I3, I, bootstrap/tx/cycle<1> PIN, I4, I, bootstrap/tx/cycle<0> END SYM, U2791_map, FMAP, BLKNM=U1525, MAP=PUC PIN, I1, I, n2212 PIN, I2, I, n2211 PIN, O, I, n1867 PIN, I3, I, n1866 PIN, I4, I, n1864 END SYM, U2792_map, HMAP, BLKNM=U1523, MAP=PUC PIN, I1, I, n1945 PIN, O, I, bootstrap/wr_control/n97 PIN, I2, I, bootstrap/wr_control/cycle_rst_n92 END SYM, U2793_map, FMAP, BLKNM=U1523, MAP=PUC PIN, O, I, n1945 PIN, I1, I, bootstrap/wr_control/cycle<2> PIN, I2, I, bootstrap/wr_control/cycle<1> PIN, I3, I, bootstrap/wr_control/cycle<0> END SYM, U2795_map, HMAP, BLKNM=U1521, MAP=PUC PIN, I1, I, n2215 PIN, I2, I, n1807 PIN, O, I, n1806 END SYM, U2798_map, FMAP, BLKNM=U1521, MAP=PUC PIN, I1, I, n1916 PIN, O, I, n1807 PIN, I2, I, antenna_interface/ant/ser_clk234 PIN, I3, I, antenna_interface/ant/clock<6> PIN, I4, I, antenna_interface/ant/clock<3> END SYM, U2803_map, FMAP, BLKNM=U1828, MAP=PUC PIN, I1, I, receiver_interface/dac/clock<3> PIN, I2, I, receiver_interface/dac/clock<2> PIN, I3, I, n2169 PIN, I4, I, n1861 PIN, O, I, n2571 END SYM, U2807_map, FMAP, BLKNM=U1828, MAP=PUC PIN, I1, I, receiver_interface/dac/clock<3> PIN, I2, I, receiver_interface/dac/clock<2> PIN, I3, I, n2199 PIN, O, I, n1861 PIN, I4, I, n1840 END SYM, U2809_map, FMAP, BLKNM=U1826, MAP=PUC PIN, I1, I, bootstrap/rd_control/cycle<0> PIN, O, I, bootstrap/rd_control/cycle119<0> PIN, I2, I, bootstrap/rd_control/cyc_rst_n END SYM, U2811_map, FMAP, BLKNM=U1826, MAP=PUC PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, iic_bus_interface/iic/cycle<0> PIN, O, I, n2574 END SYM, U2813_map, FMAP, BLKNM=U1824, MAP=PUC PIN, I1, I, bootstrap/tx_busy PIN, I2, I, bootstrap/tx/cycle<0> PIN, O, I, bootstrap/tx/cycle127<0> END SYM, U2817_map, FMAP, BLKNM=U1824, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<17> PIN, I2, I, synthesizer_interface/synth/shift_reg<16> PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, I4, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2217 END SYM, U2819_map, FMAP, BLKNM=U1822, MAP=PUC PIN, I1, I, receiver_interface/dac/cycle<0> PIN, I2, I, rcp_rcv_rd<10> PIN, O, I, n2583 END SYM, U2823_map, FMAP, BLKNM=U1822, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<10> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n1906 PIN, I4, I, address_generator/int_addr30<11> END SYM, U2827_map, FMAP, BLKNM=U1820, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<0> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/sdai_2247 PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/sdai_2 PIN, O, I, n2590 END SYM, U2830_map, FMAP, BLKNM=U1820, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/cycle<2> PIN, I2, I, tod_receiver/tod_receiver/cycle<1> PIN, I3, I, tod_receiver/tod_receiver/cycle<0> PIN, I4, I, n2188 PIN, O, I, n2589 END SYM, U2833_map, FMAP, BLKNM=U1669, MAP=PUC PIN, I1, I, n2193 PIN, I2, I, n2165 PIN, O, I, n2103 PIN, I3, I, bs_addr<13> PIN, I4, I, bs_addr<12> END SYM, U2836_map, FMAP, BLKNM=U1669, MAP=PUC PIN, I1, I, n2165 PIN, O, I, n2104 PIN, I2, I, n1889 PIN, I3, I, bs_addr<13> PIN, I4, I, bs_addr<12> END SYM, U2839_map, FMAP, BLKNM=U1667, MAP=PUC PIN, I1, I, n2165 PIN, O, I, n2105 PIN, I2, I, n1845 PIN, I3, I, bs_addr<9> PIN, I4, I, bs_addr<8> END SYM, U2842_map, FMAP, BLKNM=U1667, MAP=PUC PIN, I1, I, n2165 PIN, O, I, n2106 PIN, I2, I, n2054 PIN, I3, I, bs_addr<9> PIN, I4, I, bs_addr<8> END SYM, U2845_map, FMAP, BLKNM=U1665, MAP=PUC PIN, I1, I, rcp_iic_rd<8> PIN, O, I, n2248 PIN, I2, I, n1983 PIN, I3, I, iic_bus_interface/iic/cycle<2> PIN, I4, I, iic_bus_interface/iic/cycle<1> END SYM, U2847_map, FMAP, BLKNM=U1665, MAP=PUC PIN, O, I, n1983 PIN, I1, I, iic_bus_interface/iic/cycle<3> PIN, I2, I, iic_bus_interface/iic/cycle<0> END SYM, U2852_map, FMAP, BLKNM=U1663, MAP=PUC PIN, I1, I, n2156 PIN, O, I, n2012 PIN, I2, I, bs_addr<5> PIN, I3, I, bs_addr<4> END SYM, U2856_map, FMAP, BLKNM=U1663, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<20> PIN, I2, I, synthesizer_interface/synth/shift_reg<19> PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, I4, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2061 END SYM, U2858_map, FMAP, BLKNM=U1661, MAP=PUC PIN, I1, I, rcp_rcv_rd<0> PIN, I2, I, n2112 PIN, I3, I, n2111 PIN, O, I, n2107 PIN, I4, I, n1939 END SYM, U2861_map, FMAP, BLKNM=U1661, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<1> PIN, I2, I, rcp_audio_rd<0> PIN, I3, I, n2181 PIN, I4, I, n2180 PIN, O, I, n2108 END SYM, U2863_map, FMAP, BLKNM=U1968, MAP=PUC PIN, I1, I, synthesizer_interface/sync_low/wr_n_latch PIN, I2, I, synthesizer_interface/sync_low/ale_select PIN, I3, I, n280 PIN, O, I, n2613 END SYM, U2864_map, FMAP, BLKNM=U1968, MAP=PUC PIN, I1, I, n2213 PIN, I2, I, n2211 PIN, O, I, n1870 PIN, I3, I, n1866 PIN, I4, I, n1864 END SYM, U2866_map, FMAP, BLKNM=U1966, MAP=PUC PIN, I1, I, n2185 PIN, I2, I, address_generator/int_addr30<4> PIN, I3, I, address_generator/int_addr30<2> PIN, I4, I, address_generator/int_addr30<1> PIN, O, I, n2617 END SYM, U2868_map, FMAP, BLKNM=U1966, MAP=PUC PIN, I1, I, n280 PIN, I2, I, iic_bus_interface/sync/wr_n_latch PIN, I3, I, iic_bus_interface/sync/ale_select PIN, O, I, n2616 END SYM, U2870_map, FMAP, BLKNM=U1964, MAP=PUC PIN, I1, I, n2185 PIN, I2, I, address_generator/int_addr30<4> PIN, I3, I, address_generator/int_addr30<2> PIN, I4, I, address_generator/int_addr30<1> PIN, O, I, n2619 END SYM, U2871_map, FMAP, BLKNM=U1964, MAP=PUC PIN, I1, I, n279 PIN, O, I, n2185 PIN, I2, I, address_generator/int_addr30<3> PIN, I3, I, address_generator/int_addr30<15> END SYM, U2873_map, FMAP, BLKNM=U1962, MAP=PUC PIN, I1, I, n280 PIN, I2, I, audio_interface/sync/wr_n_latch PIN, I3, I, audio_interface/sync/ale_select PIN, O, I, n2623 END SYM, U2875_map, FMAP, BLKNM=U1962, MAP=PUC PIN, I1, I, bootstrap/rd_control/cycle<2> PIN, I2, I, bootstrap/rd_control/cycle<1> PIN, I3, I, bootstrap/rd_control/cycle<0> PIN, O, I, n2622 END SYM, U2877_map, FMAP, BLKNM=U1960, MAP=PUC PIN, I1, I, n2185 PIN, I2, I, address_generator/int_addr30<4> PIN, I3, I, address_generator/int_addr30<2> PIN, I4, I, address_generator/int_addr30<1> PIN, O, I, n2627 END SYM, U2879_map, FMAP, BLKNM=U1960, MAP=PUC PIN, I1, I, n280 PIN, I2, I, fill_output/sync/wr_n_latch PIN, I3, I, fill_output/sync/ale_select PIN, O, I, n2626 END SYM, U2882_map, HMAP, BLKNM=U2058, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/sreg_Q150<5> PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, I, n2635 PIN, I3, I, n2634 END SYM, U2886_map, FMAP, BLKNM=U2058, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/int_busy137 PIN, I2, I, bootstrap/rd_sel PIN, I3, I, address_generator/int_addr30<3> PIN, I4, I, address_generator/int_addr30<11> PIN, O, I, n2634 END SYM, U2890_map, HMAP, BLKNM=U2056, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/sreg_Q150<4> PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, I, n2643 PIN, I3, I, n2642 END SYM, U2894_map, FMAP, BLKNM=U2056, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/int_busy137 PIN, I2, I, bootstrap/rd_sel PIN, I3, I, address_generator/int_addr30<2> PIN, I4, I, address_generator/int_addr30<10> PIN, O, I, n2642 END SYM, U2898_map, HMAP, BLKNM=U2054, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/sreg_Q150<3> PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, I, n2651 PIN, I3, I, n2650 END SYM, U2902_map, FMAP, BLKNM=U2054, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/int_busy137 PIN, I2, I, bootstrap/rd_sel PIN, I3, I, address_generator/int_addr30<9> PIN, I4, I, address_generator/int_addr30<1> PIN, O, I, n2650 END SYM, U2905_map, HMAP, BLKNM=U2052, MAP=PUC PIN, I1, I, n2073 PIN, I2, I, n2070 PIN, I3, I, iic_bus_interface/iic/clock<6> PIN, O, I, n2653 END SYM, U2906_map, FMAP, BLKNM=U2052, MAP=PUC PIN, I1, I, n2087 PIN, O, I, n2073 PIN, I2, I, iic_bus_interface/iic/clock<5> PIN, I3, I, iic_bus_interface/iic/clock<4> PIN, I4, I, iic_bus_interface/iic/clock<3> END SYM, U2908_map, HMAP, BLKNM=U2050, MAP=PUC PIN, I1, I, n2087 PIN, I2, I, n2070 PIN, I3, I, iic_bus_interface/iic/clock<3> PIN, O, I, n2655 END SYM, U2909_map, FMAP, BLKNM=U2050, MAP=PUC PIN, O, I, n2087 PIN, I1, I, iic_bus_interface/iic/clock<2> PIN, I2, I, iic_bus_interface/iic/clock<1> PIN, I3, I, iic_bus_interface/iic/clock<0> END SYM, U2911_map, FMAP, BLKNM=U1519, MAP=PUC PIN, I1, I, bootstrap/rx/cycle<0> PIN, O, I, bootstrap/rx/cycle246<0> PIN, I2, I, bootstrap/rx/busy END SYM, U2915_map, FMAP, BLKNM=U1519, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<7> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<8> PIN, O, I, n2660 END SYM, U2916_map, HMAP, BLKNM=U1517, MAP=PUC PIN, I1, I, n2149 PIN, I2, I, n2148 PIN, O, I, n2661 END SYM, U2917_map, FMAP, BLKNM=U1517, MAP=PUC PIN, I1, I, n2168 PIN, I2, I, n2167 PIN, O, I, n2149 PIN, I3, I, bootstrap/rx/div16<3> PIN, I4, I, bootstrap/rx/div16<2> END SYM, U2921_map, FMAP, BLKNM=U1515, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<13> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2060 PIN, I4, I, address_generator/int_addr30<14> END SYM, U2924_map, FMAP, BLKNM=U1515, MAP=PUC PIN, I1, I, bootstrap/rx/cycle<2> PIN, I2, I, bootstrap/rx/cycle<1> PIN, I3, I, bootstrap/rx/cycle<0> PIN, I4, I, bootstrap/rx/busy PIN, O, I, n2667 END SYM, U2925_map, HMAP, BLKNM=U1513, MAP=PUC PIN, I1, I, n1890 PIN, I2, I, bootstrap/rx/baud16<5> PIN, I3, I, bootstrap/rx/baud16<4> PIN, O, I, n2669 END SYM, U2927_map, FMAP, BLKNM=U1513, MAP=PUC PIN, O, I, n1890 PIN, I1, I, bootstrap/rx/baud16<3> PIN, I2, I, bootstrap/rx/baud16<2> PIN, I3, I, bootstrap/rx/baud16<1> PIN, I4, I, bootstrap/rx/baud16<0> END SYM, U2930_map, HMAP, BLKNM=U1511, MAP=PUC PIN, I1, I, n2215 PIN, I2, I, n1871 PIN, I3, I, n1807 PIN, O, I, antenna_interface/ant/n239 END SYM, U2932_map, FMAP, BLKNM=U1511, MAP=PUC PIN, O, I, n2215 PIN, I1, I, antenna_interface/ant/clock<7> PIN, I2, I, antenna_interface/ant/clock<5> PIN, I3, I, antenna_interface/ant/clock<4> END SYM, U2934_map, HMAP, BLKNM=U2198, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/cycle<3> PIN, I2, I, n2188 PIN, O, I, n2676 PIN, I3, I, n2675 END SYM, U2935_map, FMAP, BLKNM=U2198, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/cycle<2> PIN, I2, I, tod_receiver/tod_receiver/cycle<1> PIN, I3, I, tod_receiver/tod_receiver/cycle<0> PIN, O, I, n2675 END SYM, U2937_map, FMAP, BLKNM=U2198, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/stb192 PIN, I2, I, tod_receiver/tod_receiver/active PIN, O, I, n2188 END SYM, U2939_map, HMAP, BLKNM=U2196, MAP=PUC PIN, O, I, tod_receiver/tod_receiver/n188 PIN, I1, I, tod_receiver/tod_receiver/active174 PIN, I2, I, n2680 PIN, I3, I, n2679 END SYM, U2941_map, FMAP, BLKNM=U2196, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<11> PIN, I2, I, n2233 PIN, I3, I, n2232 PIN, I4, I, n1882 PIN, O, I, n2680 END SYM, U2942_map, FMAP, BLKNM=U2196, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<15> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<14> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<12> PIN, I4, I, tod_receiver/tod_receiver/n217<0> PIN, O, I, n2679 END SYM, U2945_map, HMAP, BLKNM=U2194, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/n188 PIN, O, I, tod_receiver/tod_receiver/n179 PIN, I2, I, n2685 PIN, I3, I, n2684 END SYM, U2947_map, FMAP, BLKNM=U2194, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<13> PIN, I2, I, n2231 PIN, I3, I, n2230 PIN, I4, I, n1808 PIN, O, I, n2685 END SYM, U2948_map, FMAP, BLKNM=U2194, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<9> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<8> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<7> PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<6> PIN, O, I, n2684 END SYM, U2951_map, HMAP, BLKNM=U2192, MAP=PUC PIN, O, I, synthesizer_interface/synth/n299 PIN, I1, I, synthesizer_interface/synth/clock<3> PIN, I2, I, n2025 PIN, I3, I, n2690 END SYM, U2953_map, FMAP, BLKNM=U2192, MAP=PUC PIN, I1, I, synthesizer_interface/synth/clock<4> PIN, I2, I, synthesizer_interface/synth/clock<2> PIN, I3, I, synthesizer_interface/synth/clock<1> PIN, I4, I, synthesizer_interface/synth/clock<0> PIN, O, I, n2690 END SYM, U2955_map, FMAP, BLKNM=U2192, MAP=PUC PIN, I1, I, synthesizer_interface/synth/clock<0> PIN, I2, I, n2027 PIN, O, I, n2025 END SYM, U2956_map, HMAP, BLKNM=U2190, MAP=PUC PIN, I1, I, receiver_interface/dac/ser_clk258 PIN, O, I, receiver_interface/dac/n263 PIN, I2, I, n2695 END SYM, U2959_map, FMAP, BLKNM=U2190, MAP=PUC PIN, I1, I, receiver_interface/dac/cycle<3> PIN, I2, I, receiver_interface/dac/cycle<2> PIN, I3, I, n2256 PIN, I4, I, n1959 PIN, O, I, n2695 END SYM, U2961_map, FMAP, BLKNM=U2190, MAP=PUC PIN, O, I, receiver_interface/dac/ser_clk258 PIN, I1, I, receiver_interface/dac/clock<3> PIN, I2, I, receiver_interface/dac/clock<2> PIN, I3, I, receiver_interface/dac/clock<1> PIN, I4, I, receiver_interface/dac/clock<0> END SYM, U2966_map, FMAP, BLKNM=U1818, MAP=PUC PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, rcp_rcv_rd<5> PIN, O, I, n2291 PIN, I3, I, address_generator/int_addr30<6> END SYM, U2969_map, FMAP, BLKNM=U1818, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/stb192 PIN, I2, I, tod_receiver/tod_receiver/cycle<1> PIN, I3, I, tod_receiver/tod_receiver/cycle<0> PIN, I4, I, tod_receiver/tod_receiver/active PIN, O, I, n2701 END SYM, U2973_map, FMAP, BLKNM=U1816, MAP=PUC PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, rcp_rcv_rd<3> PIN, I3, I, address_generator/int_addr30<4> PIN, O, I, n2710 END SYM, U2977_map, FMAP, BLKNM=U1816, MAP=PUC PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, rcp_rcv_rd<6> PIN, I3, I, address_generator/int_addr30<7> PIN, O, I, n2709 END SYM, U2982_map, FMAP, BLKNM=U1814, MAP=PUC PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, rcp_rcv_rd<1> PIN, I3, I, address_generator/int_addr30<2> PIN, O, I, n2719 END SYM, U2986_map, FMAP, BLKNM=U1814, MAP=PUC PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, rcp_rcv_rd<4> PIN, I3, I, address_generator/int_addr30<5> PIN, O, I, n2718 END SYM, U2991_map, FMAP, BLKNM=U1812, MAP=PUC PIN, I1, I, receiver_interface/dac/shift_reg<1> PIN, I2, I, receiver_interface/dac/busy285 PIN, I3, I, address_generator/int_addr30<0> PIN, O, I, n2728 END SYM, U2995_map, FMAP, BLKNM=U1812, MAP=PUC PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, rcp_rcv_rd<2> PIN, I3, I, address_generator/int_addr30<3> PIN, O, I, n2727 END SYM, U3000_map, FMAP, BLKNM=U1810, MAP=PUC PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, rcp_rcv_rd<7> PIN, I3, I, address_generator/int_addr30<8> PIN, O, I, n2737 END SYM, U3004_map, FMAP, BLKNM=U1810, MAP=PUC PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, rcp_rcv_rd<0> PIN, I3, I, address_generator/int_addr30<1> PIN, O, I, n2736 END SYM, U3008_map, FMAP, BLKNM=U1659, MAP=PUC PIN, I1, I, rcp_sts1_rd PIN, I2, I, rcp_iic_rd<0> PIN, O, I, n1939 PIN, I3, I, n1921 PIN, I4, I, n1875 END SYM, U3011_map, FMAP, BLKNM=U1659, MAP=PUC PIN, I1, I, rcp_sts2_rd PIN, O, I, n2112 PIN, I2, I, n1833 PIN, I3, I, n1799 PIN, I4, I, n1408 END SYM, U3014_map, FMAP, BLKNM=U1657, MAP=PUC PIN, I1, I, n2210 PIN, O, I, n2109 PIN, I2, I, n2089 PIN, I3, I, bootstrap/wr_source/r_mid<0> PIN, I4, I, bootstrap/wr_source/r_low<0> END SYM, U3017_map, FMAP, BLKNM=U1657, MAP=PUC PIN, I1, I, n303 PIN, I2, I, n2260 PIN, I3, I, n2259 PIN, I4, I, n1984 PIN, O, I, n1908 END SYM, U3020_map, FMAP, BLKNM=U1655, MAP=PUC PIN, I1, I, rcp_sts2_rd PIN, I2, I, rcp_rcv_rd<1> PIN, O, I, n2259 PIN, I3, I, n2111 PIN, I4, I, n1799 END SYM, U3023_map, FMAP, BLKNM=U1655, MAP=PUC PIN, I1, I, rcp_sts1_rd PIN, I2, I, rcp_iic_rd<1> PIN, O, I, n2260 PIN, I3, I, n1921 PIN, I4, I, n1875 END SYM, U3025_map, FMAP, BLKNM=U1653, MAP=PUC PIN, O, I, n2297 PIN, I1, I, bootstrap/rd_control/cycle<1> PIN, I2, I, bootstrap/rd_control/cycle<0> PIN, I3, I, bootstrap/rd_control/cyc_rst_n END SYM, U3027_map, FMAP, BLKNM=U1653, MAP=PUC PIN, I1, I, bootstrap/rx/div16<0> PIN, I2, I, bootstrap/rx/busy PIN, O, I, n2752 END SYM, U3029_map, FMAP, BLKNM=U1651, MAP=PUC PIN, O, I, n1937 PIN, I1, I, bootstrap/rx/baud16<3> PIN, I2, I, bootstrap/rx/baud16<2> PIN, I3, I, bootstrap/rx/baud16<1> PIN, I4, I, bootstrap/rx/baud16<0> END SYM, U3035_map, FMAP, BLKNM=U1651, MAP=PUC PIN, I1, I, n2167 PIN, I2, I, bootstrap/rx/baud16<2> PIN, I3, I, bootstrap/rx/baud16<1> PIN, I4, I, bootstrap/rx/baud16<0> PIN, O, I, n2759 END SYM, U3037_map, FMAP, BLKNM=U1958, MAP=PUC PIN, I1, I, n280 PIN, I2, I, antenna_interface/sync/wr_n_latch PIN, I3, I, antenna_interface/sync/ale_select PIN, O, I, n2763 END SYM, U3039_map, FMAP, BLKNM=U1958, MAP=PUC PIN, I1, I, n280 PIN, I2, I, fan_interface/sync/wr_n_latch PIN, I3, I, fan_interface/sync/ale_select PIN, O, I, n2762 END SYM, U3043_map, FMAP, BLKNM=U1956, MAP=PUC PIN, O, I, rcp_ad_tri/y_tri_enable<0> PIN, I1, I, n303 PIN, I2, I, n281 PIN, I3, I, n280 PIN, I4, I, n279 END SYM, U3046_map, FMAP, BLKNM=U1956, MAP=PUC PIN, I1, I, n2185 PIN, I2, I, address_generator/int_addr30<4> PIN, I3, I, address_generator/int_addr30<2> PIN, I4, I, address_generator/int_addr30<1> PIN, O, I, n2769 END SYM, U3048_map, FMAP, BLKNM=U1954, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/sreg_Q150<1> PIN, O, I, bootstrap/tx/sreg146<0> PIN, I2, I, bootstrap/tx/int_busy137 END SYM, U3050_map, FMAP, BLKNM=U1954, MAP=PUC PIN, I1, I, n280 PIN, I2, I, internal_port/sync/wr_n_latch PIN, I3, I, internal_port/sync/ale_select PIN, O, I, n2772 END SYM, U3052_map, FMAP, BLKNM=U1952, MAP=PUC PIN, I1, I, tod_receiver/sync/wr_n_latch PIN, I2, I, tod_receiver/sync/ale_select PIN, I3, I, n280 PIN, O, I, n2776 END SYM, U3055_map, FMAP, BLKNM=U1952, MAP=PUC PIN, I1, I, n2185 PIN, O, I, internal_port/sync/ale_select67 PIN, I2, I, address_generator/int_addr30<4> PIN, I3, I, address_generator/int_addr30<2> PIN, I4, I, address_generator/int_addr30<1> END SYM, U3057_map, FMAP, BLKNM=U1950, MAP=PUC PIN, I1, I, n1941 PIN, I2, I, n1940 PIN, O, I, bootstrap/wr_source/r12/n51<0> PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U3060_map, FMAP, BLKNM=U1950, MAP=PUC PIN, I1, I, n2185 PIN, I2, I, address_generator/int_addr30<4> PIN, I3, I, address_generator/int_addr30<2> PIN, I4, I, address_generator/int_addr30<1> PIN, O, I, n2780 END SYM, U3064_map, FMAP, BLKNM=U1798, MAP=PUC PIN, I1, I, rcp_iic_rd<3> PIN, I2, I, iic_bus_interface/iic/busy427 PIN, I3, I, address_generator/int_addr30<4> PIN, O, I, n2789 END SYM, U3068_map, FMAP, BLKNM=U1798, MAP=PUC PIN, I1, I, rcp_iic_rd<2> PIN, I2, I, iic_bus_interface/iic/busy427 PIN, I3, I, address_generator/int_addr30<3> PIN, O, I, n2788 END SYM, U3073_map, FMAP, BLKNM=U1796, MAP=PUC PIN, I1, I, rcp_iic_rd<1> PIN, I2, I, iic_bus_interface/iic/busy427 PIN, I3, I, address_generator/int_addr30<2> PIN, O, I, n2798 END SYM, U3077_map, FMAP, BLKNM=U1796, MAP=PUC PIN, I1, I, rcp_iic_rd<0> PIN, I2, I, iic_bus_interface/iic/busy427 PIN, I3, I, address_generator/int_addr30<1> PIN, O, I, n2797 END SYM, U3082_map, FMAP, BLKNM=U1794, MAP=PUC PIN, I1, I, rcp_iic_rd<9> PIN, I2, I, iic_bus_interface/iic/busy427 PIN, I3, I, address_generator/int_addr30<0> PIN, O, I, n2807 END SYM, U3086_map, FMAP, BLKNM=U1794, MAP=PUC PIN, I1, I, iic_bus_interface/iic/shift_reg_Q459<1> PIN, I2, I, iic_bus_interface/iic/busy427 PIN, I3, I, address_generator/int_addr30<10> PIN, O, I, n2806 END SYM, U3089_map, FMAP, BLKNM=U1792, MAP=PUC PIN, I1, I, rcp_audio_rd<8> PIN, O, I, n2292 PIN, I2, I, audio_interface/aud/cycle<0> END SYM, U3091_map, FMAP, BLKNM=U1792, MAP=PUC PIN, I1, I, synthesizer_interface/synth/cycle<1> PIN, I2, I, synthesizer_interface/synth/cycle<0> PIN, I3, I, rcp_sts2_rd PIN, O, I, n2810 END SYM, U3094_map, FMAP, BLKNM=U1790, MAP=PUC PIN, I1, I, rcp_audio_rd<8> PIN, I2, I, audio_interface/aud/cycle<2> PIN, I3, I, audio_interface/aud/cycle<1> PIN, I4, I, audio_interface/aud/cycle<0> PIN, O, I, n2815 END SYM, U3096_map, FMAP, BLKNM=U1790, MAP=PUC PIN, I1, I, rcp_audio_rd<8> PIN, I2, I, audio_interface/aud/cycle<1> PIN, I3, I, audio_interface/aud/cycle<0> PIN, O, I, n2814 END SYM, U3099_map, HMAP, BLKNM=U2048, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/sreg_Q150<2> PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, I, n2823 PIN, I3, I, n2822 END SYM, U3103_map, FMAP, BLKNM=U2048, MAP=PUC, TRIM PIN, I1, I, bootstrap/tx/int_busy137 PIN, I2, I, bootstrap/rd_sel PIN, I3, I, address_generator/int_addr30<8> PIN, I4, I, address_generator/int_addr30<0> PIN, O, I, n2822 END SYM, U3107_map, HMAP, BLKNM=U2046, MAP=PUC PIN, I1, I, n2168 PIN, I2, I, bootstrap/rx/n252<3> PIN, I3, I, bootstrap/rx/div16<2> PIN, O, I, n2826 END SYM, U3108_map, FMAP, BLKNM=U2046, MAP=PUC PIN, O, I, n2168 PIN, I1, I, bootstrap/rx/div16<1> PIN, I2, I, bootstrap/rx/div16<0> END SYM, U3111_map, HMAP, BLKNM=U2044, MAP=PUC PIN, I1, I, n2213 PIN, I2, I, bootstrap/incr_en48 PIN, O, I, n2836 PIN, I3, I, n2835 END SYM, U3118_map, FMAP, BLKNM=U2044, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2156 PIN, I3, I, n1867 PIN, I4, I, bs_addr<4> PIN, O, I, n2835 END SYM, U3121_map, HMAP, BLKNM=U2042, MAP=PUC PIN, I1, I, n1864 PIN, I2, I, bootstrap/rx/sreg274<4> PIN, O, I, n2846 PIN, I3, I, n2845 END SYM, U3128_map, FMAP, BLKNM=U2042, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n1869 PIN, I3, I, bs_addr<1> PIN, I4, I, bs_addr<0> PIN, O, I, n2845 END SYM, U3131_map, HMAP, BLKNM=U2040, MAP=PUC PIN, I1, I, n1907 PIN, I2, I, antenna_interface/ant/n268<4> PIN, I3, I, antenna_interface/ant/clock<7> PIN, O, I, n2849 END SYM, U3132_map, FMAP, BLKNM=U2040, MAP=PUC PIN, I1, I, n2216 PIN, O, I, n1907 PIN, I2, I, antenna_interface/ant/clock<6> PIN, I3, I, antenna_interface/ant/clock<5> PIN, I4, I, antenna_interface/ant/clock<4> END SYM, U3135_map, HMAP, BLKNM=U1509, MAP=PUC PIN, I1, I, n2234 PIN, I2, I, n1958 PIN, O, I, iic_bus_interface/iic/n461<0> PIN, I3, I, iic_bus_interface/iic/busy427 END SYM, U3138_map, FMAP, BLKNM=U1509, MAP=PUC PIN, O, I, n1958 PIN, I1, I, iic_bus_interface/iic/clock<7> PIN, I2, I, iic_bus_interface/iic/clock<6> PIN, I3, I, iic_bus_interface/iic/clock<5> PIN, I4, I, iic_bus_interface/iic/clock<2> END SYM, U3142_map, HMAP, BLKNM=U1507, MAP=PUC PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, n2234 PIN, I3, I, n1958 PIN, O, I, iic_bus_interface/iic/n489<3> END SYM, U3145_map, FMAP, BLKNM=U1507, MAP=PUC PIN, O, I, n2234 PIN, I1, I, iic_bus_interface/iic/clock<4> PIN, I2, I, iic_bus_interface/iic/clock<3> PIN, I3, I, iic_bus_interface/iic/clock<1> PIN, I4, I, iic_bus_interface/iic/clock<0> END SYM, U3149_map, HMAP, BLKNM=U1505, MAP=PUC PIN, I1, I, receiver_interface/dac/clock<2> PIN, I2, I, n2199 PIN, I3, I, n2169 PIN, O, I, n2863 END SYM, U3151_map, FMAP, BLKNM=U1505, MAP=PUC PIN, I1, I, receiver_interface/dac/ser_clk258 PIN, I2, I, receiver_interface/dac/clock<1> PIN, I3, I, receiver_interface/dac/clock<0> PIN, I4, I, rcp_rcv_rd<10> PIN, O, I, n2169 END SYM, U3153_map, HMAP, BLKNM=U1503, MAP=PUC PIN, I1, I, n2167 PIN, O, I, n1938 PIN, I2, I, bootstrap/rx/baud16<1> PIN, I3, I, bootstrap/rx/baud16<0> END SYM, U3155_map, FMAP, BLKNM=U1503, MAP=PUC PIN, O, I, n2167 PIN, I1, I, n1933 PIN, I2, I, bootstrap/rx/baud16<6> PIN, I3, I, bootstrap/rx/baud16<5> PIN, I4, I, bootstrap/rx/baud16<4> END SYM, U3159_map, FMAP, BLKNM=U1501, MAP=PUC PIN, O, I, n2284 PIN, I1, I, audio_interface/aud/comm_sreg_Q421<4> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<13> END SYM, U3163_map, FMAP, BLKNM=U1501, MAP=PUC PIN, I1, I, n322 PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<0> PIN, O, I, n2872 END SYM, U3166_map, HMAP, BLKNM=U2188, MAP=PUC PIN, O, I, rcp_ad_tri/y12<9> PIN, I1, I, n1874 PIN, I2, I, bootstrap/wr_source/r_hih<9> PIN, I3, I, n2878 END SYM, U3169_map, FMAP, BLKNM=U2188, MAP=PUC PIN, I1, I, n303 PIN, I2, I, n2264 PIN, I3, I, n1925 PIN, I4, I, n1920 PIN, O, I, n2878 END SYM, U3171_map, FMAP, BLKNM=U2188, MAP=PUC PIN, I1, I, n303 PIN, O, I, n1874 PIN, I2, I, bootstrap/rx_data<0> PIN, I3, I, bootstrap/rx/sreg274<0> END SYM, U3172_map, HMAP, BLKNM=U2186, MAP=PUC PIN, O, I, rcp_ad_tri/y12<8> PIN, I1, I, n2884 PIN, I2, I, n2883 END SYM, U3175_map, FMAP, BLKNM=U2186, MAP=PUC PIN, I1, I, n303 PIN, I2, I, n2263 PIN, I3, I, n1874 PIN, I4, I, bootstrap/wr_source/r_hih<8> PIN, O, I, n2884 END SYM, U3178_map, FMAP, BLKNM=U2186, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, I3, I, bootstrap/wr_source/r_mid<8> PIN, I4, I, bootstrap/wr_source/r_low<8> PIN, O, I, n2883 END SYM, U3179_map, HMAP, BLKNM=U2184, MAP=PUC PIN, O, I, rcp_ad_tri/y12<5> PIN, I1, I, n2890 PIN, I2, I, n2889 END SYM, U3182_map, FMAP, BLKNM=U2184, MAP=PUC PIN, I1, I, n303 PIN, I2, I, n1951 PIN, I3, I, n1874 PIN, I4, I, bootstrap/wr_source/r_hih<5> PIN, O, I, n2890 END SYM, U3185_map, FMAP, BLKNM=U2184, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, I3, I, bootstrap/wr_source/r_mid<5> PIN, I4, I, bootstrap/wr_source/r_low<5> PIN, O, I, n2889 END SYM, U3186_map, HMAP, BLKNM=U2182, MAP=PUC PIN, O, I, rcp_ad_tri/y12<15> PIN, I1, I, n2897 PIN, I2, I, n2896 END SYM, U3190_map, FMAP, BLKNM=U2182, MAP=PUC PIN, I1, I, rcp_tod_rd<15> PIN, I2, I, n303 PIN, I3, I, n1874 PIN, I4, I, bootstrap/wr_source/r_hih<15> PIN, O, I, n2897 END SYM, U3193_map, FMAP, BLKNM=U2182, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, I3, I, bootstrap/wr_source/r_mid<15> PIN, I4, I, bootstrap/wr_source/r_low<15> PIN, O, I, n2896 END SYM, U3194_map, HMAP, BLKNM=U2180, MAP=PUC PIN, O, I, rcp_ad_tri/y12<14> PIN, I1, I, n2904 PIN, I2, I, n2903 END SYM, U3198_map, FMAP, BLKNM=U2180, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<15> PIN, I2, I, n303 PIN, I3, I, n1874 PIN, I4, I, bootstrap/wr_source/r_hih<14> PIN, O, I, n2904 END SYM, U3201_map, FMAP, BLKNM=U2180, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, I3, I, bootstrap/wr_source/r_mid<14> PIN, I4, I, bootstrap/wr_source/r_low<14> PIN, O, I, n2903 END SYM, U3202_map, FMAP, BLKNM=U1808, MAP=PUC PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, n332 PIN, O, I, n2910 END SYM, U3206_map, FMAP, BLKNM=U1808, MAP=PUC PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, rcp_rcv_rd<8> PIN, I3, I, address_generator/int_addr30<9> PIN, O, I, n2909 END SYM, U3209_map, FMAP, BLKNM=U1806, MAP=PUC PIN, I1, I, receiver_interface/dac/cycle<1> PIN, I2, I, receiver_interface/dac/cycle<0> PIN, I3, I, rcp_rcv_rd<10> PIN, O, I, n2915 END SYM, U3212_map, FMAP, BLKNM=U1806, MAP=PUC PIN, I1, I, receiver_interface/dac/cycle<2> PIN, I2, I, receiver_interface/dac/cycle<1> PIN, I3, I, receiver_interface/dac/cycle<0> PIN, I4, I, rcp_rcv_rd<10> PIN, O, I, n2914 END SYM, U3215_map, FMAP, BLKNM=U1804, MAP=PUC PIN, I1, I, synthesizer_interface/synth/cycle<2> PIN, I2, I, synthesizer_interface/synth/cycle<1> PIN, I3, I, synthesizer_interface/synth/cycle<0> PIN, I4, I, rcp_sts2_rd PIN, O, I, n2920 END SYM, U3217_map, FMAP, BLKNM=U1804, MAP=PUC PIN, I1, I, synthesizer_interface/synth/cycle<0> PIN, I2, I, rcp_sts2_rd PIN, O, I, n2919 END SYM, U3220_map, FMAP, BLKNM=U1802, MAP=PUC PIN, I1, I, receiver_interface/dac/ser_clk258 PIN, I2, I, receiver_interface/dac/clock<1> PIN, I3, I, receiver_interface/dac/clock<0> PIN, I4, I, rcp_rcv_rd<10> PIN, O, I, n2927 END SYM, U3224_map, FMAP, BLKNM=U1802, MAP=PUC PIN, I1, I, synthesizer_interface/synth/cycle<3> PIN, I2, I, synthesizer_interface/synth/cycle<2> PIN, I3, I, n2081 PIN, I4, I, n1879 PIN, O, I, n2926 END SYM, U3228_map, FMAP, BLKNM=U1800, MAP=PUC PIN, I1, I, rcp_iic_rd<5> PIN, I2, I, iic_bus_interface/iic/busy427 PIN, I3, I, address_generator/int_addr30<6> PIN, O, I, n2936 END SYM, U3232_map, FMAP, BLKNM=U1800, MAP=PUC PIN, I1, I, rcp_iic_rd<4> PIN, I2, I, iic_bus_interface/iic/busy427 PIN, I3, I, address_generator/int_addr30<5> PIN, O, I, n2935 END SYM, U3236_map, FMAP, BLKNM=U1649, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<2> PIN, I2, I, rcp_audio_rd<1> PIN, I3, I, n2181 PIN, I4, I, n2180 PIN, O, I, n1984 END SYM, U3239_map, FMAP, BLKNM=U1649, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, O, I, n1909 PIN, I3, I, bootstrap/wr_source/r_mid<1> PIN, I4, I, bootstrap/wr_source/r_low<1> END SYM, U3241_map, FMAP, BLKNM=U1647, MAP=PUC PIN, I1, I, rcp_rcv_rd<2> PIN, I2, I, n2111 PIN, O, I, n2062 PIN, I3, I, n1986 PIN, I4, I, n1985 END SYM, U3244_map, FMAP, BLKNM=U1647, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<3> PIN, I2, I, rcp_audio_rd<2> PIN, I3, I, n2181 PIN, I4, I, n2180 PIN, O, I, n2063 END SYM, U3247_map, FMAP, BLKNM=U1645, MAP=PUC PIN, I1, I, rcp_sts1_rd PIN, I2, I, rcp_iic_rd<2> PIN, O, I, n1985 PIN, I3, I, n1921 PIN, I4, I, n1875 END SYM, U3250_map, FMAP, BLKNM=U1645, MAP=PUC PIN, I1, I, rcp_sts2_rd PIN, I2, I, rcp_fill_rd PIN, O, I, n1986 PIN, I3, I, n1833 PIN, I4, I, n1799 END SYM, U3253_map, FMAP, BLKNM=U1643, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, O, I, n2064 PIN, I3, I, bootstrap/wr_source/r_mid<2> PIN, I4, I, bootstrap/wr_source/r_low<2> END SYM, U3256_map, FMAP, BLKNM=U1643, MAP=PUC PIN, I1, I, n303 PIN, I2, I, n2164 PIN, I3, I, n2163 PIN, I4, I, n2162 PIN, O, I, n2065 END SYM, U3257_map, FMAP, BLKNM=U1641, MAP=PUC PIN, I1, I, synthesizer_interface/synth/clock<2> PIN, I2, I, synthesizer_interface/synth/clock<1> PIN, I3, I, synthesizer_interface/synth/clock<0> PIN, O, I, n2120 END SYM, U3261_map, FMAP, BLKNM=U1641, MAP=PUC PIN, I1, I, rcp_audio_rd<7> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<8> PIN, O, I, n2955 END SYM, U3263_map, FMAP, BLKNM=U1948, MAP=PUC PIN, I1, I, n2130 PIN, I2, I, bootstrap/rx/sreg274<5> PIN, I3, I, bootstrap/rx/sreg274<4> PIN, O, I, n2958 END SYM, U3265_map, FMAP, BLKNM=U1948, MAP=PUC PIN, I1, I, n2129 PIN, I2, I, n1940 PIN, O, I, bootstrap/wr_source/r23/n51<0> PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U3267_map, FMAP, BLKNM=U1946, MAP=PUC PIN, I1, I, n1979 PIN, I2, I, address_generator/int_addr30<3> PIN, I3, I, address_generator/int_addr30<1> PIN, O, I, n2961 END SYM, U3269_map, FMAP, BLKNM=U1946, MAP=PUC PIN, I1, I, rcp_addr_tri/y12<4> PIN, I2, I, rcp_addr_tri/y12<3> PIN, I3, I, rcp_addr_tri/y12<2> PIN, I4, I, rcp_addr_tri/y12<1> PIN, O, I, n1799 END SYM, U3271_map, FMAP, BLKNM=U1944, MAP=PUC PIN, I1, I, n2185 PIN, I2, I, address_generator/int_addr30<4> PIN, I3, I, address_generator/int_addr30<2> PIN, I4, I, address_generator/int_addr30<1> PIN, O, I, n2964 END SYM, U3273_map, FMAP, BLKNM=U1944, MAP=PUC PIN, I1, I, n2129 PIN, I2, I, n1980 PIN, O, I, bootstrap/wr_source/r03/n51<0> PIN, I3, I, bootstrap/rx/sreg274<2> END SYM, U3275_map, FMAP, BLKNM=U1942, MAP=PUC PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, rcp_rcv_rd<9> PIN, O, I, n2293 END SYM, U3276_map, FMAP, BLKNM=U1942, MAP=PUC PIN, I1, I, n2185 PIN, I2, I, address_generator/int_addr30<4> PIN, I3, I, address_generator/int_addr30<2> PIN, I4, I, address_generator/int_addr30<1> PIN, O, I, n2966 END SYM, U3278_map, FMAP, BLKNM=U1940, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<15> PIN, I2, I, fan_interface/load PIN, O, I, n2970 END SYM, U3280_map, FMAP, BLKNM=U1940, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<16> PIN, I2, I, fan_interface/load PIN, O, I, n2969 END SYM, U3284_map, FMAP, BLKNM=U1788, MAP=PUC PIN, I1, I, rcp_iic_rd<6> PIN, O, I, n2294 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, I3, I, address_generator/int_addr30<7> END SYM, U3288_map, FMAP, BLKNM=U1788, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<17> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<0> PIN, O, I, n2977 END SYM, U3292_map, FMAP, BLKNM=U1786, MAP=PUC PIN, I1, I, n337 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, I3, I, address_generator/int_addr30<9> PIN, O, I, n2986 END SYM, U3296_map, FMAP, BLKNM=U1786, MAP=PUC PIN, I1, I, rcp_iic_rd<7> PIN, I2, I, iic_bus_interface/iic/busy427 PIN, I3, I, address_generator/int_addr30<8> PIN, O, I, n2985 END SYM, U3301_map, FMAP, BLKNM=U1784, MAP=PUC PIN, O, I, n2295 PIN, I1, I, n1376 PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<7> END SYM, U3303_map, FMAP, BLKNM=U1784, MAP=PUC PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, iic_bus_interface/iic/cycle<1> PIN, I3, I, iic_bus_interface/iic/cycle<0> PIN, O, I, n2991 END SYM, U3307_map, FMAP, BLKNM=U1782, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<5> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<6> PIN, O, I, n2999 END SYM, U3311_map, FMAP, BLKNM=U1782, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<4> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<5> PIN, O, I, n2998 END SYM, U3315_map, FMAP, BLKNM=U1780, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<3> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<4> PIN, O, I, n3007 END SYM, U3319_map, FMAP, BLKNM=U1780, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<2> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<3> PIN, O, I, n3006 END SYM, U3322_map, HMAP, BLKNM=U2038, MAP=PUC PIN, I1, I, n1913 PIN, I2, I, antenna_interface/ant/n268<4> PIN, I3, I, antenna_interface/ant/clock<5> PIN, O, I, n3011 END SYM, U3324_map, FMAP, BLKNM=U2038, MAP=PUC PIN, I1, I, n1871 PIN, O, I, antenna_interface/ant/n268<4> PIN, I2, I, antenna_interface/ant/int_busy END SYM, U3327_map, HMAP, BLKNM=U2036, MAP=PUC PIN, I1, I, n2216 PIN, I2, I, antenna_interface/ant/n268<4> PIN, I3, I, antenna_interface/ant/clock<4> PIN, O, I, n3014 END SYM, U3328_map, FMAP, BLKNM=U2036, MAP=PUC PIN, O, I, n2216 PIN, I1, I, antenna_interface/ant/clock<3> PIN, I2, I, antenna_interface/ant/clock<2> PIN, I3, I, antenna_interface/ant/clock<1> PIN, I4, I, antenna_interface/ant/clock<0> END SYM, U3331_map, HMAP, BLKNM=U2034, MAP=PUC PIN, I1, I, n2211 PIN, I2, I, bootstrap/incr_en48 PIN, O, I, n3021 PIN, I3, I, n3020 END SYM, U3335_map, FMAP, BLKNM=U2034, MAP=PUC PIN, I1, I, n2193 PIN, I2, I, n2165 PIN, I3, I, n1889 PIN, I4, I, bs_addr<12> PIN, O, I, n3020 END SYM, U3338_map, HMAP, BLKNM=U2032, MAP=PUC PIN, I1, I, n1866 PIN, I2, I, bootstrap/rx/sreg274<5> PIN, O, I, n3031 PIN, I3, I, n3030 END SYM, U3345_map, FMAP, BLKNM=U2032, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2052 PIN, I3, I, n1865 PIN, I4, I, bs_addr<10> PIN, O, I, n3030 END SYM, U3348_map, HMAP, BLKNM=U2030, MAP=PUC PIN, I1, I, n1864 PIN, I2, I, bootstrap/rx/sreg274<6> PIN, O, I, n3037 PIN, I3, I, n3036 END SYM, U3351_map, FMAP, BLKNM=U2030, MAP=PUC PIN, I1, I, n2268 PIN, I2, I, n1993 PIN, I3, I, bs_addr<3> PIN, I4, I, bs_addr<2> PIN, O, I, n3036 END SYM, U3352_map, HMAP, BLKNM=U2178, MAP=PUC PIN, O, I, rcp_ad_tri/y12<13> PIN, I1, I, n3044 PIN, I2, I, n3043 END SYM, U3356_map, FMAP, BLKNM=U2178, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<14> PIN, I2, I, n303 PIN, I3, I, n1874 PIN, I4, I, bootstrap/wr_source/r_hih<13> PIN, O, I, n3044 END SYM, U3359_map, FMAP, BLKNM=U2178, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, I3, I, bootstrap/wr_source/r_mid<13> PIN, I4, I, bootstrap/wr_source/r_low<13> PIN, O, I, n3043 END SYM, U3360_map, HMAP, BLKNM=U2176, MAP=PUC PIN, O, I, rcp_ad_tri/y12<12> PIN, I1, I, n3051 PIN, I2, I, n3050 END SYM, U3364_map, FMAP, BLKNM=U2176, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<13> PIN, I2, I, n303 PIN, I3, I, n1874 PIN, I4, I, bootstrap/wr_source/r_hih<12> PIN, O, I, n3051 END SYM, U3367_map, FMAP, BLKNM=U2176, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, I3, I, bootstrap/wr_source/r_mid<12> PIN, I4, I, bootstrap/wr_source/r_low<12> PIN, O, I, n3050 END SYM, U3368_map, HMAP, BLKNM=U2174, MAP=PUC PIN, O, I, rcp_ad_tri/y12<11> PIN, I1, I, n3058 PIN, I2, I, n3057 END SYM, U3372_map, FMAP, BLKNM=U2174, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<12> PIN, I2, I, n303 PIN, I3, I, n1874 PIN, I4, I, bootstrap/wr_source/r_hih<11> PIN, O, I, n3058 END SYM, U3375_map, FMAP, BLKNM=U2174, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, I3, I, bootstrap/wr_source/r_mid<11> PIN, I4, I, bootstrap/wr_source/r_low<11> PIN, O, I, n3057 END SYM, U3376_map, HMAP, BLKNM=U2172, MAP=PUC PIN, O, I, rcp_ad_tri/y12<10> PIN, I1, I, n3064 PIN, I2, I, n3063 END SYM, U3379_map, FMAP, BLKNM=U2172, MAP=PUC PIN, I1, I, n303 PIN, I2, I, n2110 PIN, I3, I, n1874 PIN, I4, I, bootstrap/wr_source/r_hih<10> PIN, O, I, n3064 END SYM, U3382_map, FMAP, BLKNM=U2172, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, I3, I, bootstrap/wr_source/r_mid<10> PIN, I4, I, bootstrap/wr_source/r_low<10> PIN, O, I, n3063 END SYM, U3384_map, HMAP, BLKNM=U2170, MAP=PUC PIN, I1, I, n2070 PIN, I2, I, iic_bus_interface/iic/clock<5> PIN, O, I, n3069 PIN, I3, I, n3068 END SYM, U3385_map, FMAP, BLKNM=U2170, MAP=PUC PIN, I1, I, n2087 PIN, I2, I, iic_bus_interface/iic/clock<4> PIN, I3, I, iic_bus_interface/iic/clock<3> PIN, O, I, n3068 END SYM, U3388_map, FMAP, BLKNM=U2170, MAP=PUC PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, n2234 PIN, I3, I, n2072 PIN, O, I, n2070 END SYM, U3391_map, FMAP, BLKNM=U1639, MAP=PUC PIN, I1, I, rcp_rcv_rd<3> PIN, I2, I, rcp_iic_rd<3> PIN, O, I, n2162 PIN, I3, I, n2111 PIN, I4, I, n1921 END SYM, U3394_map, FMAP, BLKNM=U1639, MAP=PUC PIN, I1, I, rcp_audio_rd<3> PIN, I2, I, n2181 PIN, O, I, n2163 PIN, I3, I, n1833 PIN, I4, I, n1409 END SYM, U3397_map, FMAP, BLKNM=U1637, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<4> PIN, I2, I, rcp_sts2_rd PIN, I3, I, n2180 PIN, O, I, n2164 PIN, I4, I, n1799 END SYM, U3400_map, FMAP, BLKNM=U1637, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, O, I, n2066 PIN, I3, I, bootstrap/wr_source/r_mid<3> PIN, I4, I, bootstrap/wr_source/r_low<3> END SYM, U3403_map, FMAP, BLKNM=U1635, MAP=PUC PIN, I1, I, n303 PIN, O, I, n2067 PIN, I2, I, n1802 PIN, I3, I, n1801 PIN, I4, I, n1800 END SYM, U3406_map, FMAP, BLKNM=U1635, MAP=PUC PIN, I1, I, rcp_iic_rd<4> PIN, I2, I, rcp_fill_rd PIN, I3, I, n1921 PIN, I4, I, n1833 PIN, O, I, n1800 END SYM, U3409_map, FMAP, BLKNM=U1633, MAP=PUC PIN, I1, I, rcp_sts2_rd PIN, I2, I, rcp_rcv_rd<4> PIN, I3, I, n2111 PIN, O, I, n1801 PIN, I4, I, n1799 END SYM, U3412_map, FMAP, BLKNM=U1633, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<5> PIN, I2, I, rcp_audio_rd<4> PIN, I3, I, n2181 PIN, I4, I, n2180 PIN, O, I, n1802 END SYM, U3415_map, FMAP, BLKNM=U1631, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, O, I, n2068 PIN, I3, I, bootstrap/wr_source/r_mid<4> PIN, I4, I, bootstrap/wr_source/r_low<4> END SYM, U3417_map, FMAP, BLKNM=U1631, MAP=PUC PIN, I1, I, rcp_rcv_rd<5> PIN, I2, I, n2111 PIN, O, I, n1951 PIN, I3, I, n1950 PIN, I4, I, n1803 END SYM, U3419_map, FMAP, BLKNM=U1938, MAP=PUC PIN, I1, I, synthesizer_interface/sync_high/wr_n_latch PIN, I2, I, synthesizer_interface/sync_high/ale_select PIN, I3, I, n280 PIN, O, I, n3093 END SYM, U3422_map, FMAP, BLKNM=U1938, MAP=PUC PIN, I1, I, n2160 PIN, I2, I, n2159 PIN, I3, I, bootstrap/tx_busy PIN, I4, I, bootstrap/tx/baud<0> PIN, O, I, n3092 END SYM, U3425_map, FMAP, BLKNM=U1936, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2155 PIN, O, I, n2034 PIN, I3, I, n1870 PIN, I4, I, bs_addr<17> END SYM, U3428_map, FMAP, BLKNM=U1936, MAP=PUC PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, iic_bus_interface/iic/cycle<2> PIN, I3, I, iic_bus_interface/iic/cycle<1> PIN, I4, I, iic_bus_interface/iic/cycle<0> PIN, O, I, n3098 END SYM, U3429_map, FMAP, BLKNM=U1934, MAP=PUC PIN, I1, I, n2167 PIN, I2, I, bootstrap/rx/baud16<0> PIN, O, I, n3099 END SYM, U3430_map, FMAP, BLKNM=U1934, MAP=PUC PIN, O, I, n2250 PIN, I1, I, n2153 PIN, I2, I, fan_interface/pwm/clock<9> PIN, I3, I, fan_interface/pwm/clock<8> PIN, I4, I, fan_interface/pwm/clock<7> END SYM, U3434_map, FMAP, BLKNM=U1932, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<9> PIN, O, I, synthesizer_interface/synth/shift_reg342<9> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n2191 END SYM, U3435_map, FMAP, BLKNM=U1932, MAP=PUC PIN, I1, I, rtc_divide/clock<0> PIN, I2, I, rtc_divide/clk111 PIN, O, I, n3103 END SYM, U3439_map, FMAP, BLKNM=U1930, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<1> PIN, O, I, synthesizer_interface/synth/shift_reg342<1> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n2189 END SYM, U3443_map, FMAP, BLKNM=U1930, MAP=PUC PIN, I1, I, synthesizer_interface/synth/n348<0> PIN, I2, I, synthesizer_interface/synth/int_busy303 PIN, I3, I, n2190 PIN, I4, I, address_generator/int_addr30<7> PIN, O, I, n3110 END SYM, U3447_map, FMAP, BLKNM=U1778, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<1> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<2> PIN, O, I, n3118 END SYM, U3451_map, FMAP, BLKNM=U1778, MAP=PUC PIN, I1, I, n1377 PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<1> PIN, O, I, n3117 END SYM, U3455_map, FMAP, BLKNM=U1776, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<14> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<15> PIN, O, I, n3126 END SYM, U3459_map, FMAP, BLKNM=U1776, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<13> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<14> PIN, O, I, n3125 END SYM, U3463_map, FMAP, BLKNM=U1774, MAP=PUC PIN, I1, I, n1375 PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<13> PIN, O, I, n3134 END SYM, U3467_map, FMAP, BLKNM=U1774, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<11> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<12> PIN, O, I, n3133 END SYM, U3471_map, FMAP, BLKNM=U1772, MAP=PUC PIN, I1, I, rcp_audio_rd<5> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<6> PIN, O, I, n3142 END SYM, U3475_map, FMAP, BLKNM=U1772, MAP=PUC PIN, I1, I, rcp_audio_rd<4> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<5> PIN, O, I, n3141 END SYM, U3479_map, FMAP, BLKNM=U1770, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<10> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<11> PIN, O, I, n3150 END SYM, U3483_map, FMAP, BLKNM=U1770, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<9> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<10> PIN, O, I, n3149 END SYM, U3486_map, HMAP, BLKNM=U2028, MAP=PUC PIN, I1, I, n2211 PIN, I2, I, bootstrap/rx/sreg274<6> PIN, O, I, n3160 PIN, I3, I, n3159 END SYM, U3493_map, FMAP, BLKNM=U2028, MAP=PUC PIN, I1, I, n2194 PIN, I2, I, n2165 PIN, I3, I, n2154 PIN, I4, I, bs_addr<15> PIN, O, I, n3159 END SYM, U3496_map, HMAP, BLKNM=U2026, MAP=PUC PIN, I1, I, n1864 PIN, I2, I, bootstrap/incr_en48 PIN, O, I, n3167 PIN, I3, I, n3166 END SYM, U3500_map, FMAP, BLKNM=U2026, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n1869 PIN, I3, I, bs_addr<0> PIN, O, I, n3166 END SYM, U3503_map, HMAP, BLKNM=U2024, MAP=PUC PIN, I1, I, n2212 PIN, I2, I, bootstrap/rx/sreg274<4> PIN, O, I, n3177 PIN, I3, I, n3176 END SYM, U3510_map, FMAP, BLKNM=U2024, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2155 PIN, I3, I, n1870 PIN, I4, I, bs_addr<17> PIN, O, I, n3176 END SYM, U3513_map, HMAP, BLKNM=U2022, MAP=PUC PIN, I1, I, n2212 PIN, I2, I, bootstrap/rx/sreg274<6> PIN, O, I, n3183 PIN, I3, I, n3182 END SYM, U3516_map, FMAP, BLKNM=U2022, MAP=PUC PIN, I1, I, n2008 PIN, I2, I, n1991 PIN, I3, I, bs_addr<19> PIN, I4, I, bs_addr<18> PIN, O, I, n3182 END SYM, U3518_map, HMAP, BLKNM=U2020, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<2> PIN, I2, I, n2246 PIN, I3, I, n1948 PIN, O, I, n3185 END SYM, U3519_map, FMAP, BLKNM=U2020, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<1> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<0> PIN, O, I, n1948 END SYM, U3522_map, HMAP, BLKNM=U2168, MAP=PUC PIN, I1, I, n1866 PIN, I2, I, bootstrap/incr_en48 PIN, O, I, n3195 PIN, I3, I, n3194 END SYM, U3529_map, FMAP, BLKNM=U2168, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2054 PIN, I3, I, n1865 PIN, I4, I, bs_addr<8> PIN, O, I, n3194 END SYM, U3530_map, FMAP, BLKNM=U2168, MAP=PUC PIN, I1, I, n1941 PIN, I2, I, n1940 PIN, O, I, n1866 PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U3533_map, HMAP, BLKNM=U2166, MAP=PUC PIN, I1, I, n2213 PIN, I2, I, bootstrap/rx/sreg274<5> PIN, O, I, n3205 PIN, I3, I, n3204 END SYM, U3540_map, FMAP, BLKNM=U2166, MAP=PUC PIN, I1, I, n2208 PIN, I2, I, n2165 PIN, I3, I, n1867 PIN, I4, I, bs_addr<6> PIN, O, I, n3204 END SYM, U3541_map, FMAP, BLKNM=U2166, MAP=PUC PIN, O, I, n2213 PIN, I1, I, n2113 PIN, I2, I, n1940 PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U3544_map, HMAP, BLKNM=U2164, MAP=PUC PIN, I1, I, n1843 PIN, I2, I, antenna_interface/ant/cycle<4> PIN, O, I, n3213 PIN, I3, I, n3212 END SYM, U3548_map, FMAP, BLKNM=U2164, MAP=PUC PIN, I1, I, n2079 PIN, I2, I, antenna_interface/ant/int_busy PIN, I3, I, antenna_interface/ant/cycle<4> PIN, I4, I, antenna_interface/ant/cycle<3> PIN, O, I, n3212 END SYM, U3550_map, FMAP, BLKNM=U2164, MAP=PUC PIN, O, I, n1843 PIN, I1, I, antenna_interface/ant/int_busy PIN, I2, I, antenna_interface/ant/cycle<2> PIN, I3, I, antenna_interface/ant/cycle<1> PIN, I4, I, antenna_interface/ant/cycle<0> END SYM, U3553_map, HMAP, BLKNM=U2162, MAP=PUC PIN, I1, I, bs_addr<5> PIN, O, I, n3223 PIN, I2, I, n3222 PIN, I3, I, n3221 END SYM, U3557_map, FMAP, BLKNM=U2162, MAP=PUC PIN, I1, I, n2213 PIN, I2, I, n2165 PIN, I3, I, n2012 PIN, I4, I, bootstrap/rx/sreg274<4> PIN, O, I, n3222 END SYM, U3560_map, FMAP, BLKNM=U2162, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2156 PIN, I3, I, n1867 PIN, O, I, n3221 END SYM, U3563_map, HMAP, BLKNM=U2160, MAP=PUC PIN, I1, I, n1864 PIN, I2, I, bootstrap/rx/sreg274<5> PIN, O, I, n3230 PIN, I3, I, n3229 END SYM, U3567_map, FMAP, BLKNM=U2160, MAP=PUC PIN, I1, I, n1993 PIN, I2, I, n1841 PIN, I3, I, bs_addr<2> PIN, O, I, n3229 END SYM, U3568_map, FMAP, BLKNM=U2160, MAP=PUC PIN, I1, I, n2055 PIN, I2, I, n1940 PIN, O, I, n1864 PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U3570_map, FMAP, BLKNM=U1629, MAP=PUC PIN, I1, I, n2149 PIN, O, I, bootstrap/rx/n252<3> PIN, I2, I, bootstrap/rx/busy END SYM, U3574_map, FMAP, BLKNM=U1629, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<10> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<11> PIN, O, I, n3235 END SYM, U3577_map, FMAP, BLKNM=U1627, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<6> PIN, I2, I, rcp_audio_rd<5> PIN, I3, I, n2181 PIN, I4, I, n2180 PIN, O, I, n1803 END SYM, U3580_map, FMAP, BLKNM=U1627, MAP=PUC PIN, I1, I, rcp_sts1_rd PIN, I2, I, rcp_iic_rd<5> PIN, O, I, n1950 PIN, I3, I, n1921 PIN, I4, I, n1875 END SYM, U3583_map, FMAP, BLKNM=U1625, MAP=PUC PIN, I1, I, n303 PIN, O, I, n2223 PIN, I2, I, n2116 PIN, I3, I, n1953 PIN, I4, I, n1952 END SYM, U3586_map, FMAP, BLKNM=U1625, MAP=PUC PIN, I1, I, rcp_sts2_rd PIN, I2, I, rcp_iic_rd<6> PIN, O, I, n1952 PIN, I3, I, n1921 PIN, I4, I, n1799 END SYM, U3589_map, FMAP, BLKNM=U1623, MAP=PUC PIN, I1, I, rcp_sts1_rd PIN, I2, I, rcp_audio_rd<6> PIN, I3, I, n2181 PIN, O, I, n1953 PIN, I4, I, n1875 END SYM, U3592_map, FMAP, BLKNM=U1623, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<7> PIN, I2, I, rcp_rcv_rd<6> PIN, I3, I, n2180 PIN, O, I, n2116 PIN, I4, I, n2111 END SYM, U3595_map, FMAP, BLKNM=U1621, MAP=PUC PIN, O, I, n2224 PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, I3, I, bootstrap/wr_source/r_mid<6> PIN, I4, I, bootstrap/wr_source/r_low<6> END SYM, U3598_map, FMAP, BLKNM=U1621, MAP=PUC PIN, I1, I, rcp_iic_rd<7> PIN, I2, I, rcp_audio_rd<7> PIN, I3, I, n2181 PIN, O, I, n2117 PIN, I4, I, n1921 END SYM, U3603_map, FMAP, BLKNM=U1928, MAP=PUC PIN, I1, I, synthesizer_interface/synth/clock<1> PIN, I2, I, synthesizer_interface/synth/clock<0> PIN, I3, I, rcp_sts2_rd PIN, I4, I, n2027 PIN, O, I, n3258 END SYM, U3606_map, FMAP, BLKNM=U1928, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<11> PIN, I2, I, rcp_rcv_rd<10> PIN, I3, I, n2180 PIN, I4, I, n2111 PIN, O, I, n2110 END SYM, U3610_map, FMAP, BLKNM=U1926, MAP=PUC PIN, I1, I, n2227 PIN, I2, I, n2167 PIN, I3, I, bootstrap/rx/baud16<6> PIN, I4, I, bootstrap/rx/baud16<5> PIN, O, I, n3266 END SYM, U3614_map, FMAP, BLKNM=U1926, MAP=PUC PIN, I1, I, synthesizer_interface/synth/n338<4> PIN, I2, I, synthesizer_interface/synth/clock<2> PIN, I3, I, synthesizer_interface/synth/clock<1> PIN, I4, I, synthesizer_interface/synth/clock<0> PIN, O, I, n3265 END SYM, U3617_map, FMAP, BLKNM=U1924, MAP=PUC PIN, I1, I, rtc_divide/clock<4> PIN, I2, I, rtc_divide/clk111 PIN, I3, I, n2226 PIN, O, I, n3273 END SYM, U3621_map, FMAP, BLKNM=U1924, MAP=PUC PIN, I1, I, rtc_divide/clock<5> PIN, I2, I, rtc_divide/clock<4> PIN, I3, I, rtc_divide/clk111 PIN, I4, I, n2226 PIN, O, I, n3272 END SYM, U3624_map, FMAP, BLKNM=U1922, MAP=PUC PIN, I1, I, n2087 PIN, I2, I, n2070 PIN, I3, I, iic_bus_interface/iic/clock<4> PIN, I4, I, iic_bus_interface/iic/clock<3> PIN, O, I, n3279 END SYM, U3627_map, FMAP, BLKNM=U1922, MAP=PUC PIN, I1, I, n2073 PIN, I2, I, n2070 PIN, I3, I, iic_bus_interface/iic/clock<7> PIN, I4, I, iic_bus_interface/iic/clock<6> PIN, O, I, n3278 END SYM, U3630_map, FMAP, BLKNM=U1920, MAP=PUC PIN, I1, I, n2070 PIN, I2, I, iic_bus_interface/iic/clock<2> PIN, I3, I, iic_bus_interface/iic/clock<1> PIN, I4, I, iic_bus_interface/iic/clock<0> PIN, O, I, n3285 END SYM, U3633_map, FMAP, BLKNM=U1920, MAP=PUC PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, n1872 PIN, I3, I, iic_bus_interface/iic/clock<1> PIN, I4, I, iic_bus_interface/iic/clock<0> PIN, O, I, n3284 END SYM, U3635_map, FMAP, BLKNM=U1768, MAP=PUC PIN, I1, I, bootstrap/wr_control/cycle_rst_n PIN, I2, I, bootstrap/wr_control/cycle<1> PIN, I3, I, bootstrap/wr_control/cycle<0> PIN, O, I, n3289 END SYM, U3637_map, FMAP, BLKNM=U1768, MAP=PUC PIN, I1, I, bootstrap/wr_control/cycle_rst_n PIN, I2, I, bootstrap/wr_control/cycle<0> PIN, O, I, n3288 END SYM, U3640_map, FMAP, BLKNM=U1766, MAP=PUC PIN, O, I, n2283 PIN, I1, I, n2168 PIN, I2, I, bootstrap/rx/div16<3> PIN, I3, I, bootstrap/rx/div16<2> PIN, I4, I, bootstrap/rx/busy END SYM, U3643_map, FMAP, BLKNM=U1766, MAP=PUC PIN, I1, I, bootstrap/tx_busy PIN, I2, I, bootstrap/tx/cycle<2> PIN, I3, I, bootstrap/tx/cycle<1> PIN, I4, I, bootstrap/tx/cycle<0> PIN, O, I, n3294 END SYM, U3647_map, FMAP, BLKNM=U1764, MAP=PUC PIN, I1, I, iic_bus_interface/iic/read_cycle PIN, I2, I, iic_bus_interface/iic/cycle<3> PIN, I3, I, iic_bus_interface/iic/cycle<0> PIN, O, I, n3299 END SYM, U3649_map, FMAP, BLKNM=U1764, MAP=PUC PIN, O, I, iic_bus_interface/iic_sda62 PIN, I1, I, iic_bus_interface/iic/shift_reg_Q459<11> PIN, I2, I, bootstrap/wr_control/n114 END SYM, U3653_map, FMAP, BLKNM=U1762, MAP=PUC PIN, I1, I, fan_interface/pwm/shift_reg_Q142<8> PIN, I2, I, fan_interface/load PIN, I3, I, address_generator/int_addr30<9> PIN, O, I, n3306 END SYM, U3657_map, FMAP, BLKNM=U1762, MAP=PUC PIN, O, I, n1956 PIN, I1, I, n1872 PIN, I2, I, iic_bus_interface/iic/cycle<2> PIN, I3, I, iic_bus_interface/iic/cycle<0> PIN, I4, I, iic_bus_interface/iic/busy427 END SYM, U3659_map, FMAP, BLKNM=U1760, MAP=PUC PIN, I1, I, n2167 PIN, I2, I, bootstrap/rx/sreg274<7> PIN, O, I, n3310 END SYM, U3662_map, FMAP, BLKNM=U1760, MAP=PUC PIN, I1, I, n2245 PIN, I2, I, n2102 PIN, I3, I, n2101 PIN, O, I, fan_interface/pwm/n144<0> PIN, I4, I, fan_interface/load END SYM, U3663_map, HMAP, BLKNM=U2018, MAP=PUC PIN, I1, I, n2245 PIN, I2, I, n2102 PIN, I3, I, n2101 PIN, O, I, n2100 END SYM, U3664_map, FMAP, BLKNM=U2018, MAP=PUC PIN, O, I, n2245 PIN, I1, I, fan_interface/pwm/clock<8> PIN, I2, I, fan_interface/pwm/clock<5> PIN, I3, I, fan_interface/pwm/clock<2> PIN, I4, I, fan_interface/pwm/clock<1> END SYM, U3666_map, HMAP, BLKNM=U2016, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<12> PIN, I2, I, n2252 PIN, I3, I, n2246 PIN, O, I, n3312 END SYM, U3667_map, FMAP, BLKNM=U2016, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<9> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<11> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<10> PIN, O, I, n2252 PIN, I4, I, n2013 END SYM, U3669_map, HMAP, BLKNM=U2014, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<5> PIN, I2, I, n2246 PIN, I3, I, n1949 PIN, O, I, n3314 END SYM, U3670_map, FMAP, BLKNM=U2014, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<4> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<3> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<2> PIN, O, I, n1949 PIN, I4, I, n1948 END SYM, U3672_map, HMAP, BLKNM=U2012, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<3> PIN, I2, I, n2253 PIN, I3, I, n2246 PIN, O, I, n3316 END SYM, U3673_map, FMAP, BLKNM=U2012, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<2> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<1> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<0> PIN, O, I, n2253 END SYM, U3676_map, HMAP, BLKNM=U2010, MAP=PUC PIN, I1, I, interrupt_source/q<5> PIN, I2, I, interrupt_source/q130<5> PIN, O, I, n3322 PIN, I3, I, n3321 END SYM, U3679_map, FMAP, BLKNM=U2010, MAP=PUC PIN, I1, I, interrupt_source/q<3> PIN, I2, I, interrupt_source/q<1> PIN, I3, I, interrupt_source/q130<3> PIN, I4, I, interrupt_source/q130<1> PIN, O, I, n3321 END SYM, U3680_map, HMAP, BLKNM=U2158, MAP=PUC PIN, O, I, n3330 PIN, I1, I, n3329 PIN, I2, I, n3328 END SYM, U3683_map, FMAP, BLKNM=U2158, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2154 PIN, I3, I, bs_addr<16> PIN, I4, I, bs_addr<15> PIN, O, I, n3329 END SYM, U3687_map, FMAP, BLKNM=U2158, MAP=PUC PIN, I1, I, n2212 PIN, I2, I, n1870 PIN, I3, I, bs_addr<16> PIN, I4, I, bootstrap/incr_en48 PIN, O, I, n3328 END SYM, U3690_map, HMAP, BLKNM=U2156, MAP=PUC PIN, I1, I, n2084 PIN, I2, I, bootstrap/rd_control/cyc_rst_n PIN, O, I, n3338 PIN, I3, I, n3337 END SYM, U3694_map, FMAP, BLKNM=U2156, MAP=PUC PIN, I1, I, n2195 PIN, I2, I, bootstrap/rd_sel PIN, I3, I, bootstrap/rd_control/cycle<2> PIN, I4, I, bootstrap/rd_control/cyc_rst_n PIN, O, I, n3337 END SYM, U3696_map, FMAP, BLKNM=U2156, MAP=PUC PIN, O, I, n2084 PIN, I1, I, bootstrap/rd_sel PIN, I2, I, bootstrap/rd_control/cycle<2> PIN, I3, I, bootstrap/rd_control/cycle<1> PIN, I4, I, bootstrap/rd_control/cycle<0> END SYM, U3699_map, HMAP, BLKNM=U2154, MAP=PUC PIN, I1, I, n2211 PIN, I2, I, bootstrap/rx/sreg274<5> PIN, O, I, n3348 PIN, I3, I, n3347 END SYM, U3706_map, FMAP, BLKNM=U2154, MAP=PUC PIN, I1, I, n2194 PIN, I2, I, n2165 PIN, I3, I, n2051 PIN, I4, I, bs_addr<14> PIN, O, I, n3347 END SYM, U3707_map, FMAP, BLKNM=U2154, MAP=PUC PIN, O, I, n2211 PIN, I1, I, n2129 PIN, I2, I, n1940 PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U3710_map, HMAP, BLKNM=U2152, MAP=PUC PIN, I1, I, bs_addr<7> PIN, O, I, n3358 PIN, I2, I, n3357 PIN, I3, I, n3356 END SYM, U3714_map, FMAP, BLKNM=U2152, MAP=PUC PIN, I1, I, n2269 PIN, I2, I, n2213 PIN, I3, I, n2165 PIN, I4, I, bootstrap/rx/sreg274<6> PIN, O, I, n3357 END SYM, U3717_map, FMAP, BLKNM=U2152, MAP=PUC PIN, I1, I, n2208 PIN, I2, I, n2165 PIN, I3, I, n1867 PIN, O, I, n3356 END SYM, U3720_map, HMAP, BLKNM=U2150, MAP=PUC PIN, I1, I, n2212 PIN, I2, I, bootstrap/rx/sreg274<5> PIN, O, I, n3366 PIN, I3, I, n3365 END SYM, U3724_map, FMAP, BLKNM=U2150, MAP=PUC PIN, I1, I, n2034 PIN, I2, I, n1991 PIN, I3, I, bs_addr<18> PIN, O, I, n3365 END SYM, U3726_map, FMAP, BLKNM=U2150, MAP=PUC PIN, I1, I, n2222 PIN, O, I, n2212 PIN, I2, I, n2055 PIN, I3, I, n1417 PIN, I4, I, bootstrap/n53 END SYM, U3729_map, FMAP, BLKNM=U1619, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<8> PIN, I2, I, rcp_rcv_rd<7> PIN, I3, I, n2180 PIN, O, I, n2118 PIN, I4, I, n2111 END SYM, U3732_map, FMAP, BLKNM=U1619, MAP=PUC PIN, I1, I, n2210 PIN, O, I, n2119 PIN, I2, I, n2089 PIN, I3, I, bootstrap/wr_source/r_mid<7> PIN, I4, I, bootstrap/wr_source/r_low<7> END SYM, U3734_map, FMAP, BLKNM=U1617, MAP=PUC PIN, I1, I, rcp_rcv_rd<8> PIN, O, I, n2263 PIN, I2, I, n2262 PIN, I3, I, n2261 PIN, I4, I, n2111 END SYM, U3737_map, FMAP, BLKNM=U1617, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<9> PIN, I2, I, rcp_audio_rd<8> PIN, O, I, n2261 PIN, I3, I, n2181 PIN, I4, I, n2180 END SYM, U3742_map, FMAP, BLKNM=U1615, MAP=PUC PIN, I1, I, rcp_sts1_rd PIN, I2, I, rcp_iic_rd<8> PIN, O, I, n2262 PIN, I3, I, n1921 PIN, I4, I, n1875 END SYM, U3745_map, FMAP, BLKNM=U1615, MAP=PUC PIN, I1, I, rcp_sts1_rd PIN, I2, I, rcp_rcv_rd<9> PIN, O, I, n2264 PIN, I3, I, n2111 PIN, I4, I, n1875 END SYM, U3747_map, FMAP, BLKNM=U1613, MAP=PUC PIN, I1, I, rcp_addr_tri/y12<4> PIN, I2, I, rcp_addr_tri/y12<3> PIN, I3, I, rcp_addr_tri/y12<2> PIN, I4, I, rcp_addr_tri/y12<1> PIN, O, I, n2111 END SYM, U3750_map, FMAP, BLKNM=U1613, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<10> PIN, I2, I, rcp_iic_rd<9> PIN, I3, I, n2180 PIN, I4, I, n1921 PIN, O, I, n1920 END SYM, U3753_map, FMAP, BLKNM=U1611, MAP=PUC PIN, I1, I, rcp_addr_tri/y12<4> PIN, I2, I, rcp_addr_tri/y12<3> PIN, I3, I, rcp_addr_tri/y12<2> PIN, I4, I, rcp_addr_tri/y12<1> PIN, O, I, n1921 END SYM, U3755_map, FMAP, BLKNM=U1611, MAP=PUC PIN, I1, I, n303 PIN, O, I, n2089 PIN, I2, I, bootstrap/rx_data<0> PIN, I3, I, bootstrap/rx/sreg274<0> END SYM, U3759_map, FMAP, BLKNM=U1918, MAP=PUC PIN, I1, I, synthesizer_interface/synth/n348<0> PIN, I2, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2287 PIN, I3, I, n2061 PIN, I4, I, address_generator/int_addr30<4> END SYM, U3762_map, FMAP, BLKNM=U1918, MAP=PUC PIN, I1, I, n2149 PIN, I2, I, bootstrap/rx/div16<1> PIN, I3, I, bootstrap/rx/div16<0> PIN, I4, I, bootstrap/rx/busy PIN, O, I, n3391 END SYM, U3765_map, FMAP, BLKNM=U1916, MAP=PUC PIN, I1, I, n1916 PIN, I2, I, antenna_interface/ant/n268<4> PIN, I3, I, antenna_interface/ant/clock<3> PIN, O, I, n3398 END SYM, U3769_map, FMAP, BLKNM=U1916, MAP=PUC PIN, I1, I, n1913 PIN, I2, I, antenna_interface/ant/n268<4> PIN, I3, I, antenna_interface/ant/clock<6> PIN, I4, I, antenna_interface/ant/clock<5> PIN, O, I, n3397 END SYM, U3774_map, FMAP, BLKNM=U1914, MAP=PUC PIN, I1, I, n2248 PIN, I2, I, n2197 PIN, I3, I, iic_bus_interface/iic/cycle<3> PIN, I4, I, iic_bus_interface/iic/cycle<2> PIN, O, I, n3407 END SYM, U3778_map, FMAP, BLKNM=U1914, MAP=PUC PIN, I1, I, antenna_interface/ant/n268<4> PIN, I2, I, antenna_interface/ant/clock<2> PIN, I3, I, antenna_interface/ant/clock<1> PIN, I4, I, antenna_interface/ant/clock<0> PIN, O, I, n3406 END SYM, U3781_map, FMAP, BLKNM=U1912, MAP=PUC PIN, O, I, n2288 PIN, I1, I, n2211 PIN, I2, I, n2104 PIN, I3, I, n2103 PIN, I4, I, bootstrap/rx/sreg274<4> END SYM, U3784_map, FMAP, BLKNM=U1912, MAP=PUC PIN, I1, I, n2106 PIN, I2, I, n2105 PIN, I3, I, n1866 PIN, I4, I, bootstrap/rx/sreg274<4> PIN, O, I, n3412 END SYM, U3788_map, FMAP, BLKNM=U1910, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<7> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2289 PIN, I4, I, n1930 END SYM, U3791_map, FMAP, BLKNM=U1910, MAP=PUC PIN, I1, I, n1932 PIN, I2, I, n1931 PIN, I3, I, n1866 PIN, I4, I, bootstrap/rx/sreg274<6> PIN, O, I, n3418 END SYM, U3795_map, FMAP, BLKNM=U1758, MAP=PUC PIN, I1, I, audio_interface/aud/comm_sreg_Q421<6> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<15> PIN, O, I, n3422 END SYM, U3796_map, FMAP, BLKNM=U1758, MAP=PUC PIN, I1, I, n1880 PIN, I2, I, n1825 PIN, O, I, audio_interface/aud/n356 END SYM, U3797_map, FMAP, BLKNM=U1756, MAP=PUC PIN, I1, I, n1890 PIN, I2, I, bootstrap/rx/baud16<4> PIN, O, I, n3427 END SYM, U3801_map, FMAP, BLKNM=U1756, MAP=PUC PIN, I1, I, antenna_interface/ant/shift_reg_Q276<8> PIN, I2, I, antenna_interface/ant/int_busy243 PIN, I3, I, address_generator/int_addr30<9> PIN, O, I, n3426 END SYM, U3802_map, FMAP, BLKNM=U1754, MAP=PUC PIN, I1, I, rtc_divide/clock<8> PIN, I2, I, rtc_divide/clock<7> PIN, I3, I, rtc_divide/clock<6> PIN, I4, I, n2225 PIN, O, I, n3431 END SYM, U3804_map, FMAP, BLKNM=U1754, MAP=PUC PIN, I1, I, rtc_divide/clock<7> PIN, I2, I, rtc_divide/clock<6> PIN, I3, I, n2225 PIN, O, I, n3430 END SYM, U3806_map, FMAP, BLKNM=U1752, MAP=PUC PIN, I1, I, interrupt_source/divide<1> PIN, I2, I, interrupt_source/divide<0> PIN, O, I, n3434 END SYM, U3807_map, FMAP, BLKNM=U1752, MAP=PUC PIN, I1, I, rtc_divide/clock<3> PIN, I2, I, rtc_divide/clock<2> PIN, I3, I, rtc_divide/clock<1> PIN, I4, I, rtc_divide/clock<0> PIN, O, I, n3433 END SYM, U3809_map, FMAP, BLKNM=U1750, MAP=PUC PIN, I1, I, bootstrap/wr_control/cycle<2> PIN, I2, I, bootstrap/wr_control/cycle<1> PIN, O, I, n3437 END SYM, U3810_map, FMAP, BLKNM=U1750, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/sdai_2247 PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/sdai_2 PIN, O, I, n3436 END SYM, U3815_map, FMAP, BLKNM=U1599, MAP=PUC PIN, O, I, rcp_addr_tri/y12<18> PIN, I1, I, n303 PIN, I2, I, bs_addr<18> PIN, I3, I, address_generator/int_addr<18> END SYM, U3819_map, FMAP, BLKNM=U1599, MAP=PUC PIN, O, I, rcp_addr_tri/y12<19> PIN, I1, I, n303 PIN, I2, I, bs_addr<19> PIN, I3, I, address_generator/int_addr<19> END SYM, U3823_map, FMAP, BLKNM=U1597, MAP=PUC PIN, O, I, rcp_addr_tri/y12<1> PIN, I1, I, n303 PIN, I2, I, bs_addr<1> PIN, I3, I, address_generator/int_addr<1> END SYM, U3827_map, FMAP, BLKNM=U1597, MAP=PUC PIN, O, I, rcp_addr_tri/y12<2> PIN, I1, I, n303 PIN, I2, I, bs_addr<2> PIN, I3, I, address_generator/int_addr<2> END SYM, U3831_map, FMAP, BLKNM=U1595, MAP=PUC PIN, O, I, rcp_addr_tri/y12<3> PIN, I1, I, n303 PIN, I2, I, bs_addr<3> PIN, I3, I, address_generator/int_addr<3> END SYM, U3835_map, FMAP, BLKNM=U1595, MAP=PUC PIN, O, I, rcp_addr_tri/y12<4> PIN, I1, I, n303 PIN, I2, I, bs_addr<4> PIN, I3, I, address_generator/int_addr<4> END SYM, U3839_map, FMAP, BLKNM=U1593, MAP=PUC PIN, O, I, rcp_addr_tri/y12<5> PIN, I1, I, n303 PIN, I2, I, bs_addr<5> PIN, I3, I, address_generator/int_addr<5> END SYM, U3843_map, FMAP, BLKNM=U1593, MAP=PUC PIN, O, I, rcp_addr_tri/y12<6> PIN, I1, I, n303 PIN, I2, I, bs_addr<6> PIN, I3, I, address_generator/int_addr<6> END SYM, U3847_map, FMAP, BLKNM=U1591, MAP=PUC PIN, O, I, rcp_addr_tri/y12<7> PIN, I1, I, n303 PIN, I2, I, bs_addr<7> PIN, I3, I, address_generator/int_addr<7> END SYM, U3851_map, FMAP, BLKNM=U1591, MAP=PUC PIN, O, I, rcp_addr_tri/y12<8> PIN, I1, I, n303 PIN, I2, I, bs_addr<8> PIN, I3, I, address_generator/int_addr<8> END SYM, U3854_map, HMAP, BLKNM=U2008, MAP=PUC PIN, I1, I, n2247 PIN, I2, I, n1880 PIN, I3, I, audio_interface/aud/clock<3> PIN, O, I, n3471 END SYM, U3856_map, FMAP, BLKNM=U2008, MAP=PUC PIN, I1, I, n2021 PIN, O, I, n1880 PIN, I2, I, audio_interface/aud/clock<4> PIN, I3, I, audio_interface/aud/clock<2> END SYM, U3859_map, HMAP, BLKNM=U2006, MAP=PUC PIN, I1, I, n1838 PIN, I2, I, bootstrap/tx/n133<3> PIN, I3, I, bootstrap/tx/baud<9> PIN, O, I, n3474 END SYM, U3860_map, FMAP, BLKNM=U2006, MAP=PUC PIN, I1, I, n1839 PIN, O, I, n1838 PIN, I2, I, bootstrap/tx/baud<8> PIN, I3, I, bootstrap/tx/baud<7> PIN, I4, I, bootstrap/tx/baud<6> END SYM, U3863_map, HMAP, BLKNM=U2004, MAP=PUC PIN, I1, I, n1839 PIN, I2, I, bootstrap/tx/n133<3> PIN, I3, I, bootstrap/tx/baud<6> PIN, O, I, n3477 END SYM, U3864_map, FMAP, BLKNM=U2004, MAP=PUC PIN, I1, I, n2184 PIN, O, I, n1839 PIN, I2, I, bootstrap/tx/baud<5> PIN, I3, I, bootstrap/tx/baud<4> PIN, I4, I, bootstrap/tx/baud<3> END SYM, U3867_map, HMAP, BLKNM=U2002, MAP=PUC PIN, I1, I, synthesizer_interface/synth/n338<4> PIN, I2, I, synthesizer_interface/synth/clock<3> PIN, I3, I, n2120 PIN, O, I, n3482 END SYM, U3870_map, FMAP, BLKNM=U2002, MAP=PUC PIN, O, I, synthesizer_interface/synth/n338<4> PIN, I1, I, synthesizer_interface/synth/clock<0> PIN, I2, I, rcp_sts2_rd PIN, I3, I, n2027 END SYM, U3873_map, HMAP, BLKNM=U2000, MAP=PUC PIN, I1, I, n1826 PIN, I2, I, n1825 PIN, O, I, audio_interface/aud/n423<0> PIN, I3, I, audio_interface/aud/busy360 END SYM, U3874_map, FMAP, BLKNM=U2000, MAP=PUC PIN, O, I, n1826 PIN, I1, I, audio_interface/aud/cycle<4> PIN, I2, I, audio_interface/aud/cycle<2> PIN, I3, I, audio_interface/aud/cycle<1> PIN, I4, I, audio_interface/aud/cycle<0> END SYM, U3878_map, FMAP, BLKNM=U1898, MAP=PUC PIN, I1, I, synthesizer_interface/synth/n348<0> PIN, I2, I, synthesizer_interface/synth/int_busy303 PIN, I3, I, n2217 PIN, I4, I, address_generator/int_addr30<1> PIN, O, I, n3492 END SYM, U3882_map, FMAP, BLKNM=U1898, MAP=PUC PIN, I1, I, synthesizer_interface/synth/n348<0> PIN, I2, I, synthesizer_interface/synth/int_busy303 PIN, I3, I, n2218 PIN, I4, I, address_generator/int_addr30<0> PIN, O, I, n3491 END SYM, U3886_map, FMAP, BLKNM=U1896, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<15> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n2059 PIN, O, I, n3500 END SYM, U3890_map, FMAP, BLKNM=U1896, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<14> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n2060 PIN, O, I, n3499 END SYM, U3894_map, FMAP, BLKNM=U1894, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<13> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n2057 PIN, O, I, n3508 END SYM, U3898_map, FMAP, BLKNM=U1894, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<12> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n2058 PIN, O, I, n3507 END SYM, U3902_map, FMAP, BLKNM=U1892, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<11> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n1906 PIN, O, I, n3516 END SYM, U3906_map, FMAP, BLKNM=U1892, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<10> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n2056 PIN, O, I, n3515 END SYM, U3910_map, FMAP, BLKNM=U1890, MAP=PUC PIN, I1, I, n1907 PIN, I2, I, antenna_interface/ant/ser_clk234 PIN, I3, I, antenna_interface/ant/n268<4> PIN, I4, I, antenna_interface/ant/clock<7> PIN, O, I, n3524 END SYM, U3914_map, FMAP, BLKNM=U1890, MAP=PUC PIN, I1, I, rtc_divide/clock<9> PIN, I2, I, rtc_divide/clock<8> PIN, I3, I, rtc_divide/clk111 PIN, I4, I, n2076 PIN, O, I, n3523 END SYM, U3916_map, HMAP, BLKNM=U2148, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<11> PIN, I2, I, n2246 PIN, O, I, n3528 PIN, I3, I, n3527 END SYM, U3917_map, FMAP, BLKNM=U2148, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<9> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<10> PIN, I3, I, n2013 PIN, O, I, n3527 END SYM, U3919_map, FMAP, BLKNM=U2148, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/edge_n PIN, I2, I, n2290 PIN, O, I, n2246 END SYM, U3922_map, HMAP, BLKNM=U2146, MAP=PUC PIN, I1, I, rcp_audio_rd<8> PIN, I2, I, n1877 PIN, O, I, n3535 PIN, I3, I, n3534 END SYM, U3925_map, FMAP, BLKNM=U2146, MAP=PUC PIN, I1, I, n2136 PIN, I2, I, n1878 PIN, I3, I, audio_interface/aud/cycle<4> PIN, O, I, n3534 END SYM, U3927_map, FMAP, BLKNM=U2146, MAP=PUC PIN, O, I, n1877 PIN, I1, I, audio_interface/aud/cycle<4> PIN, I2, I, audio_interface/aud/cycle<3> END SYM, U3930_map, HMAP, BLKNM=U2144, MAP=PUC PIN, I1, I, bootstrap/tx/n133<3> PIN, I2, I, bootstrap/tx/baud<8> PIN, O, I, n3540 PIN, I3, I, n3539 END SYM, U3931_map, FMAP, BLKNM=U2144, MAP=PUC PIN, I1, I, n1919 PIN, I2, I, bootstrap/tx/baud<7> PIN, I3, I, bootstrap/tx/baud<6> PIN, I4, I, bootstrap/tx/baud<5> PIN, O, I, n3539 END SYM, U3933_map, FMAP, BLKNM=U2144, MAP=PUC PIN, I1, I, n2160 PIN, I2, I, n2159 PIN, I3, I, bootstrap/tx_busy PIN, O, I, bootstrap/tx/n133<3> END SYM, U3934_map, HMAP, BLKNM=U2142, MAP=PUC PIN, O, I, n3547 PIN, I1, I, n3546 PIN, I2, I, n3545 END SYM, U3938_map, FMAP, BLKNM=U2142, MAP=PUC PIN, I1, I, n2032 PIN, I2, I, bootstrap/tx_busy PIN, I3, I, bootstrap/tx/cycle<3> PIN, I4, I, bootstrap/tx/cycle<2> PIN, O, I, n3546 END SYM, U3940_map, FMAP, BLKNM=U2142, MAP=PUC PIN, I1, I, n1911 PIN, I2, I, bootstrap/tx/cycle<3> PIN, I3, I, bootstrap/tx/cycle<2> PIN, I4, I, bootstrap/tx/cycle<1> PIN, O, I, n3545 END SYM, U3941_map, HMAP, BLKNM=U2140, MAP=PUC PIN, O, I, n3554 PIN, I1, I, n3553 PIN, I2, I, n3552 END SYM, U3945_map, FMAP, BLKNM=U2140, MAP=PUC PIN, I1, I, receiver_interface/dac/cycle<3> PIN, I2, I, receiver_interface/dac/cycle<2> PIN, I3, I, rcp_rcv_rd<10> PIN, I4, I, n2028 PIN, O, I, n3553 END SYM, U3947_map, FMAP, BLKNM=U2140, MAP=PUC PIN, I1, I, receiver_interface/dac/cycle<3> PIN, I2, I, receiver_interface/dac/cycle<2> PIN, I3, I, rcp_rcv_rd<10> PIN, I4, I, n2256 PIN, O, I, n3552 END SYM, U3950_map, FMAP, BLKNM=U1609, MAP=PUC PIN, I1, I, n2210 PIN, I2, I, n2089 PIN, O, I, n1925 PIN, I3, I, bootstrap/wr_source/r_mid<9> PIN, I4, I, bootstrap/wr_source/r_low<9> END SYM, U3954_map, FMAP, BLKNM=U1609, MAP=PUC PIN, O, I, rcp_addr_tri/y12<0> PIN, I1, I, n303 PIN, I2, I, bs_addr<0> PIN, I3, I, address_generator/int_addr<0> END SYM, U3959_map, FMAP, BLKNM=U1607, MAP=PUC PIN, O, I, rcp_addr_tri/y12<10> PIN, I1, I, n303 PIN, I2, I, bs_addr<10> PIN, I3, I, address_generator/int_addr<10> END SYM, U3963_map, FMAP, BLKNM=U1607, MAP=PUC PIN, O, I, rcp_addr_tri/y12<11> PIN, I1, I, n303 PIN, I2, I, bs_addr<11> PIN, I3, I, address_generator/int_addr<11> END SYM, U3967_map, FMAP, BLKNM=U1605, MAP=PUC PIN, O, I, rcp_addr_tri/y12<12> PIN, I1, I, n303 PIN, I2, I, bs_addr<12> PIN, I3, I, address_generator/int_addr<12> END SYM, U3971_map, FMAP, BLKNM=U1605, MAP=PUC PIN, O, I, rcp_addr_tri/y12<13> PIN, I1, I, n303 PIN, I2, I, bs_addr<13> PIN, I3, I, address_generator/int_addr<13> END SYM, U3975_map, FMAP, BLKNM=U1603, MAP=PUC PIN, O, I, rcp_addr_tri/y12<14> PIN, I1, I, n303 PIN, I2, I, bs_addr<14> PIN, I3, I, address_generator/int_addr<14> END SYM, U3979_map, FMAP, BLKNM=U1603, MAP=PUC PIN, O, I, rcp_addr_tri/y12<15> PIN, I1, I, n303 PIN, I2, I, bs_addr<15> PIN, I3, I, address_generator/int_addr<15> END SYM, U3983_map, FMAP, BLKNM=U1601, MAP=PUC PIN, O, I, rcp_addr_tri/y12<16> PIN, I1, I, n303 PIN, I2, I, bs_addr<16> PIN, I3, I, address_generator/int_addr<16> END SYM, U3987_map, FMAP, BLKNM=U1601, MAP=PUC PIN, O, I, rcp_addr_tri/y12<17> PIN, I1, I, n303 PIN, I2, I, bs_addr<17> PIN, I3, I, address_generator/int_addr<17> END SYM, U3991_map, FMAP, BLKNM=U1908, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<2> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n2266 PIN, O, I, n3592 END SYM, U3995_map, FMAP, BLKNM=U1908, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<8> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n1929 PIN, O, I, n3591 END SYM, U3999_map, FMAP, BLKNM=U1906, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<6> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n2127 PIN, O, I, n3600 END SYM, U4003_map, FMAP, BLKNM=U1906, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<5> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n2128 PIN, O, I, n3599 END SYM, U4007_map, FMAP, BLKNM=U1904, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<4> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n2125 PIN, O, I, n3608 END SYM, U4011_map, FMAP, BLKNM=U1904, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<3> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, I4, I, n2126 PIN, O, I, n3607 END SYM, U4015_map, FMAP, BLKNM=U1902, MAP=PUC PIN, I1, I, synthesizer_interface/synth/n348<0> PIN, I2, I, synthesizer_interface/synth/int_busy303 PIN, I3, I, n2221 PIN, I4, I, address_generator/int_addr30<6> PIN, O, I, n3616 END SYM, U4019_map, FMAP, BLKNM=U1902, MAP=PUC PIN, I1, I, synthesizer_interface/synth/n348<0> PIN, I2, I, synthesizer_interface/synth/int_busy303 PIN, I3, I, n2124 PIN, I4, I, address_generator/int_addr30<5> PIN, O, I, n3615 END SYM, U4023_map, FMAP, BLKNM=U1900, MAP=PUC PIN, I1, I, synthesizer_interface/synth/n348<0> PIN, I2, I, synthesizer_interface/synth/int_busy303 PIN, I3, I, n2219 PIN, I4, I, address_generator/int_addr30<3> PIN, O, I, n3624 END SYM, U4027_map, FMAP, BLKNM=U1900, MAP=PUC PIN, I1, I, synthesizer_interface/synth/n348<0> PIN, I2, I, synthesizer_interface/synth/int_busy303 PIN, I3, I, n2220 PIN, I4, I, address_generator/int_addr30<2> PIN, O, I, n3623 END SYM, U4028_map, FMAP, BLKNM=U1748, MAP=PUC PIN, I1, I, n2153 PIN, I2, I, fan_interface/pwm/clock<8> PIN, I3, I, fan_interface/pwm/clock<7> PIN, O, I, n3628 END SYM, U4030_map, FMAP, BLKNM=U1748, MAP=PUC PIN, I1, I, n2282 PIN, I2, I, fan_interface/pwm/clock<9> PIN, I3, I, fan_interface/pwm/clock<10> PIN, O, I, n3627 END SYM, U4032_map, FMAP, BLKNM=U1746, MAP=PUC PIN, I1, I, fan_interface/pwm/clock<2> PIN, I2, I, fan_interface/pwm/clock<1> PIN, I3, I, fan_interface/pwm/clock<0> PIN, O, I, n3632 END SYM, U4034_map, FMAP, BLKNM=U1746, MAP=PUC PIN, I1, I, n2010 PIN, I2, I, fan_interface/pwm/clock<5> PIN, I3, I, fan_interface/pwm/clock<4> PIN, I4, I, fan_interface/pwm/clock<3> PIN, O, I, n3631 END SYM, U4036_map, FMAP, BLKNM=U1744, MAP=PUC PIN, I1, I, audio_interface/aud/clock<1> PIN, I2, I, audio_interface/aud/clock<0> PIN, O, I, n3635 END SYM, U4037_map, FMAP, BLKNM=U1744, MAP=PUC PIN, I1, I, audio_interface/aud/clock<2> PIN, I2, I, audio_interface/aud/clock<1> PIN, I3, I, audio_interface/aud/clock<0> PIN, O, I, n3634 END SYM, U4039_map, FMAP, BLKNM=U1742, MAP=PUC PIN, I1, I, fan_interface/pwm/clock<0> PIN, O, I, n3636 END SYM, U4040_map, FMAP, BLKNM=U1740, MAP=PUC PIN, I1, I, audio_interface/aud/clock<4> PIN, O, I, n3637 END SYM, U4042_map, FMAP, BLKNM=U1589, MAP=PUC PIN, O, I, receiver_interface/dac/n310<3> PIN, I1, I, rcp_rcv_rd<10> PIN, I2, I, n1959 END SYM, U4044_map, FMAP, BLKNM=U1589, MAP=PUC PIN, O, I, synthesizer_interface/synth/n318<0> PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, rcp_sts2_rd END SYM, U4048_map, FMAP, BLKNM=U1587, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<0> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2189 PIN, I4, I, address_generator/int_addr30<1> END SYM, U4052_map, FMAP, BLKNM=U1587, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<22> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2190 PIN, I4, I, n1381 END SYM, U4056_map, FMAP, BLKNM=U1585, MAP=PUC PIN, I1, I, synthesizer_interface/synth/shift_reg<8> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, I, n2191 PIN, I4, I, address_generator/int_addr30<9> END SYM, U4058_map, FMAP, BLKNM=U1585, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/n217<0> PIN, O, I, tod_receiver/tod_receiver/n207<3> PIN, I2, I, tod_receiver/tod_receiver/active END SYM, U4060_map, FMAP, BLKNM=U1583, MAP=PUC PIN, I1, I, n2084 PIN, I2, I, bootstrap/tx_busy PIN, O, I, bootstrap/rd_control/n125<0> PIN, I3, I, bootstrap/rd_control/cyc_rst_n END SYM, U4063_map, FMAP, BLKNM=U1583, MAP=PUC, TRIM PIN, I1, I, n2160 PIN, I2, I, n2159 PIN, I3, I, n1868 PIN, O, I, bootstrap/tx/n152<0> PIN, I4, I, bootstrap/tx/int_busy137 END SYM, U4066_map, FMAP, BLKNM=U1581, MAP=PUC PIN, I1, I, n2018 PIN, I2, I, n1982 PIN, I3, I, n1956 PIN, I4, I, n1872 PIN, O, I, iic_bus_interface/iic/n423 END SYM, U4068_map, FMAP, BLKNM=U1581, MAP=PUC PIN, I1, I, n2234 PIN, O, I, n1982 PIN, I2, I, n1958 END SYM, U4071_map, FMAP, BLKNM=U1888, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<13> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<12> PIN, I3, I, n2252 PIN, I4, I, n2246 PIN, O, I, n3662 END SYM, U4075_map, FMAP, BLKNM=U1888, MAP=PUC PIN, I1, I, n2247 PIN, I2, I, n1880 PIN, I3, I, audio_interface/aud/clock<4> PIN, I4, I, audio_interface/aud/clock<3> PIN, O, I, n3661 END SYM, U4079_map, FMAP, BLKNM=U1886, MAP=PUC PIN, I1, I, n2250 PIN, I2, I, n2100 PIN, I3, I, fan_interface/pwm/clock<11> PIN, I4, I, fan_interface/pwm/clock<10> PIN, O, I, n3669 END SYM, U4082_map, FMAP, BLKNM=U1886, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<1> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<0> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/edge_n PIN, I4, I, n2290 PIN, O, I, n3668 END SYM, U4085_map, FMAP, BLKNM=U1884, MAP=PUC PIN, I1, I, n2153 PIN, I2, I, n2100 PIN, I3, I, fan_interface/pwm/clock<7> PIN, O, I, n3675 END SYM, U4088_map, FMAP, BLKNM=U1884, MAP=PUC PIN, I1, I, n2282 PIN, I2, I, n2100 PIN, I3, I, fan_interface/pwm/clock<9> PIN, O, I, n3674 END SYM, U4090_map, FMAP, BLKNM=U1882, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<9> PIN, I2, I, n2246 PIN, I3, I, n2013 PIN, O, I, n3681 END SYM, U4094_map, FMAP, BLKNM=U1882, MAP=PUC PIN, I1, I, n2151 PIN, I2, I, n2100 PIN, I3, I, fan_interface/pwm/clock<6> PIN, I4, I, fan_interface/pwm/clock<5> PIN, O, I, n3680 END SYM, U4096_map, FMAP, BLKNM=U1880, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<7> PIN, I2, I, n2246 PIN, I3, I, n2178 PIN, O, I, n3686 END SYM, U4099_map, FMAP, BLKNM=U1880, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<9> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<10> PIN, I3, I, n2246 PIN, I4, I, n2013 PIN, O, I, n3685 END SYM, U4100_map, HMAP, BLKNM=U2138, MAP=PUC PIN, O, I, n3693 PIN, I1, I, n3692 PIN, I2, I, n3691 END SYM, U4104_map, FMAP, BLKNM=U2138, MAP=PUC PIN, I1, I, synthesizer_interface/synth/cycle<4> PIN, I2, I, synthesizer_interface/synth/cycle<3> PIN, I3, I, rcp_sts2_rd PIN, I4, I, n1879 PIN, O, I, n3692 END SYM, U4106_map, FMAP, BLKNM=U2138, MAP=PUC PIN, I1, I, synthesizer_interface/synth/cycle<4> PIN, I2, I, synthesizer_interface/synth/cycle<3> PIN, I3, I, synthesizer_interface/synth/cycle<2> PIN, I4, I, n2081 PIN, O, I, n3691 END SYM, U4107_map, HMAP, BLKNM=U2136, MAP=PUC PIN, O, I, n3700 PIN, I1, I, n3699 PIN, I2, I, n3698 END SYM, U4111_map, FMAP, BLKNM=U2136, MAP=PUC PIN, I1, I, n2030 PIN, I2, I, bootstrap/rx/cycle<3> PIN, I3, I, bootstrap/rx/cycle<2> PIN, I4, I, bootstrap/rx/busy PIN, O, I, n3699 END SYM, U4113_map, FMAP, BLKNM=U2136, MAP=PUC PIN, I1, I, n2258 PIN, I2, I, bootstrap/rx/cycle<3> PIN, I3, I, bootstrap/rx/cycle<2> PIN, I4, I, bootstrap/rx/cycle<1> PIN, O, I, n3698 END SYM, U4114_map, HMAP, BLKNM=U2134, MAP=PUC PIN, I1, I, audio_interface/aud/ser_stb342 PIN, O, I, audio_interface/aud/n384 PIN, I2, I, n3703 END SYM, U4117_map, FMAP, BLKNM=U2134, MAP=PUC PIN, I1, I, n1877 PIN, I2, I, audio_interface/aud/cycle<2> PIN, I3, I, audio_interface/aud/cycle<1> PIN, I4, I, audio_interface/aud/cycle<0> PIN, O, I, n3703 END SYM, U4118_map, FMAP, BLKNM=U2134, MAP=PUC PIN, I1, I, n1826 PIN, I2, I, n1825 PIN, O, I, audio_interface/aud/ser_stb342 PIN, I3, I, audio_interface/aud/cycle<3> END SYM, U4120_map, HMAP, BLKNM=U2132, MAP=PUC PIN, I1, I, n2130 PIN, I2, I, bootstrap/rx/sreg274<5> PIN, I3, I, bootstrap/incr_en48 PIN, O, I, n3705 END SYM, U4121_map, FMAP, BLKNM=U2132, MAP=PUC PIN, O, I, n2130 PIN, I1, I, n2129 PIN, I2, I, n1417 PIN, I3, I, bootstrap/rx/sreg274<2> PIN, I4, I, bootstrap/rx/sreg274<1> END SYM, U4122_map, HMAP, BLKNM=U2130, MAP=PUC PIN, O, I, n2051 PIN, I1, I, n1889 PIN, I2, I, bs_addr<13> PIN, I3, I, bs_addr<12> END SYM, U4123_map, FMAP, BLKNM=U2130, MAP=PUC PIN, I1, I, n2052 PIN, O, I, n1889 PIN, I2, I, bs_addr<11> PIN, I3, I, bs_addr<10> END SYM, U4124_map, FMAP, BLKNM=U1738, MAP=PUC PIN, I1, I, synthesizer_interface/synth/clock<4> PIN, O, I, n3706 END SYM, U4125_map, FMAP, BLKNM=U1736, MAP=PUC PIN, I1, I, rcp_rcv_rd<10> PIN, O, I, n3708 END SYM, U4127_map, FMAP, BLKNM=U1734, MAP=PUC PIN, I1, I, n280 PIN, O, I, antenna_interface/sync/wr_n_latch76 END SYM, U4134_map, FMAP, BLKNM=U1579, MAP=PUC PIN, I1, I, rcp_addr_tri/y12<19> PIN, I2, I, rcp_addr_tri/y12<18> PIN, I3, I, rcp_addr_tri/y12<17> PIN, I4, I, rcp_addr_tri/y12<16> PIN, O, I, n1414 END SYM, U4137_map, FMAP, BLKNM=U1579, MAP=PUC PIN, I1, I, bootstrap/wr_control/cycle_rst_n PIN, I2, I, bootstrap/wr_control/cycle<2> PIN, I3, I, bootstrap/wr_control/cycle<1> PIN, I4, I, bootstrap/wr_control/cycle<0> PIN, O, I, n3717 END SYM, U4139_map, FMAP, BLKNM=U1577, MAP=PUC PIN, O, I, rcp_ad_tri/y12<1> PIN, I1, I, n1909 PIN, I2, I, n1908 PIN, I3, I, n1874 PIN, I4, I, bootstrap/wr_source/r_hih<1> END SYM, U4141_map, FMAP, BLKNM=U1577, MAP=PUC PIN, O, I, rcp_ad_tri/y12<3> PIN, I1, I, n2066 PIN, I2, I, n2065 PIN, I3, I, n1874 PIN, I4, I, bootstrap/wr_source/r_hih<3> END SYM, U4143_map, FMAP, BLKNM=U1575, MAP=PUC PIN, O, I, rcp_ad_tri/y12<4> PIN, I1, I, n2068 PIN, I2, I, n2067 PIN, I3, I, n1874 PIN, I4, I, bootstrap/wr_source/r_hih<4> END SYM, U4145_map, FMAP, BLKNM=U1575, MAP=PUC PIN, O, I, rcp_ad_tri/y12<6> PIN, I1, I, n2224 PIN, I2, I, n2223 PIN, I3, I, n1874 PIN, I4, I, bootstrap/wr_source/r_hih<6> END SYM, U4149_map, FMAP, BLKNM=U1573, MAP=PUC PIN, I1, I, rcp_addr_tri/y12<4> PIN, I2, I, rcp_addr_tri/y12<3> PIN, I3, I, rcp_addr_tri/y12<2> PIN, I4, I, rcp_addr_tri/y12<1> PIN, O, I, n1875 END SYM, U4153_map, FMAP, BLKNM=U1573, MAP=PUC PIN, O, I, synthesizer_interface/synth/n308 PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/cycle<1> PIN, I3, I, synthesizer_interface/synth/cycle<0> PIN, I4, I, n2024 END SYM, U4157_map, FMAP, BLKNM=U1571, MAP=PUC PIN, O, I, synthesizer_interface/synth/n348<10> PIN, I1, I, synthesizer_interface/synth/n348<0> PIN, I2, I, synthesizer_interface/synth/int_busy303 PIN, I3, I, synthesizer_interface/synth/clock<0> PIN, I4, I, n2027 END SYM, U4161_map, FMAP, BLKNM=U1571, MAP=PUC PIN, O, I, synthesizer_interface/synth/n348<16> PIN, I1, I, synthesizer_interface/synth/n348<0> PIN, I2, I, synthesizer_interface/synth/int_busy303 PIN, I3, I, synthesizer_interface/synth/clock<0> PIN, I4, I, n2027 END SYM, U4164_map, FMAP, BLKNM=U1878, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<6> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<5> PIN, I3, I, n2246 PIN, I4, I, n1949 PIN, O, I, n3739 END SYM, U4167_map, FMAP, BLKNM=U1878, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<8> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<7> PIN, I3, I, n2246 PIN, I4, I, n2178 PIN, O, I, n3738 END SYM, U4170_map, FMAP, BLKNM=U1876, MAP=PUC PIN, I1, I, n2100 PIN, I2, I, n2010 PIN, I3, I, fan_interface/pwm/clock<3> PIN, O, I, n3745 END SYM, U4173_map, FMAP, BLKNM=U1876, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<4> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<3> PIN, I3, I, n2253 PIN, I4, I, n2246 PIN, O, I, n3744 END SYM, U4176_map, FMAP, BLKNM=U1874, MAP=PUC PIN, I1, I, n2100 PIN, I2, I, fan_interface/pwm/clock<1> PIN, I3, I, fan_interface/pwm/clock<0> PIN, O, I, n3752 END SYM, U4180_map, FMAP, BLKNM=U1874, MAP=PUC PIN, I1, I, n2100 PIN, I2, I, n2010 PIN, I3, I, fan_interface/pwm/clock<4> PIN, I4, I, fan_interface/pwm/clock<3> PIN, O, I, n3751 END SYM, U4184_map, FMAP, BLKNM=U1872, MAP=PUC PIN, I1, I, n1839 PIN, I2, I, bootstrap/tx/n133<3> PIN, I3, I, bootstrap/tx/baud<7> PIN, I4, I, bootstrap/tx/baud<6> PIN, O, I, n3760 END SYM, U4188_map, FMAP, BLKNM=U1872, MAP=PUC PIN, I1, I, n1838 PIN, I2, I, bootstrap/tx/n133<3> PIN, I3, I, bootstrap/tx/baud<9> PIN, I4, I, bootstrap/tx/baud<10> PIN, O, I, n3759 END SYM, U4191_map, FMAP, BLKNM=U1870, MAP=PUC PIN, I1, I, n2184 PIN, I2, I, bootstrap/tx/n133<3> PIN, I3, I, bootstrap/tx/baud<3> PIN, O, I, n3766 END SYM, U4194_map, FMAP, BLKNM=U1870, MAP=PUC PIN, I1, I, n1919 PIN, I2, I, bootstrap/tx/n133<3> PIN, I3, I, bootstrap/tx/baud<5> PIN, O, I, n3765 END SYM, U4195_map, HMAP, BLKNM=U2128, MAP=PUC PIN, I1, I, n2054 PIN, O, I, n2052 PIN, I2, I, bs_addr<9> PIN, I3, I, bs_addr<8> END SYM, U4196_map, FMAP, BLKNM=U2128, MAP=PUC PIN, I1, I, n2208 PIN, O, I, n2054 PIN, I2, I, bs_addr<7> PIN, I3, I, bs_addr<6> END SYM, U4197_map, HMAP, BLKNM=U2126, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<8> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<7> PIN, I3, I, n2178 PIN, O, I, n2013 END SYM, U4198_map, FMAP, BLKNM=U2126, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<6> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<5> PIN, O, I, n2178 PIN, I3, I, n1949 END SYM, U4200_map, HMAP, BLKNM=U2124, MAP=PUC PIN, I1, I, n303 PIN, O, I, n2210 PIN, I2, I, n2129 PIN, I3, I, n2055 END SYM, U4201_map, FMAP, BLKNM=U2124, MAP=PUC PIN, O, I, n2129 PIN, I1, I, bootstrap/rx_data<0> PIN, I2, I, bootstrap/rx/sreg274<0> END SYM, U4203_map, HMAP, BLKNM=U2122, MAP=PUC PIN, I1, I, n2149 PIN, I2, I, n2148 PIN, I3, I, bootstrap/wr_control/n114 PIN, O, I, bootstrap/rx/n278<0> END SYM, U4206_map, FMAP, BLKNM=U2122, MAP=PUC PIN, O, I, n2148 PIN, I1, I, bootstrap/rx/cycle<3> PIN, I2, I, bootstrap/rx/cycle<2> PIN, I3, I, bootstrap/rx/cycle<1> PIN, I4, I, bootstrap/rx/cycle<0> END SYM, U4208_map, HMAP, BLKNM=U2120, MAP=PUC PIN, I1, I, n2021 PIN, O, I, n1825 PIN, I2, I, audio_interface/aud/clock<4> PIN, I3, I, audio_interface/aud/clock<2> END SYM, U4210_map, FMAP, BLKNM=U2120, MAP=PUC PIN, O, I, n2021 PIN, I1, I, audio_interface/aud/clock<3> PIN, I2, I, audio_interface/aud/clock<1> PIN, I3, I, audio_interface/aud/clock<0> END SYM, U4212_map, FMAP, BLKNM=U1727, MAP=PUC, TRIM PIN, I1, I, bootstrap/wr_control/n114 PIN, O, I, antenna_interface/ant/n388 END SYM, U4213_map, FMAP, BLKNM=U1725, MAP=PUC PIN, O, I, n1805 PIN, I1, I, antenna_interface/ant/cycle<3> PIN, I2, I, antenna_interface/ant/cycle<2> PIN, I3, I, antenna_interface/ant/cycle<1> PIN, I4, I, antenna_interface/ant/cycle<0> END SYM, U4214_map, FMAP, BLKNM=U1723, MAP=PUC PIN, O, I, n1954 PIN, I1, I, bootstrap/rx/sreg274<6> PIN, I2, I, bootstrap/rx/sreg274<5> PIN, I3, I, bootstrap/rx/sreg274<4> PIN, I4, I, bootstrap/incr_en48 END SYM, U4217_map, FMAP, BLKNM=U1723, MAP=PUC PIN, O, I, n2160 PIN, I1, I, n1994 PIN, I2, I, bootstrap/tx/baud<5> PIN, I3, I, bootstrap/tx/baud<4> PIN, I4, I, bootstrap/tx/baud<10> END SYM, U4218_map, FMAP, BLKNM=U1721, MAP=PUC PIN, O, I, n2159 PIN, I1, I, bootstrap/tx/baud<9> PIN, I2, I, bootstrap/tx/baud<8> PIN, I3, I, bootstrap/tx/baud<7> PIN, I4, I, bootstrap/tx/baud<6> END SYM, U4219_map, FMAP, BLKNM=U1721, MAP=PUC PIN, O, I, n1994 PIN, I1, I, bootstrap/tx/baud<3> PIN, I2, I, bootstrap/tx/baud<2> PIN, I3, I, bootstrap/tx/baud<1> PIN, I4, I, bootstrap/tx/baud<0> END SYM, U4220_map, FMAP, BLKNM=U1569, MAP=PUC PIN, I1, I, receiver_interface/dac/cycle<1> PIN, I2, I, receiver_interface/dac/cycle<0> PIN, O, I, n2256 END SYM, U4221_map, FMAP, BLKNM=U1569, MAP=PUC PIN, O, I, n2080 PIN, I1, I, antenna_interface/ant/cycle<1> PIN, I2, I, antenna_interface/ant/cycle<0> END SYM, U4222_map, FMAP, BLKNM=U1567, MAP=PUC PIN, I1, I, rtc_divide/clock<7> PIN, I2, I, rtc_divide/clock<6> PIN, I3, I, n2225 PIN, O, I, n2076 END SYM, U4223_map, FMAP, BLKNM=U1567, MAP=PUC PIN, O, I, n2227 PIN, I1, I, n1890 PIN, I2, I, bootstrap/rx/baud16<4> END SYM, U4227_map, FMAP, BLKNM=U1565, MAP=PUC PIN, I1, I, n2170 PIN, I2, I, audio_interface/aud/ser_stb342 PIN, O, I, audio_interface/aud/n347 PIN, I3, I, audio_interface/aud/cycle<4> PIN, I4, I, audio_interface/aud/cycle<3> END SYM, U4231_map, FMAP, BLKNM=U1565, MAP=PUC, TRIM PIN, I1, I, n2160 PIN, I2, I, n2159 PIN, I3, I, n1868 PIN, O, I, bootstrap/tx/n142 PIN, I4, I, bootstrap/tx/int_busy137 END SYM, U4234_map, FMAP, BLKNM=U1563, MAP=PUC PIN, I1, I, n1989 PIN, I2, I, n1982 PIN, O, I, iic_bus_interface/iic/n432 PIN, I3, I, iic_bus_interface/iic/cycle<3> PIN, I4, I, iic_bus_interface/iic/busy427 END SYM, U4236_map, FMAP, BLKNM=U1563, MAP=PUC PIN, I1, I, rcp_audio_rd<8> PIN, O, I, n1878 PIN, I2, I, audio_interface/aud/cycle<2> PIN, I3, I, audio_interface/aud/cycle<1> PIN, I4, I, audio_interface/aud/cycle<0> END SYM, U4239_map, FMAP, BLKNM=U1561, MAP=PUC PIN, I1, I, synthesizer_interface/synth/cycle<2> PIN, I2, I, synthesizer_interface/synth/cycle<1> PIN, I3, I, synthesizer_interface/synth/cycle<0> PIN, I4, I, rcp_sts2_rd PIN, O, I, n1879 END SYM, U4241_map, FMAP, BLKNM=U1561, MAP=PUC PIN, I1, I, receiver_interface/dac/cycle<1> PIN, I2, I, receiver_interface/dac/cycle<0> PIN, I3, I, rcp_rcv_rd<10> PIN, O, I, n2028 END SYM, U4245_map, FMAP, BLKNM=U1868, MAP=PUC PIN, I1, I, bootstrap/tx/n133<3> PIN, I2, I, bootstrap/tx/baud<1> PIN, I3, I, bootstrap/tx/baud<0> PIN, O, I, n3794 END SYM, U4249_map, FMAP, BLKNM=U1868, MAP=PUC PIN, I1, I, n2184 PIN, I2, I, bootstrap/tx/n133<3> PIN, I3, I, bootstrap/tx/baud<4> PIN, I4, I, bootstrap/tx/baud<3> PIN, O, I, n3793 END SYM, U4253_map, FMAP, BLKNM=U1866, MAP=PUC PIN, I1, I, synthesizer_interface/synth/n338<4> PIN, I2, I, synthesizer_interface/synth/clock<4> PIN, I3, I, synthesizer_interface/synth/clock<3> PIN, I4, I, n2120 PIN, O, I, n3802 END SYM, U4257_map, FMAP, BLKNM=U1866, MAP=PUC PIN, I1, I, bootstrap/tx/n133<3> PIN, I2, I, bootstrap/tx/baud<2> PIN, I3, I, bootstrap/tx/baud<1> PIN, I4, I, bootstrap/tx/baud<0> PIN, O, I, n3801 END SYM, U4260_map, FMAP, BLKNM=U1864, MAP=PUC PIN, I1, I, n1806 PIN, I2, I, n1805 PIN, O, I, antenna_interface/ant/n278<10> PIN, I3, I, antenna_interface/ant/int_busy243 PIN, I4, I, antenna_interface/ant/cycle<4> END SYM, U4262_map, FMAP, BLKNM=U1864, MAP=PUC PIN, I1, I, n2113 PIN, I2, I, n1981 PIN, I3, I, n1954 PIN, I4, I, bootstrap/n53 PIN, O, I, bootstrap/decode/int_active686 END SYM, U4266_map, FMAP, BLKNM=U1862, MAP=PUC PIN, O, I, rcp_addr_tri/y12<9> PIN, I1, I, n303 PIN, I2, I, bs_addr<9> PIN, I3, I, address_generator/int_addr<9> END SYM, U4268_map, FMAP, BLKNM=U1862, MAP=PUC PIN, I1, I, receiver_interface/dac/ser_clk258 PIN, I2, I, receiver_interface/dac/clock<0> PIN, O, I, receiver_interface/dac/clock314<0> PIN, I3, I, rcp_rcv_rd<10> END SYM, U4272_map, FMAP, BLKNM=U1860, MAP=PUC PIN, I1, I, n2167 PIN, I2, I, bootstrap/rx/baud16<1> PIN, I3, I, bootstrap/rx/baud16<0> PIN, O, I, n3816 END SYM, U4275_map, FMAP, BLKNM=U1860, MAP=PUC PIN, I1, I, n1938 PIN, I2, I, n1937 PIN, I3, I, bootstrap/rx/baud16<3> PIN, I4, I, bootstrap/rx/baud16<2> PIN, O, I, n3815 END SYM, U4277_map, HMAP, BLKNM=U2118, MAP=PUC PIN, I1, I, n1979 PIN, I2, I, address_generator/int_addr30<3> PIN, I3, I, address_generator/int_addr30<1> PIN, O, I, n3818 END SYM, U4278_map, FMAP, BLKNM=U2118, MAP=PUC PIN, I1, I, n279 PIN, O, I, n1979 PIN, I2, I, address_generator/int_addr30<4> PIN, I3, I, address_generator/int_addr30<2> PIN, I4, I, address_generator/int_addr30<15> END SYM, U4280_map, HMAP, BLKNM=U2116, MAP=PUC PIN, I1, I, n1980 PIN, O, I, bootstrap/wr_control/cycle_rst_n92 PIN, I2, I, bootstrap/rx/sreg274<2> PIN, I3, I, bootstrap/rx/sreg274<1> END SYM, U4283_map, FMAP, BLKNM=U2116, MAP=PUC PIN, O, I, n1980 PIN, I1, I, n1417 PIN, I2, I, bootstrap/n53 PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U4284_map, HMAP, BLKNM=U2114, MAP=PUC PIN, O, I, n2151 PIN, I1, I, n2010 PIN, I2, I, fan_interface/pwm/clock<4> PIN, I3, I, fan_interface/pwm/clock<3> END SYM, U4285_map, FMAP, BLKNM=U2114, MAP=PUC PIN, O, I, n2010 PIN, I1, I, fan_interface/pwm/clock<2> PIN, I2, I, fan_interface/pwm/clock<1> PIN, I3, I, fan_interface/pwm/clock<0> END SYM, U4286_map, HMAP, BLKNM=U2112, MAP=PUC PIN, O, I, n2282 PIN, I1, I, n2153 PIN, I2, I, fan_interface/pwm/clock<8> PIN, I3, I, fan_interface/pwm/clock<7> END SYM, U4287_map, FMAP, BLKNM=U2112, MAP=PUC PIN, O, I, n2153 PIN, I1, I, n2151 PIN, I2, I, fan_interface/pwm/clock<6> PIN, I3, I, fan_interface/pwm/clock<5> END SYM, U4288_map, HMAP, BLKNM=U2110, MAP=PUC PIN, I1, I, n2113 PIN, I2, I, n1981 PIN, I3, I, n1980 PIN, O, I, bootstrap/wr_source/r01/n51<0> END SYM, U4290_map, FMAP, BLKNM=U2110, MAP=PUC PIN, O, I, n2113 PIN, I1, I, bootstrap/rx_data<0> PIN, I2, I, bootstrap/rx/sreg274<0> END SYM, U4291_map, HMAP, BLKNM=U2098, MAP=PUC PIN, I1, I, n2184 PIN, O, I, n1919 PIN, I2, I, bootstrap/tx/baud<4> PIN, I3, I, bootstrap/tx/baud<3> END SYM, U4292_map, FMAP, BLKNM=U2098, MAP=PUC PIN, O, I, n2184 PIN, I1, I, bootstrap/tx/baud<2> PIN, I2, I, bootstrap/tx/baud<1> PIN, I3, I, bootstrap/tx/baud<0> END SYM, U4293_map, HMAP, BLKNM=U2096, MAP=PUC PIN, I1, I, n2165 PIN, O, I, n1993 PIN, I2, I, bs_addr<1> PIN, I3, I, bs_addr<0> END SYM, U4296_map, FMAP, BLKNM=U2096, MAP=PUC PIN, I1, I, n2212 PIN, O, I, n2165 PIN, I2, I, n1940 PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U4299_map, HMAP, BLKNM=U2094, MAP=PUC PIN, O, I, receiver_interface/dac/n290 PIN, I1, I, receiver_interface/dac/busy285 PIN, I2, I, n1959 PIN, I3, I, n1934 END SYM, U4302_map, FMAP, BLKNM=U2094, MAP=PUC PIN, I1, I, receiver_interface/dac/cycle<3> PIN, I2, I, receiver_interface/dac/cycle<2> PIN, I3, I, receiver_interface/dac/cycle<1> PIN, I4, I, receiver_interface/dac/cycle<0> PIN, O, I, n1934 END SYM, U4305_map, HMAP, BLKNM=U2092, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2054 PIN, I3, I, n1865 PIN, O, I, n1845 END SYM, U4306_map, FMAP, BLKNM=U2092, MAP=PUC PIN, I1, I, n2213 PIN, I2, I, n2212 PIN, I3, I, n2211 PIN, O, I, n1865 PIN, I4, I, n1864 END SYM, U4309_map, HMAP, BLKNM=U2090, MAP=PUC PIN, I1, I, receiver_interface/dac/clock<1> PIN, I2, I, receiver_interface/dac/clock314<0> PIN, O, I, n2199 PIN, I3, I, n1840 END SYM, U4311_map, FMAP, BLKNM=U2090, MAP=PUC PIN, I1, I, receiver_interface/dac/ser_clk258 PIN, I2, I, rcp_rcv_rd<10> PIN, O, I, n1840 END SYM, U4312_map, FMAP, BLKNM=U1719, MAP=PUC PIN, O, I, n2101 PIN, I1, I, fan_interface/pwm/clock<9> PIN, I2, I, fan_interface/pwm/clock<7> PIN, I3, I, fan_interface/pwm/clock<6> PIN, I4, I, fan_interface/pwm/clock<11> END SYM, U4314_map, FMAP, BLKNM=U1719, MAP=PUC PIN, O, I, n2102 PIN, I1, I, fan_interface/pwm/clock<4> PIN, I2, I, fan_interface/pwm/clock<3> PIN, I3, I, fan_interface/pwm/clock<10> PIN, I4, I, fan_interface/pwm/clock<0> END SYM, U4315_map, FMAP, BLKNM=U1717, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<8> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<2> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<13> PIN, I4, I, tod_receiver/tod_receiver/manchester_decoder/timeout<10> PIN, O, I, n1903 END SYM, U4318_map, FMAP, BLKNM=U1717, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<9> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<7> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<6> PIN, I4, I, tod_receiver/tod_receiver/manchester_decoder/timeout<3> PIN, O, I, n1904 END SYM, U4319_map, FMAP, BLKNM=U1715, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<5> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<4> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<12> PIN, I4, I, tod_receiver/tod_receiver/manchester_decoder/timeout<11> PIN, O, I, n1905 END SYM, U4321_map, FMAP, BLKNM=U1715, MAP=PUC PIN, O, I, n2222 PIN, I1, I, bootstrap/rx/sreg274<2> PIN, I2, I, bootstrap/rx/sreg274<1> PIN, I3, I, bootstrap/decode/address<5> PIN, I4, I, bootstrap/decode/address<4> END SYM, U4323_map, FMAP, BLKNM=U1713, MAP=PUC PIN, O, I, n2072 PIN, I1, I, iic_bus_interface/iic/clock<7> PIN, I2, I, iic_bus_interface/iic/clock<6> PIN, I3, I, iic_bus_interface/iic/clock<5> PIN, I4, I, iic_bus_interface/iic/clock<2> END SYM, U4324_map, FMAP, BLKNM=U1713, MAP=PUC PIN, O, I, n1933 PIN, I1, I, bootstrap/rx/baud16<3> PIN, I2, I, bootstrap/rx/baud16<2> PIN, I3, I, bootstrap/rx/baud16<1> PIN, I4, I, bootstrap/rx/baud16<0> END SYM, U4327_map, FMAP, BLKNM=U1711, MAP=PUC PIN, I1, I, rtc_divide/clock<9> PIN, I2, I, rtc_divide/clock<8> PIN, I3, I, rtc_divide/clock<7> PIN, I4, I, rtc_divide/clock<4> PIN, O, I, n1876 END SYM, U4328_map, FMAP, BLKNM=U1711, MAP=PUC PIN, I1, I, rtc_divide/clock<3> PIN, I2, I, rtc_divide/clock<2> PIN, I3, I, rtc_divide/clock<1> PIN, I4, I, rtc_divide/clock<0> PIN, O, I, n2023 END SYM, U4331_map, FMAP, BLKNM=U1559, MAP=PUC PIN, O, I, n2030 PIN, I1, I, bootstrap/rx/cycle<1> PIN, I2, I, bootstrap/rx/cycle<0> PIN, I3, I, bootstrap/rx/busy END SYM, U4333_map, FMAP, BLKNM=U1559, MAP=PUC PIN, O, I, n2032 PIN, I1, I, bootstrap/tx_busy PIN, I2, I, bootstrap/tx/cycle<1> PIN, I3, I, bootstrap/tx/cycle<0> END SYM, U4336_map, FMAP, BLKNM=U1557, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2052 PIN, O, I, n2035 PIN, I3, I, n1865 END SYM, U4338_map, FMAP, BLKNM=U1557, MAP=PUC PIN, O, I, n2195 PIN, I1, I, bootstrap/rd_control/cycle<1> PIN, I2, I, bootstrap/rd_control/cycle<0> PIN, I3, I, bootstrap/rd_control/cyc_rst_n END SYM, U4342_map, FMAP, BLKNM=U1555, MAP=PUC PIN, I1, I, rcp_audio_rd<6> PIN, O, I, n2298 PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<7> END SYM, U4345_map, FMAP, BLKNM=U1555, MAP=PUC PIN, I1, I, bootstrap/rd_control/cycle<2> PIN, I2, I, bootstrap/rd_control/cycle<1> PIN, I3, I, bootstrap/rd_control/cycle<0> PIN, I4, I, bootstrap/rd_control/cyc_rst_n PIN, O, I, n3852 END SYM, U4347_map, FMAP, BLKNM=U1553, MAP=PUC PIN, I1, I, rcp_iic_rd<8> PIN, O, I, n2197 PIN, I2, I, iic_bus_interface/iic/cycle<1> PIN, I3, I, iic_bus_interface/iic/cycle<0> END SYM, U4350_map, FMAP, BLKNM=U1553, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n1869 PIN, O, I, n1841 PIN, I3, I, bs_addr<1> PIN, I4, I, bs_addr<0> END SYM, U4352_map, FMAP, BLKNM=U1551, MAP=PUC PIN, I1, I, receiver_interface/dac/ser_clk258 PIN, O, I, receiver_interface/dac/n281 PIN, I2, I, rcp_rcv_rd<10> PIN, I3, I, n1934 END SYM, U4354_map, FMAP, BLKNM=U1551, MAP=PUC PIN, O, I, n1989 PIN, I1, I, iic_bus_interface/iic/cycle<2> PIN, I2, I, iic_bus_interface/iic/cycle<1> PIN, I3, I, iic_bus_interface/iic/cycle<0> END SYM, U4358_map, FMAP, BLKNM=U1858, MAP=PUC PIN, I1, I, rcp_audio_rd<3> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<4> PIN, O, I, n3865 END SYM, U4362_map, FMAP, BLKNM=U1858, MAP=PUC PIN, I1, I, rcp_audio_rd<2> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<3> PIN, O, I, n3864 END SYM, U4366_map, FMAP, BLKNM=U1856, MAP=PUC PIN, I1, I, rcp_audio_rd<1> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<2> PIN, O, I, n3873 END SYM, U4370_map, FMAP, BLKNM=U1856, MAP=PUC PIN, I1, I, rcp_audio_rd<0> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<1> PIN, O, I, n3872 END SYM, U4374_map, FMAP, BLKNM=U1854, MAP=PUC PIN, I1, I, audio_interface/aud/comm_sreg_Q421<2> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<11> PIN, O, I, n3881 END SYM, U4378_map, FMAP, BLKNM=U1854, MAP=PUC PIN, I1, I, audio_interface/aud/comm_sreg_Q421<5> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<14> PIN, O, I, n3880 END SYM, U4382_map, FMAP, BLKNM=U1852, MAP=PUC PIN, I1, I, rtc_divide/clock<1> PIN, I2, I, rtc_divide/clock<0> PIN, I3, I, rtc_divide/clk111 PIN, O, I, n3889 END SYM, U4386_map, FMAP, BLKNM=U1852, MAP=PUC PIN, I1, I, audio_interface/aud/comm_sreg_Q421<3> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<12> PIN, O, I, n3888 END SYM, U4390_map, FMAP, BLKNM=U1850, MAP=PUC PIN, I1, I, audio_interface/aud/comm_sreg_Q421<0> PIN, I2, I, audio_interface/aud/busy360 PIN, I3, I, address_generator/int_addr30<9> PIN, O, I, n3899 END SYM, U4396_map, FMAP, BLKNM=U1850, MAP=PUC PIN, I1, I, rtc_divide/clock<2> PIN, I2, I, rtc_divide/clock<1> PIN, I3, I, rtc_divide/clock<0> PIN, I4, I, rtc_divide/clk111 PIN, O, I, n3898 END SYM, U4400_map, FMAP, BLKNM=U1699, MAP=PUC PIN, O, I, n2201 PIN, I1, I, n1826 PIN, I2, I, n1825 PIN, I3, I, audio_interface/aud/read_cycle PIN, I4, I, audio_interface/aud/busy360 END SYM, U4403_map, FMAP, BLKNM=U1699, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n1864 PIN, I3, I, bootstrap/incr_addr PIN, O, I, bootstrap/dma_cnt/n93<0> END SYM, U4407_map, FMAP, BLKNM=U1697, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n1866 PIN, I3, I, bootstrap/incr_addr PIN, O, I, bootstrap/dma_cnt/n93<10> END SYM, U4410_map, FMAP, BLKNM=U1697, MAP=PUC PIN, I1, I, n2211 PIN, I2, I, n2165 PIN, I3, I, bootstrap/incr_addr PIN, O, I, bootstrap/dma_cnt/n93<12> END SYM, U4413_map, FMAP, BLKNM=U1695, MAP=PUC PIN, I1, I, n2212 PIN, I2, I, n2165 PIN, I3, I, bootstrap/incr_addr PIN, O, I, bootstrap/dma_cnt/n93<16> END SYM, U4416_map, FMAP, BLKNM=U1695, MAP=PUC PIN, I1, I, n2213 PIN, I2, I, n2165 PIN, I3, I, bootstrap/incr_addr PIN, O, I, bootstrap/dma_cnt/n93<4> END SYM, U4418_map, FMAP, BLKNM=U1693, MAP=PUC PIN, I1, I, n2167 PIN, O, I, bootstrap/rx/n242<3> PIN, I2, I, bootstrap/rx/busy END SYM, U4421_map, FMAP, BLKNM=U1693, MAP=PUC PIN, I1, I, n2167 PIN, I2, I, bootstrap/rx/sreg274<7> PIN, O, I, bootstrap/rx/n261 PIN, I3, I, bootstrap/n53 END SYM, U4422_map, FMAP, BLKNM=U1691, MAP=PUC PIN, O, I, n2247 PIN, I1, I, audio_interface/aud/clock<2> PIN, I2, I, audio_interface/aud/clock<1> PIN, I3, I, audio_interface/aud/clock<0> END SYM, U4425_map, FMAP, BLKNM=U1691, MAP=PUC PIN, I1, I, n2165 PIN, I2, I, n2034 PIN, O, I, n2008 PIN, I3, I, bs_addr<19> PIN, I4, I, bs_addr<18> END SYM, U4426_map, HMAP, BLKNM=U2108, MAP=PUC PIN, I1, I, n1981 PIN, I2, I, n1980 PIN, I3, I, n1941 PIN, O, I, bootstrap/wr_source/r02/n51<0> END SYM, U4428_map, FMAP, BLKNM=U2108, MAP=PUC PIN, O, I, n1941 PIN, I1, I, bootstrap/rx_data<0> PIN, I2, I, bootstrap/rx/sreg274<0> END SYM, U4429_map, HMAP, BLKNM=U2106, MAP=PUC PIN, I1, I, n2055 PIN, I2, I, n1981 PIN, I3, I, n1980 PIN, O, I, bootstrap/wr_source/r00/n51<0> END SYM, U4430_map, FMAP, BLKNM=U2106, MAP=PUC PIN, O, I, n2055 PIN, I1, I, bootstrap/rx_data<0> PIN, I2, I, bootstrap/rx/sreg274<0> END SYM, U4431_map, HMAP, BLKNM=U2104, MAP=PUC PIN, O, I, n2155 PIN, I1, I, n2154 PIN, I2, I, bs_addr<16> PIN, I3, I, bs_addr<15> END SYM, U4432_map, FMAP, BLKNM=U2104, MAP=PUC PIN, O, I, n2154 PIN, I1, I, n1889 PIN, I2, I, bs_addr<14> PIN, I3, I, bs_addr<13> PIN, I4, I, bs_addr<12> END SYM, U4433_map, HMAP, BLKNM=U2102, MAP=PUC PIN, O, I, n2208 PIN, I1, I, n2156 PIN, I2, I, bs_addr<5> PIN, I3, I, bs_addr<4> END SYM, U4434_map, FMAP, BLKNM=U2102, MAP=PUC PIN, O, I, n2156 PIN, I1, I, bs_addr<3> PIN, I2, I, bs_addr<2> PIN, I3, I, bs_addr<1> PIN, I4, I, bs_addr<0> END SYM, U4436_map, HMAP, BLKNM=U2100, MAP=PUC PIN, I1, I, n1945 PIN, I2, I, n1944 PIN, I3, I, bootstrap/incr_en PIN, O, I, n3921 END SYM, U4437_map, FMAP, BLKNM=U2100, MAP=PUC PIN, O, I, n1944 PIN, I1, I, bootstrap/rd_sel PIN, I2, I, bootstrap/rd_control/cycle<2> PIN, I3, I, bootstrap/rd_control/cycle<1> PIN, I4, I, bootstrap/rd_control/cycle<0> END SYM, U4439_map, HMAP, BLKNM=U1997, MAP=PUC PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, n1872 PIN, I3, I, iic_bus_interface/iic/clock<0> PIN, O, I, n3924 END SYM, U4441_map, FMAP, BLKNM=U1997, MAP=PUC PIN, I1, I, n2234 PIN, I2, I, n2072 PIN, O, I, n1872 END SYM, U4444_map, HMAP, BLKNM=U1995, MAP=PUC PIN, I1, I, n1843 PIN, I2, I, antenna_interface/ant/cycle<3> PIN, O, I, n3929 PIN, I3, I, n3928 END SYM, U4446_map, FMAP, BLKNM=U1995, MAP=PUC PIN, I1, I, n2080 PIN, I2, I, antenna_interface/ant/int_busy PIN, I3, I, antenna_interface/ant/cycle<3> PIN, I4, I, antenna_interface/ant/cycle<2> PIN, O, I, n3928 END SYM, U4448_map, HMAP, BLKNM=U1993, MAP=PUC PIN, I1, I, tod_receiver/tod_receiver/stb192 PIN, I2, I, tod_receiver/tod_receiver/cycle<0> PIN, I3, I, tod_receiver/tod_receiver/active PIN, O, I, n3931 END SYM, U4449_map, FMAP, BLKNM=U1993, MAP=PUC PIN, O, I, tod_receiver/tod_receiver/stb192 PIN, I1, I, tod_receiver/tod_receiver/cycle<3> PIN, I2, I, tod_receiver/tod_receiver/cycle<2> PIN, I3, I, tod_receiver/tod_receiver/cycle<1> PIN, I4, I, tod_receiver/tod_receiver/cycle<0> END SYM, U4452_map, HMAP, BLKNM=U1991, MAP=PUC PIN, I1, I, iic_bus_interface/iic/busy427 PIN, I2, I, address_generator/int_addr30<8> PIN, O, I, n3939 PIN, I3, I, n3938 END SYM, U4456_map, FMAP, BLKNM=U1991, MAP=PUC PIN, I1, I, n2018 PIN, I2, I, iic_bus_interface/iic/stop_cycle PIN, I3, I, iic_bus_interface/iic/clock<7> PIN, I4, I, iic_bus_interface/iic/busy427 PIN, O, I, n3938 END SYM, bootstrap/dma_cnt/iq_reg<19>, DFF, BLKNM=U2022 PIN, D, I, n3183 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<16> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<19> END SYM, interrupt_source/q_reg<2>, DFF, BLKNM=U1711 PIN, D, I, interrupt_source/q130<2>, , TS466, TS465 PIN, C, I, n278, , INV, TS0 PIN, CE, I, interrupt_source/n131<0> PIN, Q, O, interrupt_source/q130<3> END SYM, interrupt_source/divide_reg<1>, DFF, BLKNM=U1752 PIN, D, I, n3434 PIN, C, I, n278, , INV, TS0 PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, interrupt_source/divide<1> END SYM, bootstrap/wr_source/r10/q_reg<2>, DFF, BLKNM=U1659 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r10/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<2> END SYM, tod_receiver/tod_receiver/shift_reg_reg<11>, DFF, BLKNM=U1523 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<11> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<12> END SYM, U4109, OR PIN, I1, I, n3695 PIN, I2, I, n2030 PIN, O, O, n3696 END SYM, U4107, OR PIN, I1, I, n3699 PIN, I2, I, n3698 PIN, O, O, n3700 END SYM, U4106, AND PIN, I1, I, synthesizer_interface/synth/cycle<3> PIN, I2, I, synthesizer_interface/synth/cycle<2> PIN, I3, I, n2081 PIN, I4, I, synthesizer_interface/synth/cycle<4>, , INV PIN, O, O, n3691 END SYM, U4104, AND PIN, I1, I, synthesizer_interface/synth/cycle<4> PIN, I2, I, n3689 PIN, O, O, n3692 END SYM, U4103, NAND PIN, I1, I, rcp_sts2_rd PIN, I2, I, synthesizer_interface/synth/cycle<3>, , INV PIN, O, O, n3688 END SYM, U4102, NAND PIN, I1, I, n1879 PIN, I2, I, n3688 PIN, O, O, n3689 END SYM, U4100, OR PIN, I1, I, n3692 PIN, I2, I, n3691 PIN, O, O, n3693 END SYM, U3101, OR PIN, I1, I, address_generator/int_addr30<8>, , TS261 PIN, I2, I, bootstrap/rd_sel, , INV PIN, O, O, n2820 END SYM, U3102, OR PIN, I1, I, address_generator/int_addr30<0>, , TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, I2, I, bootstrap/rd_sel PIN, O, O, n2819 END SYM, U3103, AND PIN, I1, I, n2820 PIN, I2, I, n2819 PIN, I3, I, bootstrap/tx/int_busy137 PIN, O, O, n2822 END SYM, U3106, XOR PIN, I1, I, bootstrap/rx/div16<2> PIN, I2, I, n2168 PIN, O, O, n2824 END SYM, U3107, AND PIN, I1, I, bootstrap/rx/n252<3>, , INV PIN, I2, I, n2824 PIN, O, O, n2826 END SYM, U3108, AND PIN, I1, I, bootstrap/rx/div16<0> PIN, I2, I, bootstrap/rx/div16<1> PIN, O, O, n2168 END SYM, U2690, NAND PIN, I1, I, n2476 PIN, I2, I, n2475 PIN, O, O, n2127 END SYM, U2692, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<4>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2479 END SYM, U2693, NAND PIN, I1, I, address_generator/int_addr30<5>, , TS134, TS26, TS25 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2478 END SYM, U2694, NAND PIN, I1, I, n2479 PIN, I2, I, n2478 PIN, O, O, n2128 END SYM, U2696, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<1>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2482 END SYM, U2697, NAND PIN, I1, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2481 END SYM, U2698, NAND PIN, I1, I, n2482 PIN, I2, I, n2481 PIN, O, O, n2266 END SYM, memory_interface/rcp_1553_cs_n_reg, DFF, BLKNM=U1677 PIN, D, I, memory_interface/rcp_1553_cs_n148 PIN, C, I, n278, , INV, TS0 PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, n1415 END SYM, U2850, OR PIN, I1, I, bs_addr<4> PIN, I2, I, bs_addr<5> PIN, O, O, n2604 END SYM, U2851, OR PIN, I1, I, n2156, , INV PIN, I2, I, bs_addr<5> PIN, O, O, n2603 END SYM, U2852, NAND PIN, I1, I, n2605 PIN, I2, I, n2604 PIN, O, O, n2012 END SYM, U2854, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<19>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2608 END SYM, U2855, NAND PIN, I1, I, synthesizer_interface/synth/shift_reg<20> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2607 END SYM, U2856, NAND PIN, I1, I, n2608 PIN, I2, I, n2607 PIN, O, O, n2061 END SYM, U2857, AND PIN, I1, I, rcp_rcv_rd<0> PIN, I2, I, n2111 PIN, O, O, n2609 END SYM, U2858, OR PIN, I1, I, n1939 PIN, I2, I, n2609 PIN, I3, I, n2112 PIN, O, O, n2107 END SYM, U2859, NAND PIN, I1, I, rcp_audio_rd<0> PIN, I2, I, n2181 PIN, O, O, n2611 END SYM, synthesizer_interface/synth/shift_reg_reg<20>, DFF, BLKNM=U1607 PIN, D, I, n2287, , TS464, TS463 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<16> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<20> END SYM, antenna_interface/ant/shift_reg_reg<0>, DFF, BLKNM=U1525 PIN, D, I, address_generator/int_addr30<0>, , TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/int_busy243 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg<0> END SYM, audio_interface/aud/cycle_reg<2>, DFF, BLKNM=U1790 PIN, D, I, n2815 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n394<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/cycle<2> END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<4>, DFF, BLKNM=U1876 PIN, D, I, n3744 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<4> END SYM, fan_interface/pwm/shift_reg_reg<9>, DFF, BLKNM=U1762 PIN, D, I, n3306, , TS460, TS459 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<9> END SYM, U3390, NAND PIN, I1, I, rcp_rcv_rd<3> PIN, I2, I, n2111 PIN, O, O, n3070 END SYM, U3391, NAND PIN, I1, I, n3071 PIN, I2, I, n3070 PIN, O, O, n2162 END SYM, U3392, NAND PIN, I1, I, rcp_audio_rd<3> PIN, I2, I, n2181 PIN, O, O, n3073 END SYM, U3393, NAND PIN, I1, I, n1833 PIN, I2, I, n1409 PIN, O, O, n3072 END SYM, U3394, NAND PIN, I1, I, n3073 PIN, I2, I, n3072 PIN, O, O, n2163 END SYM, U3395, NAND PIN, I1, I, n2180 PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<4> PIN, O, O, n3075 END SYM, U3396, NAND PIN, I1, I, rcp_sts2_rd PIN, I2, I, n1799 PIN, O, O, n3074 END SYM, U3397, NAND PIN, I1, I, n3075 PIN, I2, I, n3074 PIN, O, O, n2164 END SYM, U3398, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<3> PIN, O, O, n3077 END SYM, U3399, NAND PIN, I1, I, bootstrap/wr_source/r_mid<3> PIN, I2, I, n2089 PIN, O, O, n3076 END SYM, U3550, NAND PIN, I1, I, antenna_interface/ant/int_busy PIN, I2, I, n3211 PIN, O, O, n1843 END SYM, U3552, NOR PIN, I1, I, bs_addr<5>, , INV PIN, I2, I, n3221 PIN, O, O, n3215 END SYM, U3553, OR PIN, I1, I, n3215 PIN, I2, I, n3222 PIN, O, O, n3223 END SYM, U3555, NAND PIN, I1, I, bootstrap/rx/sreg274<4> PIN, I2, I, n2213 PIN, O, O, n3218 END SYM, U3556, NAND PIN, I1, I, n2165 PIN, I2, I, n2012, , INV PIN, O, O, n3217 END SYM, U3557, NAND PIN, I1, I, n3218 PIN, I2, I, n3217 PIN, O, O, n3222 END SYM, U3559, NAND PIN, I1, I, n2156, , INV PIN, I2, I, n2165 PIN, O, O, n3220 END SYM, U3710, OR PIN, I1, I, n3350 PIN, I2, I, n3357 PIN, O, O, n3358 END SYM, U3712, NAND PIN, I1, I, bootstrap/rx/sreg274<6> PIN, I2, I, n2213 PIN, O, O, n3353 END SYM, U3713, NAND PIN, I1, I, n2165 PIN, I2, I, n2269, , INV PIN, O, O, n3352 END SYM, U3714, NAND PIN, I1, I, n3353 PIN, I2, I, n3352 PIN, O, O, n3357 END SYM, U3716, NAND PIN, I1, I, n2208, , INV PIN, I2, I, n2165 PIN, O, O, n3355 END SYM, U3717, AND PIN, I1, I, n1867 PIN, I2, I, n3355 PIN, O, O, n3356 END SYM, U3719, NAND PIN, I1, I, bootstrap/rx/sreg274<5> PIN, I2, I, n2212 PIN, O, O, n3360 END SYM, bootstrap/rx/sreg_reg<6>, DFF, BLKNM=U1705 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n278<0> PIN, Q, O, bootstrap/rx/sreg274<5> END SYM, rtc_divide/clock_reg<5>, DFF, BLKNM=U1924 PIN, D, I, n3272 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rtc_divide/clock<5> END SYM, external_port/rcp_reg1_reg, DFF, BLKNM=U1663 PIN, D, I, address_generator/int_addr30<3>, , TS458, TS457, TS124, TS123, TS81 PIN, C, I, n278, , INV, TS0 PIN, CE, I, external_port/n89 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1399 END SYM, audio_interface/aud/comm_sreg_reg<5>, DFF, BLKNM=U1641 PIN, D, I, n2284, , TS456, TS455 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n423<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/comm_sreg_Q421<5> END SYM, synthesizer_interface/synth/ser_clk_reg, DFF, BLKNM=U1738 PIN, D, I, n3706 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n299 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1382 END SYM, U4409, NAND PIN, I1, I, bootstrap/incr_addr PIN, I2, I, n2165 PIN, O, O, n3909 END SYM, U4407, NAND PIN, I1, I, n3907 PIN, I2, I, n1866, , INV PIN, O, O, bootstrap/dma_cnt/n93<10> END SYM, U4406, NAND PIN, I1, I, bootstrap/incr_addr PIN, I2, I, n2165 PIN, O, O, n3907 END SYM, U4403, NAND PIN, I1, I, n3904 PIN, I2, I, n1864, , INV PIN, O, O, bootstrap/dma_cnt/n93<0> END SYM, U4402, NAND PIN, I1, I, bootstrap/incr_addr PIN, I2, I, n2165 PIN, O, O, n3904 END SYM, U4400, OR PIN, I1, I, n3902 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n2201 END SYM, synthesizer_interface/sync_high/wren_reg, DFF, BLKNM=U1938 PIN, D, I, n3093, , TS454 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/int_busy303 END SYM, U4249, AND PIN, I1, I, bootstrap/tx/n133<3>, , INV PIN, I2, I, n3791 PIN, O, O, n3793 END SYM, U4247, NAND PIN, I1, I, n2184 PIN, I2, I, bootstrap/tx/baud<3> PIN, O, O, n3790 END SYM, U4245, AND PIN, I1, I, bootstrap/tx/n133<3>, , INV PIN, I2, I, n3788 PIN, O, O, n3794 END SYM, U4244, XOR PIN, I1, I, bootstrap/tx/baud<0> PIN, I2, I, bootstrap/tx/baud<1> PIN, O, O, n3788 END SYM, U4241, NAND PIN, I1, I, rcp_rcv_rd<10> PIN, I2, I, n3786 PIN, O, O, n2028 END SYM, U4240, NAND PIN, I1, I, receiver_interface/dac/cycle<0> PIN, I2, I, receiver_interface/dac/cycle<1> PIN, O, O, n3786 END SYM, U4089, XOR PIN, I1, I, n2013 PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<9> PIN, O, O, n3676 END SYM, U4088, AND PIN, I1, I, n2100, , INV PIN, I2, I, n3672 PIN, O, O, n3674 END SYM, U4087, XOR PIN, I1, I, n2282 PIN, I2, I, fan_interface/pwm/clock<9> PIN, O, O, n3672 END SYM, U4085, AND PIN, I1, I, n2100, , INV PIN, I2, I, n3670 PIN, O, O, n3675 END SYM, U4084, XOR PIN, I1, I, n2153 PIN, I2, I, fan_interface/pwm/clock<7> PIN, O, O, n3670 END SYM, U4082, AND PIN, I1, I, n3667 PIN, I2, I, n2290, , INV PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/edge_n PIN, O, O, n3668 END SYM, U4081, XOR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<0> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<1> PIN, O, O, n3667 END SYM, U2550, NAND PIN, I1, I, n2365 PIN, I2, I, n2364 PIN, O, O, n2366 END SYM, U2552, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<9>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2370 END SYM, U2553, NAND PIN, I1, I, address_generator/int_addr30<10>, , TS131 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2369 END SYM, U2554, NAND PIN, I1, I, n2370 PIN, I2, I, n2369 PIN, O, O, n2056 END SYM, tod_receiver/tod_receiver/shift_reg_reg<8>, DFF, BLKNM=U1677 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<8> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<9> END SYM, U2556, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<12>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2373 END SYM, U2557, NAND PIN, I1, I, address_generator/int_addr30<13>, , TS246 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2372 END SYM, U2558, NAND PIN, I1, I, n2373 PIN, I2, I, n2372 PIN, O, O, n2057 END SYM, U2711, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<6>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2493 END SYM, U2712, NAND PIN, I1, I, address_generator/int_addr30<7>, , TS224 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2492 END SYM, U2713, NAND PIN, I1, I, n2493 PIN, I2, I, n2492 PIN, O, O, n1930 END SYM, U2715, NAND PIN, I1, I, bs_addr<10>, , INV PIN, I2, I, n2165 PIN, O, O, n2495 END SYM, U2716, AND PIN, I1, I, n2035 PIN, I2, I, n2495 PIN, I3, I, bs_addr<11> PIN, O, O, n1931 END SYM, U2718, NAND PIN, I1, I, n2052 PIN, I2, I, n2165 PIN, I3, I, bs_addr<10> PIN, O, O, n2496 END SYM, U2719, AND PIN, I1, I, bs_addr<11>, , INV PIN, I2, I, n2496 PIN, O, O, n1932 END SYM, iic_bus_interface/iic/clock_reg<5>, DFF, BLKNM=U2170 PIN, D, I, n3069 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/clock<5> END SYM, bootstrap/incr_addr_reg, DFF, BLKNM=U2100 PIN, D, I, n3921 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/incr_addr END SYM, U3090, XOR PIN, I1, I, synthesizer_interface/synth/cycle<1> PIN, I2, I, synthesizer_interface/synth/cycle<0> PIN, O, O, n2809 END SYM, bootstrap/tx/baud_reg<7>, DFF, BLKNM=U1872 PIN, D, I, n3760 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/baud<7> END SYM, U3091, AND PIN, I1, I, rcp_sts2_rd PIN, I2, I, n2809 PIN, O, O, n2810 END SYM, U3092, XOR PIN, I1, I, audio_interface/aud/cycle<2> PIN, I2, I, n2811 PIN, O, O, n2812 END SYM, U3093, AND PIN, I1, I, audio_interface/aud/cycle<1> PIN, I2, I, audio_interface/aud/cycle<0> PIN, O, O, n2811 END SYM, U3094, AND PIN, I1, I, rcp_audio_rd<8> PIN, I2, I, n2812 PIN, O, O, n2815 END SYM, U3095, XOR PIN, I1, I, audio_interface/aud/cycle<1> PIN, I2, I, audio_interface/aud/cycle<0> PIN, O, O, n2813 END SYM, U3096, AND PIN, I1, I, rcp_audio_rd<8> PIN, I2, I, n2813 PIN, O, O, n2814 END SYM, U3098, NOR PIN, I1, I, bootstrap/tx/sreg_Q150<2>, , INV PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, O, n2817 END SYM, U3099, OR PIN, I1, I, n2817 PIN, I2, I, n2822 PIN, O, O, n2823 END SYM, U3250, NAND PIN, I1, I, n2947 PIN, I2, I, n2946 PIN, O, O, n1986 END SYM, U3251, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<2> PIN, O, O, n2949 END SYM, U3252, NAND PIN, I1, I, bootstrap/wr_source/r_mid<2> PIN, I2, I, n2089 PIN, O, O, n2948 END SYM, audio_interface/aud/clock_reg<1>, DFF, BLKNM=U1744 PIN, D, I, n3635 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/clock<1> END SYM, U3253, NAND PIN, I1, I, n2949 PIN, I2, I, n2948 PIN, O, O, n2064 END SYM, U3255, OR PIN, I1, I, n2163 PIN, I2, I, n2164 PIN, I3, I, n2162 PIN, O, O, n2950 END SYM, U3256, AND PIN, I1, I, n303, , INV PIN, I2, I, n2950 PIN, O, O, n2065 END SYM, U3257, AND PIN, I1, I, synthesizer_interface/synth/clock<2> PIN, I2, I, synthesizer_interface/synth/clock<1> PIN, I3, I, synthesizer_interface/synth/clock<0> PIN, O, O, n2120 END SYM, U3259, NAND PIN, I1, I, rcp_audio_rd<7> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n2954 END SYM, U3410, NAND PIN, I1, I, n2180 PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<5> PIN, O, O, n3085 END SYM, U3411, NAND PIN, I1, I, n2181 PIN, I2, I, rcp_audio_rd<4> PIN, O, O, n3084 END SYM, U3412, NAND PIN, I1, I, n3085 PIN, I2, I, n3084 PIN, O, O, n1802 END SYM, U3413, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<4> PIN, O, O, n3087 END SYM, U3414, NAND PIN, I1, I, bootstrap/wr_source/r_mid<4> PIN, I2, I, n2089 PIN, O, O, n3086 END SYM, U3415, NAND PIN, I1, I, n3087 PIN, I2, I, n3086 PIN, O, O, n2068 END SYM, U3416, AND PIN, I1, I, n2111 PIN, I2, I, rcp_rcv_rd<5> PIN, O, O, n3088 END SYM, U3417, NOR PIN, I1, I, n3088 PIN, I2, I, n1950 PIN, I3, I, n1803 PIN, O, O, n1951 END SYM, U3419, AND PIN, I1, I, synthesizer_interface/sync_high/wr_n_latch PIN, I2, I, n280, , INV PIN, I3, I, synthesizer_interface/sync_high/ale_select PIN, O, O, n3093 END SYM, synthesizer_interface/synth/shift_reg_reg<4>, DFF, BLKNM=U1904 PIN, D, I, n3608, , TS452, TS451 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<4> END SYM, synthesizer_interface/synth/shift_reg_reg<19>, DFF, BLKNM=U1900 PIN, D, I, n3624, , TS450, TS449 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<16> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<19> END SYM, audio_interface/aud/data_sreg_reg<0>, DFF, BLKNM=U1501 PIN, D, I, n2872, , TS447, TS446, TS445, TS444 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n413<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_audio_rd<0> END SYM, bootstrap/wr_source/r00/q_reg<0>, DFF, BLKNM=U1553 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r00/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<0> END SYM, synthesizer_interface/synth/clock_reg<3>, DFF, BLKNM=U2002 PIN, D, I, n3482 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/clock<3> END SYM, bootstrap/wr_source/r12/q_reg<1>, DFF, BLKNM=U1665 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r12/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<9> END SYM, U4389, NAND PIN, I1, I, address_generator/int_addr30<9>, , TS336, TS335, TS325 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n3891 END SYM, U4388, NAND PIN, I1, I, audio_interface/aud/comm_sreg_Q421<0> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n3892 END SYM, U4386, NAND PIN, I1, I, n3887 PIN, I2, I, n3886 PIN, O, O, n3888 END SYM, U4385, NAND PIN, I1, I, address_generator/int_addr30<12>, , TS219 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n3886 END SYM, U4384, NAND PIN, I1, I, audio_interface/aud/comm_sreg_Q421<3> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n3887 END SYM, U4382, NAND PIN, I1, I, n3884 PIN, I2, I, n3883 PIN, O, O, n3889 END SYM, U4381, NAND PIN, I1, I, rtc_divide/clock<0> PIN, I2, I, rtc_divide/clock<1>, , INV PIN, O, O, n3883 END SYM, U4380, OR PIN, I1, I, rtc_divide/clock<0> PIN, I2, I, rtc_divide/clk111 PIN, I3, I, rtc_divide/clock<1>, , INV PIN, O, O, n3884 END SYM, audio_interface/aud/ser_stb_reg, DFF, BLKNM=U2134 PIN, D, I, audio_interface/aud/ser_stb342 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n347 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1383 END SYM, iic_bus_interface/iic/shift_reg_reg<0>, DFF, BLKNM=U1786 PIN, D, I, n2986, , TS443, TS442, TS441, TS440 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n461<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/shift_reg_Q459<0> END SYM, bootstrap/dma_cnt/iq_reg<3>, DFF, BLKNM=U2030 PIN, D, I, n3037 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<3> END SYM, U3860, AND PIN, I1, I, bootstrap/tx/baud<7> PIN, I2, I, bootstrap/tx/baud<8> PIN, I3, I, bootstrap/tx/baud<6> PIN, I4, I, n1839 PIN, O, O, n1838 END SYM, U3862, XOR PIN, I1, I, bootstrap/tx/baud<6> PIN, I2, I, n1839 PIN, O, O, n3475 END SYM, U3863, AND PIN, I1, I, bootstrap/tx/n133<3>, , INV PIN, I2, I, n3475 PIN, O, O, n3477 END SYM, U3864, AND PIN, I1, I, n2184 PIN, I2, I, bootstrap/tx/baud<3> PIN, I3, I, bootstrap/tx/baud<4> PIN, I4, I, bootstrap/tx/baud<5> PIN, O, O, n1839 END SYM, U3866, XOR PIN, I1, I, synthesizer_interface/synth/clock<3> PIN, I2, I, n2120 PIN, O, O, n3478 END SYM, U3867, AND PIN, I1, I, synthesizer_interface/synth/n338<4>, , INV PIN, I2, I, n3478 PIN, O, O, n3482 END SYM, U3869, NAND PIN, I1, I, synthesizer_interface/synth/clock<0> PIN, I2, I, n2027, , INV PIN, O, O, n3481 END SYM, bootstrap/wr_source/r02/q_reg<0>, DFF, BLKNM=U1557 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r02/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<8> END SYM, interrupt_source/q_reg<3>, DFF, BLKNM=U1711 PIN, D, I, interrupt_source/q130<3> PIN, C, I, n278, , INV, TS0 PIN, CE, I, interrupt_source/n131<0> PIN, Q, O, interrupt_source/q<3> END SYM, interrupt_source/divide_reg<0>, DFF, BLKNM=U1549 PIN, D, I, n2324 PIN, C, I, n278, , INV, TS0 PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, interrupt_source/divide<0> END SYM, bootstrap/wr_source/r10/q_reg<1>, DFF, BLKNM=U1667 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r10/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<1> END SYM, tod_receiver/tod_receiver/shift_reg_reg<10>, DFF, BLKNM=U1559 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<10> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<11> END SYM, bootstrap/tx/sreg_reg<0>, DFF, BLKNM=U1563 PIN, D, I, bootstrap/tx/sreg146<0> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n152<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, n1412 END SYM, internal_port/sync/wr_n_latch_reg, DFF, BLKNM=U1671 PIN, D, I, antenna_interface/sync/wr_n_latch76, , TS439, TS416, TS389, TS285, TS227, TS203, TS169, TS59, TS52, TS51, TS30 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, internal_port/sync/wr_n_latch END SYM, U3110, NAND PIN, I1, I, bootstrap/incr_en48 PIN, I2, I, n2213 PIN, O, O, n2828 END SYM, U3111, NAND PIN, I1, I, n2828 PIN, I2, I, n2835, , INV PIN, O, O, n2836 END SYM, U3114, NAND PIN, I1, I, n2156 PIN, I2, I, n2165 PIN, I3, I, bs_addr<4>, , INV PIN, O, O, n2834 END SYM, U3115, OR PIN, I1, I, bs_addr<4>, , INV PIN, I2, I, n2830 PIN, O, O, n2833 END SYM, U3116, AND PIN, I1, I, n1867 PIN, I2, I, n2832 PIN, O, O, n2830 END SYM, U3117, NAND PIN, I1, I, n2165 PIN, I2, I, n2156, , INV PIN, O, O, n2832 END SYM, U3118, NAND PIN, I1, I, n2834 PIN, I2, I, n2833 PIN, O, O, n2835 END SYM, tod_receiver/tod_receiver/manchester_decoder/edge_n_reg, DFF, BLKNM=U1750 PIN, D, I, n3436 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/edge_n END SYM, U2860, NAND PIN, I1, I, n2180 PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<1> PIN, O, O, n2610 END SYM, U2861, NAND PIN, I1, I, n2611 PIN, I2, I, n2610 PIN, O, O, n2108 END SYM, U2863, AND PIN, I1, I, synthesizer_interface/sync_low/wr_n_latch PIN, I2, I, n280, , INV PIN, I3, I, synthesizer_interface/sync_low/ale_select PIN, O, O, n2613 END SYM, U2864, NOR PIN, I1, I, n2211 PIN, I2, I, n2213 PIN, I3, I, n1864 PIN, I4, I, n1866 PIN, O, O, n1870 END SYM, U2866, AND PIN, I1, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I2, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I3, I, n2185 PIN, I4, I, address_generator/int_addr30<4>, , INV, TS98, TS29, TS28 PIN, O, O, n2617 END SYM, U2868, AND PIN, I1, I, iic_bus_interface/sync/wr_n_latch PIN, I2, I, n280, , INV PIN, I3, I, iic_bus_interface/sync/ale_select PIN, O, O, n2616 END SYM, synthesizer_interface/synth/shift_reg_reg<21>, DFF, BLKNM=U1902 PIN, D, I, n3615, , TS438, TS437 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<16> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<21> END SYM, antenna_interface/ant/shift_reg_reg<1>, DFF, BLKNM=U1842 PIN, D, I, n2359, , TS436, TS435 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<1> END SYM, audio_interface/aud/cycle_reg<3>, DFF, BLKNM=U1531 PIN, D, I, n2442 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n394<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/cycle<3> END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<3>, DFF, BLKNM=U2012 PIN, D, I, n3316 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<3> END SYM, fan_interface/pwm/shift_reg_reg<8>, DFF, BLKNM=U1519 PIN, D, I, n2660, , TS434, TS433 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<8> END SYM, U3560, AND PIN, I1, I, n1867 PIN, I2, I, n3220 PIN, O, O, n3221 END SYM, U3562, NAND PIN, I1, I, bootstrap/rx/sreg274<5> PIN, I2, I, n1864 PIN, O, O, n3225 END SYM, U3563, NAND PIN, I1, I, n3225 PIN, I2, I, n3229, , INV PIN, O, O, n3230 END SYM, U3565, OR PIN, I1, I, n1841 PIN, I2, I, bs_addr<2>, , INV PIN, O, O, n3228 END SYM, U3566, NAND PIN, I1, I, n1993 PIN, I2, I, bs_addr<2>, , INV PIN, O, O, n3227 END SYM, U3567, NAND PIN, I1, I, n3228 PIN, I2, I, n3227 PIN, O, O, n3229 END SYM, U3568, AND PIN, I1, I, bootstrap/decode/address<4> PIN, I2, I, bootstrap/decode/address<5> PIN, I3, I, n1940 PIN, I4, I, n2055 PIN, O, O, n1864 END SYM, U3720, NAND PIN, I1, I, n3360 PIN, I2, I, n3365, , INV PIN, O, O, n3366 END SYM, U3722, OR PIN, I1, I, n2034 PIN, I2, I, bs_addr<18>, , INV PIN, O, O, n3363 END SYM, U3723, NAND PIN, I1, I, n1991 PIN, I2, I, bs_addr<18>, , INV PIN, O, O, n3362 END SYM, U3724, NAND PIN, I1, I, n3363 PIN, I2, I, n3362 PIN, O, O, n3365 END SYM, U3726, AND PIN, I1, I, bootstrap/n53 PIN, I2, I, n1417 PIN, I3, I, n2055 PIN, I4, I, n2222, , INV PIN, O, O, n2212 END SYM, U3727, NAND PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<8> PIN, I2, I, n2180 PIN, O, O, n3368 END SYM, U3728, NAND PIN, I1, I, rcp_rcv_rd<7> PIN, I2, I, n2111 PIN, O, O, n3367 END SYM, U3729, NAND PIN, I1, I, n3368 PIN, I2, I, n3367 PIN, O, O, n2118 END SYM, synthesizer_interface/synth/cycle_reg<4>, DFF, BLKNM=U2138 PIN, D, I, n3693 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n338<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/cycle<4> END SYM, audio_interface/aud/busy_reg, DFF, BLKNM=U1569 PIN, D, I, audio_interface/aud/busy360 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n365 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_audio_rd<8> END SYM, bootstrap/rx/sreg_reg<7>, DFF, BLKNM=U1703 PIN, D, I, bootstrap/rx/sreg274<7>, , TS432, TS431 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n278<0> PIN, Q, O, bootstrap/rx/sreg274<6> END SYM, rtc_divide/clock_reg<6>, DFF, BLKNM=U2064 PIN, D, I, n2534 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rtc_divide/clock<6> END SYM, internal_port/sync/ale_select_reg, DFF, BLKNM=U1571 PIN, D, I, internal_port/sync/ale_select67, , TS430, TS429, TS428, TS427, TS426, TS425, TS424, TS423, TS422, TS421, TS420, TS419, TS278, TS277, TS276, TS275, TS274, TS273, TS272, TS271, TS270, TS269, TS268, TS267 PIN, C, I, n278, , INV, TS0 PIN, CE, I, internal_port/sync/n72 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, internal_port/sync/ale_select END SYM, audio_interface/aud/comm_sreg_reg<4>, DFF, BLKNM=U1852 PIN, D, I, n3888, , TS418, TS417 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n423<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/comm_sreg_Q421<4> END SYM, U4239, NAND PIN, I1, I, rcp_sts2_rd PIN, I2, I, n3785 PIN, O, O, n1879 END SYM, U4238, NAND PIN, I1, I, synthesizer_interface/synth/cycle<0> PIN, I2, I, synthesizer_interface/synth/cycle<2> PIN, I3, I, synthesizer_interface/synth/cycle<1> PIN, O, O, n3785 END SYM, U4236, NAND PIN, I1, I, rcp_audio_rd<8> PIN, I2, I, n3783 PIN, O, O, n1878 END SYM, U4235, NAND PIN, I1, I, audio_interface/aud/cycle<1> PIN, I2, I, audio_interface/aud/cycle<0> PIN, I3, I, audio_interface/aud/cycle<2> PIN, O, O, n3783 END SYM, U4234, NAND PIN, I1, I, n3782 PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, iic_bus_interface/iic/n432 END SYM, U4233, NAND PIN, I1, I, n1989 PIN, I2, I, n1982 PIN, I3, I, iic_bus_interface/iic/cycle<3> PIN, O, O, n3782 END SYM, U4231, OR PIN, I1, I, n3780 PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, O, bootstrap/tx/n142 END SYM, U4230, AND PIN, I1, I, n1868 PIN, I2, I, n2159, , INV PIN, I3, I, n2160, , INV PIN, O, O, n3780 END SYM, U4079, AND PIN, I1, I, n2100, , INV PIN, I2, I, n3664 PIN, O, O, n3669 END SYM, U4077, NAND PIN, I1, I, fan_interface/pwm/clock<10> PIN, I2, I, n2250 PIN, O, O, n3663 END SYM, U4075, AND PIN, I1, I, n1880, , INV PIN, I2, I, n3659 PIN, O, O, n3661 END SYM, U4073, NAND PIN, I1, I, audio_interface/aud/clock<3> PIN, I2, I, n2247 PIN, O, O, n3658 END SYM, U4071, AND PIN, I1, I, n2246 PIN, I2, I, n3657 PIN, O, O, n3662 END SYM, U4070, AND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<12> PIN, I2, I, n2252 PIN, O, O, n3656 END SYM, U2560, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<11>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2376 END SYM, U2561, NAND PIN, I1, I, address_generator/int_addr30<12>, , TS219 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2375 END SYM, U2562, NAND PIN, I1, I, n2376 PIN, I2, I, n2375 PIN, O, O, n2058 END SYM, U2564, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<14>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2379 END SYM, tod_receiver/tod_receiver/shift_reg_reg<7>, DFF, BLKNM=U1673 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<7> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<8> END SYM, U2565, NAND PIN, I1, I, address_generator/int_addr30<15>, , TS353, TS95, TS94 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2378 END SYM, U2566, NAND PIN, I1, I, n2379 PIN, I2, I, n2378 PIN, O, O, n2059 END SYM, U2568, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<15>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2382 END SYM, U2569, NAND PIN, I1, I, synthesizer_interface/synth/shift_reg<16> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2381 END SYM, iic_bus_interface/iic/cycle_reg<0>, DFF, BLKNM=U1826 PIN, D, I, n2574 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n489<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/cycle<0> END SYM, U2720, OR PIN, I1, I, n1944 PIN, I2, I, n2499 PIN, O, O, bootstrap/rd_control/n106 END SYM, U2722, AND PIN, I1, I, bootstrap/rx/sreg274<2> PIN, I2, I, n1980 PIN, I3, I, n2055 PIN, I4, I, bootstrap/rx/sreg274<1>, , INV PIN, O, O, n2499 END SYM, U2724, AND PIN, I1, I, address_generator/int_addr30<9>, , TS336, TS335, TS325 PIN, I2, I, address_generator/int_addr30<8>, , INV, TS261 PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, O, n2503 END SYM, U2726, AND PIN, I1, I, rcp_sts2_rd PIN, I2, I, synthesizer_interface/synth/clock<0>, , INV PIN, O, O, n2502 END SYM, U2728, NOR PIN, I1, I, synthesizer_interface/synth/int_busy303, , INV PIN, I2, I, address_generator/int_addr30<9>, , TS336, TS335, TS325 PIN, I3, I, address_generator/int_addr30<8>, , TS261 PIN, O, O, n2507 END SYM, synthesizer_interface/sync_high/wr_n_latch_reg, DFF, BLKNM=U1734 PIN, D, I, antenna_interface/sync/wr_n_latch76, , TS439, TS416, TS389, TS285, TS227, TS203, TS169, TS59, TS52, TS51, TS30 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/sync_high/wr_n_latch END SYM, iic_bus_interface/iic/clock_reg<4>, DFF, BLKNM=U1922 PIN, D, I, n3279 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/clock<4> END SYM, bootstrap/tx/baud_reg<8>, DFF, BLKNM=U2144 PIN, D, I, n3540 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/baud<8> END SYM, fill_output/fill_cc_dat_reg, DFF, BLKNM=U1669 PIN, D, I, address_generator/int_addr30<0>, , TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fill_output/n124 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1408 END SYM, U3260, NAND PIN, I1, I, address_generator/int_addr30<8>, , TS261 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n2953 END SYM, U3261, NAND PIN, I1, I, n2954 PIN, I2, I, n2953 PIN, O, O, n2955 END SYM, U3262, NAND PIN, I1, I, bootstrap/rx/sreg274<5> PIN, I2, I, n2130 PIN, O, O, n2956 END SYM, audio_interface/aud/clock_reg<2>, DFF, BLKNM=U1744 PIN, D, I, n3634 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/clock<2> END SYM, U3263, AND PIN, I1, I, bootstrap/rx/sreg274<4> PIN, I2, I, n2956 PIN, O, O, n2958 END SYM, U3265, AND PIN, I1, I, bootstrap/decode/address<5> PIN, I2, I, n1940 PIN, I3, I, n2129 PIN, I4, I, bootstrap/decode/address<4>, , INV PIN, O, O, bootstrap/wr_source/r23/n51<0> END SYM, U3267, AND PIN, I1, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I2, I, n1979, , INV PIN, I3, I, address_generator/int_addr30<3>, , TS458, TS457, TS124, TS123, TS81 PIN, O, O, n2961 END SYM, U3269, NOR PIN, I1, I, rcp_addr_tri/y12<4> PIN, I2, I, rcp_addr_tri/y12<3> PIN, I3, I, rcp_addr_tri/y12<2> PIN, I4, I, rcp_addr_tri/y12<1>, , INV PIN, O, O, n1799 END SYM, U3421, OR PIN, I1, I, n2160 PIN, I2, I, n2159 PIN, O, O, n3091 END SYM, tod_receiver/tod_receiver/manchester_decoder/sdai_1_reg, DFF, BLKNM=U1715 PIN, D, I, tod_receiver/tod_receiver/manchester_decoder/sdai_1238, , TS412 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/sdai_2247 END SYM, U3422, AND PIN, I1, I, n3091 PIN, I2, I, bootstrap/tx/baud<0>, , INV PIN, I3, I, bootstrap/tx_busy PIN, O, O, n3092 END SYM, U3423, NAND PIN, I1, I, n2165 PIN, I2, I, n3094 PIN, O, O, n3095 END SYM, U3424, NAND PIN, I1, I, bs_addr<17> PIN, I2, I, n2155 PIN, O, O, n3094 END SYM, U3425, AND PIN, I1, I, n1870 PIN, I2, I, n3095 PIN, O, O, n2034 END SYM, U3426, XOR PIN, I1, I, iic_bus_interface/iic/cycle<2> PIN, I2, I, n3096 PIN, O, O, n3097 END SYM, U3427, AND PIN, I1, I, iic_bus_interface/iic/cycle<0> PIN, I2, I, iic_bus_interface/iic/cycle<1> PIN, O, O, n3096 END SYM, U3428, AND PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, n3097 PIN, O, O, n3098 END SYM, U3429, NOR PIN, I1, I, bootstrap/rx/baud16<0> PIN, I2, I, n2167 PIN, O, O, n3099 END SYM, synthesizer_interface/synth/shift_reg_reg<3>, DFF, BLKNM=U1904 PIN, D, I, n3607, , TS411, TS410 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<3> END SYM, audio_interface/aud/data_sreg_reg<1>, DFF, BLKNM=U1856 PIN, D, I, n3872, , TS409, TS408 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n413<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_audio_rd<1> END SYM, audio_interface/aud/free_clk_reg, DFF, BLKNM=U1740 PIN, D, I, n3637 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n356 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1385 END SYM, receiver_interface/dac/shift_reg_reg<9>, DFF, BLKNM=U1816 PIN, D, I, n2709, , TS407, TS406 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_rcv_rd<7> END SYM, bootstrap/wr_source/r00/q_reg<1>, DFF, BLKNM=U1575 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r00/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<1> END SYM, fan_interface/sync/ale_latch_reg, DFF, BLKNM=U1717 PIN, D, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/sync/n72 END SYM, U4538, IBUF PIN, I, I, radio_rly_ky PIN, O, O, interrupt_source/q130<4> END SYM, U4537, IBUF PIN, I, I, tone_key PIN, O, O, interrupt_source/q130<2> END SYM, U4536, IBUF PIN, I, I, ptt PIN, O, O, interrupt_source/q130<0> END SYM, U4535, IBUF PIN, I, I, power_on PIN, O, O, rcp_sts1_rd END SYM, U4534, IBUF PIN, I, I, xmod_ctl PIN, O, O, rcp_sts1_rd END SYM, U4533, IBUF PIN, I, I, take_ctl PIN, O, O, rcp_sts1_rd END SYM, U4532, IBUF PIN, I, I, sqlch_tn_dis PIN, O, O, rcp_sts1_rd END SYM, U4531, IBUF PIN, I, I, fan_enable PIN, O, O, rcp_sts1_rd END SYM, U4530, IBUF PIN, I, I, dig_dat_sel PIN, O, O, rcp_sts1_rd END SYM, bootstrap/wr_source/r12/q_reg<0>, DFF, BLKNM=U1577 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r12/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<8> END SYM, synthesizer_interface/synth/clock_reg<2>, DFF, BLKNM=U1926 PIN, D, I, n3265 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/clock<2> END SYM, U4378, NAND PIN, I1, I, n3879 PIN, I2, I, n3878 PIN, O, O, n3880 END SYM, U4377, NAND PIN, I1, I, address_generator/int_addr30<14>, , TS312 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n3878 END SYM, U4376, NAND PIN, I1, I, audio_interface/aud/comm_sreg_Q421<5> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n3879 END SYM, U4374, NAND PIN, I1, I, n3876 PIN, I2, I, n3875 PIN, O, O, n3881 END SYM, U4373, NAND PIN, I1, I, address_generator/int_addr30<11>, , TS185, TS89, TS88 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n3875 END SYM, U4372, NAND PIN, I1, I, audio_interface/aud/comm_sreg_Q421<2> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n3876 END SYM, U4370, NAND PIN, I1, I, n3871 PIN, I2, I, n3870 PIN, O, O, n3872 END SYM, bootstrap/dma_cnt/iq_reg<2>, DFF, BLKNM=U2160 PIN, D, I, n3230 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<2> END SYM, U3870, NAND PIN, I1, I, rcp_sts2_rd PIN, I2, I, n3481 PIN, O, O, synthesizer_interface/synth/n338<4> END SYM, U3872, NOR PIN, I1, I, n1825, , INV PIN, I2, I, n1826 PIN, O, O, n3484 END SYM, U3873, OR PIN, I1, I, n3484 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, audio_interface/aud/n423<0> END SYM, U3874, NOR PIN, I1, I, audio_interface/aud/cycle<4> PIN, I2, I, audio_interface/aud/cycle<2> PIN, I3, I, audio_interface/aud/cycle<1> PIN, I4, I, audio_interface/aud/cycle<0> PIN, O, O, n1826 END SYM, U3877, NOR PIN, I1, I, address_generator/int_addr30<1>, , INV, TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3487 END SYM, U3878, OR PIN, I1, I, n3487 PIN, I2, I, n2217 PIN, O, O, n3492 END SYM, bootstrap/wr_source/r02/q_reg<1>, DFF, BLKNM=U1579 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r02/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<9> END SYM, interrupt_source/q_reg<4>, DFF, BLKNM=U1709 PIN, D, I, interrupt_source/q130<4>, , TS404, TS403 PIN, C, I, n278, , INV, TS0 PIN, CE, I, interrupt_source/n131<0> PIN, Q, O, interrupt_source/q130<5> END SYM, bootstrap/wr_source/r10/q_reg<0>, DFF, BLKNM=U1667 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r10/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<0> END SYM, bootstrap/tx/sreg_reg<1>, DFF, BLKNM=U2048 PIN, D, I, n2823, , TS402, TS401, TS400, TS399 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n152<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/sreg_Q150<1> END SYM, U3120, NAND PIN, I1, I, bootstrap/rx/sreg274<4> PIN, I2, I, n1864 PIN, O, O, n2838 END SYM, U3121, NAND PIN, I1, I, n2838 PIN, I2, I, n2845, , INV PIN, O, O, n2846 END SYM, U3124, NAND PIN, I1, I, bs_addr<0> PIN, I2, I, n2165 PIN, I3, I, bs_addr<1>, , INV PIN, O, O, n2844 END SYM, U3125, OR PIN, I1, I, bs_addr<1>, , INV PIN, I2, I, n2840 PIN, O, O, n2843 END SYM, U3126, AND PIN, I1, I, n1869 PIN, I2, I, n2842 PIN, O, O, n2840 END SYM, U3127, NAND PIN, I1, I, n2165 PIN, I2, I, bs_addr<0>, , INV PIN, O, O, n2842 END SYM, U3128, NAND PIN, I1, I, n2844 PIN, I2, I, n2843 PIN, O, O, n2845 END SYM, memory_interface/dff_reg, DFF, BLKNM=U1673 PIN, D, I, memory_interface/dff139, , TS398 PIN, C, I, n278, , INV, TS0 PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, memory_interface/rcp_1553_cs_n148 END SYM, fan_interface/pwm/shift_reg_reg<10>, DFF, BLKNM=U1770 PIN, D, I, n3149, , TS397, TS396 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<10> END SYM, U2870, AND PIN, I1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I2, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I3, I, n2185 PIN, I4, I, address_generator/int_addr30<1>, , INV, TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, O, O, n2619 END SYM, U2871, NOR PIN, I1, I, n279 PIN, I2, I, address_generator/int_addr30<15>, , TS353, TS95, TS94 PIN, I3, I, address_generator/int_addr30<3>, , TS458, TS457, TS124, TS123, TS81 PIN, O, O, n2185 END SYM, U2873, AND PIN, I1, I, audio_interface/sync/wr_n_latch PIN, I2, I, n280, , INV PIN, I3, I, audio_interface/sync/ale_select PIN, O, O, n2623 END SYM, U2875, NOR PIN, I1, I, bootstrap/rd_control/cycle<2>, , INV PIN, I2, I, bootstrap/rd_control/cycle<0> PIN, I3, I, bootstrap/rd_control/cycle<1> PIN, O, O, n2622 END SYM, U2877, AND PIN, I1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I2, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I3, I, n2185 PIN, I4, I, address_generator/int_addr30<2>, , INV, TS58, TS57, TS46, TS3, TS2 PIN, O, O, n2627 END SYM, U2879, AND PIN, I1, I, fill_output/sync/wr_n_latch PIN, I2, I, n280, , INV PIN, I3, I, fill_output/sync/ale_select PIN, O, O, n2626 END SYM, synthesizer_interface/synth/shift_reg_reg<22>, DFF, BLKNM=U1902 PIN, D, I, n3616, , TS395, TS394 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<16> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<22> END SYM, antenna_interface/ant/shift_reg_reg<2>, DFF, BLKNM=U1840 PIN, D, I, n2366, , TS393, TS392 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<2> END SYM, audio_interface/aud/cycle_reg<4>, DFF, BLKNM=U2146 PIN, D, I, n3535 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n394<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/cycle<4> END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<2>, DFF, BLKNM=U2020 PIN, D, I, n3185 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<2> END SYM, fan_interface/pwm/shift_reg_reg<7>, DFF, BLKNM=U1519 PIN, D, I, n2295, , TS391, TS390 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<7> END SYM, receiver_interface/sync/wr_n_latch_reg, DFF, BLKNM=U1679 PIN, D, I, antenna_interface/sync/wr_n_latch76, , TS439, TS416, TS389, TS285, TS227, TS203, TS169, TS59, TS52, TS51, TS30 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/sync/wr_n_latch END SYM, U3570, NAND PIN, I1, I, n2149, , INV PIN, I2, I, bootstrap/rx/busy PIN, O, O, bootstrap/rx/n252<3> END SYM, bootstrap/rx/busy_reg, DFF, BLKNM=U1760 PIN, D, I, n3310, , TS388, TS387 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n261 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/busy END SYM, U3572, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<10> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n3234 END SYM, U3573, NAND PIN, I1, I, address_generator/int_addr30<11>, , TS185, TS89, TS88 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n3233 END SYM, U3574, NAND PIN, I1, I, n3234 PIN, I2, I, n3233 PIN, O, O, n3235 END SYM, U3575, NAND PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<6> PIN, I2, I, n2180 PIN, O, O, n3237 END SYM, U3576, NAND PIN, I1, I, rcp_audio_rd<5> PIN, I2, I, n2181 PIN, O, O, n3236 END SYM, U3577, NAND PIN, I1, I, n3237 PIN, I2, I, n3236 PIN, O, O, n1803 END SYM, U3578, NAND PIN, I1, I, rcp_sts1_rd PIN, I2, I, n1875 PIN, O, O, n3239 END SYM, U3579, NAND PIN, I1, I, rcp_iic_rd<5> PIN, I2, I, n1921 PIN, O, O, n3238 END SYM, U3730, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<7> PIN, O, O, n3370 END SYM, U3731, NAND PIN, I1, I, bootstrap/wr_source/r_mid<7> PIN, I2, I, n2089 PIN, O, O, n3369 END SYM, U3732, NAND PIN, I1, I, n3370 PIN, I2, I, n3369 PIN, O, O, n2119 END SYM, U3733, AND PIN, I1, I, n2111 PIN, I2, I, rcp_rcv_rd<8> PIN, O, O, n3371 END SYM, U3734, NOR PIN, I1, I, n3371 PIN, I2, I, n2262 PIN, I3, I, n2261 PIN, O, O, n2263 END SYM, U3735, NAND PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<9> PIN, I2, I, n2180 PIN, O, O, n3373 END SYM, U3736, NAND PIN, I1, I, n2181 PIN, I2, I, rcp_audio_rd<8> PIN, O, O, n3372 END SYM, U3737, NAND PIN, I1, I, n3373 PIN, I2, I, n3372 PIN, O, O, n2261 END SYM, synthesizer_interface/synth/cycle_reg<3>, DFF, BLKNM=U1802 PIN, D, I, n2926 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n338<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/cycle<3> END SYM, synthesizer_interface/synth/ser_enbl_reg<0>, DFF, BLKNM=U1974 PIN, D, I, n2507, , TS386, TS385, TS384, TS383 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n318<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1380 END SYM, rtc_divide/clock_reg<7>, DFF, BLKNM=U1754 PIN, D, I, n3430 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rtc_divide/clock<7> END SYM, iic_bus_interface/iic/scl_reg, DFF, BLKNM=U1991 PIN, D, I, n3939, , TS382, TS381 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n423 PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, n1370 END SYM, audio_interface/aud/comm_sreg_reg<3>, DFF, BLKNM=U1854 PIN, D, I, n3881, , TS380, TS379 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n423<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/comm_sreg_Q421<3> END SYM, U4227, OR PIN, I1, I, n3777 PIN, I2, I, audio_interface/aud/ser_stb342 PIN, O, O, audio_interface/aud/n347 END SYM, U4226, NOR PIN, I1, I, n2170, , INV PIN, I2, I, audio_interface/aud/cycle<4> PIN, I3, I, audio_interface/aud/cycle<3>, , INV PIN, O, O, n3777 END SYM, U4223, AND PIN, I1, I, bootstrap/rx/baud16<4> PIN, I2, I, n1890 PIN, O, O, n2227 END SYM, U4222, AND PIN, I1, I, rtc_divide/clock<7> PIN, I2, I, n2225 PIN, I3, I, rtc_divide/clock<6> PIN, O, O, n2076 END SYM, U4221, AND PIN, I1, I, antenna_interface/ant/cycle<0> PIN, I2, I, antenna_interface/ant/cycle<1> PIN, O, O, n2080 END SYM, U4220, AND PIN, I1, I, receiver_interface/dac/cycle<0> PIN, I2, I, receiver_interface/dac/cycle<1> PIN, O, O, n2256 END SYM, U4069, XOR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<13> PIN, I2, I, n3656 PIN, O, O, n3657 END SYM, U4068, AND PIN, I1, I, n2234 PIN, I2, I, n1958, , INV PIN, O, O, n1982 END SYM, U4066, OR PIN, I1, I, n3654 PIN, I2, I, n1956 PIN, O, O, iic_bus_interface/iic/n423 END SYM, U4065, NOR PIN, I1, I, n1872 PIN, I2, I, n1982 PIN, O, O, n3653 END SYM, U4064, NOR PIN, I1, I, n2018 PIN, I2, I, n3653 PIN, O, O, n3654 END SYM, U4063, NAND PIN, I1, I, n3652 PIN, I2, I, bootstrap/tx/int_busy137, , INV PIN, O, O, bootstrap/tx/n152<0> END SYM, U4062, OR PIN, I1, I, n2160 PIN, I2, I, n1868 PIN, I3, I, n2159 PIN, O, O, n3652 END SYM, U4060, NAND PIN, I1, I, bootstrap/tx_busy PIN, I2, I, n2084, , INV PIN, I3, I, bootstrap/rd_control/cyc_rst_n PIN, O, O, bootstrap/rd_control/n125<0> END SYM, U2570, NAND PIN, I1, I, n2382 PIN, I2, I, n2381 PIN, O, O, n2218 END SYM, U2572, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<18>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2385 END SYM, U2573, NAND PIN, I1, I, synthesizer_interface/synth/shift_reg<19> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2384 END SYM, U2574, NAND PIN, I1, I, n2385 PIN, I2, I, n2384 PIN, O, O, n2219 END SYM, tod_receiver/tod_receiver/shift_reg_reg<6>, DFF, BLKNM=U1681 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<7> END SYM, U2576, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<17>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2388 END SYM, U2577, NAND PIN, I1, I, synthesizer_interface/synth/shift_reg<18> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2387 END SYM, U2578, NAND PIN, I1, I, n2388 PIN, I2, I, n2387 PIN, O, O, n2220 END SYM, iic_bus_interface/iic/cycle_reg<1>, DFF, BLKNM=U1784 PIN, D, I, n2991 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n489<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/cycle<1> END SYM, U2730, AND PIN, I1, I, address_generator/int_addr30<8>, , TS261 PIN, I2, I, address_generator/int_addr30<9>, , INV, TS336, TS335, TS325 PIN, I3, I, synthesizer_interface/synth/int_busy303 PIN, O, O, n2506 END SYM, U2731, AND PIN, I1, I, audio_interface/aud/ser_stb342 PIN, I2, I, audio_interface/aud/read_cycle PIN, O, O, n2510 END SYM, U2734, AND PIN, I1, I, rcp_addr_tri/y12<2> PIN, I2, I, rcp_addr_tri/y12<1> PIN, I3, I, rcp_addr_tri/y12<3>, , INV PIN, I4, I, rcp_addr_tri/y12<4>, , INV PIN, O, O, n2181 END SYM, U2736, AND PIN, I1, I, iic_bus_interface/iic/shift_reg_Q459<0> PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2286 END SYM, U2738, AND PIN, I1, I, receiver_interface/sync/wr_n_latch PIN, I2, I, n280, , INV PIN, I3, I, receiver_interface/sync/ale_select PIN, O, O, n2513 END SYM, iic_bus_interface/iic/clock_reg<3>, DFF, BLKNM=U2050 PIN, D, I, n2655 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/clock<3> END SYM, bootstrap/tx/baud_reg<9>, DFF, BLKNM=U2006 PIN, D, I, n3474 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/baud<9> END SYM, U3271, NOR PIN, I1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I2, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I3, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I4, I, n2185, , INV PIN, O, O, n2964 END SYM, audio_interface/aud/clock_reg<3>, DFF, BLKNM=U2008 PIN, D, I, n3471 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/clock<3> END SYM, U3273, AND PIN, I1, I, n2129 PIN, I2, I, bootstrap/rx/sreg274<2>, , INV PIN, I3, I, n1980 PIN, O, O, bootstrap/wr_source/r03/n51<0> END SYM, U3275, AND PIN, I1, I, rcp_rcv_rd<9> PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, n2293 END SYM, U3276, AND PIN, I1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I2, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I3, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I4, I, n2185 PIN, O, O, n2966 END SYM, U3278, AND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<15> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n2970 END SYM, U3430, AND PIN, I1, I, n2153 PIN, I2, I, fan_interface/pwm/clock<7> PIN, I3, I, fan_interface/pwm/clock<8> PIN, I4, I, fan_interface/pwm/clock<9> PIN, O, O, n2250 END SYM, U3433, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<9>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3102 END SYM, U3434, OR PIN, I1, I, n3102 PIN, I2, I, n2191 PIN, O, O, synthesizer_interface/synth/shift_reg342<9> END SYM, U3435, NOR PIN, I1, I, rtc_divide/clock<0> PIN, I2, I, rtc_divide/clk111 PIN, O, O, n3103 END SYM, U3438, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<1>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3106 END SYM, U3439, OR PIN, I1, I, n3106 PIN, I2, I, n2189 PIN, O, O, synthesizer_interface/synth/shift_reg342<1> END SYM, synthesizer_interface/synth/shift_reg_reg<2>, DFF, BLKNM=U1908 PIN, D, I, n3592, , TS377, TS376 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<2> END SYM, audio_interface/aud/data_sreg_reg<2>, DFF, BLKNM=U1856 PIN, D, I, n3873, , TS375, TS374 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n413<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_audio_rd<2> END SYM, receiver_interface/dac/shift_reg_reg<8>, DFF, BLKNM=U1561 PIN, D, I, n2291, , TS373, TS372 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_rcv_rd<6> END SYM, bootstrap/wr_source/r00/q_reg<2>, DFF, BLKNM=U1727 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r00/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<2> END SYM, U4529, IBUF PIN, I, I, ant_sel PIN, O, O, rcp_sts1_rd END SYM, U4520, IBUF PIN, I, I, fill_mode PIN, O, O, rcp_fill_rd END SYM, synthesizer_interface/synth/clock_reg<1>, DFF, BLKNM=U1928 PIN, D, I, n3258 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/clock<1> END SYM, U4369, NAND PIN, I1, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n3870 END SYM, U4368, NAND PIN, I1, I, rcp_audio_rd<0> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n3871 END SYM, U4366, NAND PIN, I1, I, n3868 PIN, I2, I, n3867 PIN, O, O, n3873 END SYM, U4365, NAND PIN, I1, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n3867 END SYM, U4364, NAND PIN, I1, I, rcp_audio_rd<1> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n3868 END SYM, U4362, NAND PIN, I1, I, n3863 PIN, I2, I, n3862 PIN, O, O, n3864 END SYM, U4361, NAND PIN, I1, I, address_generator/int_addr30<3>, , TS458, TS457, TS124, TS123, TS81 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n3862 END SYM, U4360, NAND PIN, I1, I, rcp_audio_rd<2> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n3863 END SYM, bootstrap/dma_cnt/iq_reg<1>, DFF, BLKNM=U2042 PIN, D, I, n2846 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<1> END SYM, U3881, NOR PIN, I1, I, address_generator/int_addr30<0>, , INV, TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3490 END SYM, U3882, OR PIN, I1, I, n3490 PIN, I2, I, n2218 PIN, O, O, n3491 END SYM, U3885, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<15>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3495 END SYM, U3886, OR PIN, I1, I, n3495 PIN, I2, I, n2059 PIN, O, O, n3500 END SYM, U3889, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<14>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3498 END SYM, bootstrap/wr_source/r02/q_reg<2>, DFF, BLKNM=U1605 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r02/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<10> END SYM, fan_interface/pwm/clock_reg<0>, DFF, BLKNM=U1742 PIN, D, I, n3636 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/clock<0> END SYM, interrupt_source/q_reg<5>, DFF, BLKNM=U1709 PIN, D, I, interrupt_source/q130<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, interrupt_source/n131<0> PIN, Q, O, interrupt_source/q<5> END SYM, bootstrap/tx/sreg_reg<2>, DFF, BLKNM=U2054 PIN, D, I, n2651, , TS371, TS370, TS369, TS368 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n152<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/sreg_Q150<2> END SYM, U3130, XOR PIN, I1, I, antenna_interface/ant/clock<7> PIN, I2, I, n1907 PIN, O, O, n2847 END SYM, U3131, AND PIN, I1, I, antenna_interface/ant/n268<4>, , INV PIN, I2, I, n2847 PIN, O, O, n2849 END SYM, bootstrap/rx/baud16_reg<6>, DFF, BLKNM=U1926 PIN, D, I, n3266 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/baud16<6> END SYM, U3132, AND PIN, I1, I, antenna_interface/ant/clock<4> PIN, I2, I, antenna_interface/ant/clock<5> PIN, I3, I, antenna_interface/ant/clock<6> PIN, I4, I, n2216 PIN, O, O, n1907 END SYM, U3134, NOR PIN, I1, I, n2234, , INV PIN, I2, I, n1958 PIN, O, O, n2851 END SYM, U3135, OR PIN, I1, I, n2851 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, iic_bus_interface/iic/n461<0> END SYM, U3138, NAND PIN, I1, I, iic_bus_interface/iic/clock<5> PIN, I2, I, iic_bus_interface/iic/clock<7>, , INV PIN, I3, I, iic_bus_interface/iic/clock<6> PIN, I4, I, iic_bus_interface/iic/clock<2>, , INV PIN, O, O, n1958 END SYM, fan_interface/pwm/shift_reg_reg<11>, DFF, BLKNM=U1770 PIN, D, I, n3150, , TS367, TS366 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<11> END SYM, U2881, NOR PIN, I1, I, bootstrap/tx/sreg_Q150<5>, , INV PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, O, n2629 END SYM, U2882, OR PIN, I1, I, n2629 PIN, I2, I, n2634 PIN, O, O, n2635 END SYM, U2884, OR PIN, I1, I, address_generator/int_addr30<11>, , TS185, TS89, TS88 PIN, I2, I, bootstrap/rd_sel, , INV PIN, O, O, n2632 END SYM, U2885, OR PIN, I1, I, address_generator/int_addr30<3>, , TS458, TS457, TS124, TS123, TS81 PIN, I2, I, bootstrap/rd_sel PIN, O, O, n2631 END SYM, U2886, AND PIN, I1, I, n2632 PIN, I2, I, n2631 PIN, I3, I, bootstrap/tx/int_busy137 PIN, O, O, n2634 END SYM, U2889, NOR PIN, I1, I, bootstrap/tx/sreg_Q150<4>, , INV PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, O, n2637 END SYM, synthesizer_interface/synth/shift_reg_reg<23>, DFF, BLKNM=U1930 PIN, D, I, n3110, , TS365, TS364 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<16> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1381 END SYM, antenna_interface/ant/shift_reg_reg<3>, DFF, BLKNM=U1844 PIN, D, I, n2351, , TS363, TS362 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<3> END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<1>, DFF, BLKNM=U1886 PIN, D, I, n3668 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<1> END SYM, fan_interface/pwm/shift_reg_reg<6>, DFF, BLKNM=U1782 PIN, D, I, n2999, , TS361, TS360 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1376 END SYM, U3580, NAND PIN, I1, I, n3239 PIN, I2, I, n3238 PIN, O, O, n1950 END SYM, U3582, OR PIN, I1, I, n1953 PIN, I2, I, n2116 PIN, I3, I, n1952 PIN, O, O, n3240 END SYM, U3583, AND PIN, I1, I, n303, , INV PIN, I2, I, n3240 PIN, O, O, n2223 END SYM, U3584, NAND PIN, I1, I, n1799 PIN, I2, I, rcp_sts2_rd PIN, O, O, n3243 END SYM, U3585, NAND PIN, I1, I, rcp_iic_rd<6> PIN, I2, I, n1921 PIN, O, O, n3242 END SYM, U3586, NAND PIN, I1, I, n3243 PIN, I2, I, n3242 PIN, O, O, n1952 END SYM, U3587, NAND PIN, I1, I, n2181 PIN, I2, I, rcp_audio_rd<6> PIN, O, O, n3245 END SYM, U3588, NAND PIN, I1, I, rcp_sts1_rd PIN, I2, I, n1875 PIN, O, O, n3244 END SYM, U3589, NAND PIN, I1, I, n3245 PIN, I2, I, n3244 PIN, O, O, n1953 END SYM, U3740, NAND PIN, I1, I, rcp_sts1_rd PIN, I2, I, n1875 PIN, O, O, n3377 END SYM, U3741, NAND PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, n1921 PIN, O, O, n3376 END SYM, U3742, NAND PIN, I1, I, n3377 PIN, I2, I, n3376 PIN, O, O, n2262 END SYM, U3743, NAND PIN, I1, I, rcp_sts1_rd PIN, I2, I, n1875 PIN, O, O, n3379 END SYM, U3744, NAND PIN, I1, I, rcp_rcv_rd<9> PIN, I2, I, n2111 PIN, O, O, n3378 END SYM, U3745, NAND PIN, I1, I, n3379 PIN, I2, I, n3378 PIN, O, O, n2264 END SYM, U3747, NOR PIN, I1, I, rcp_addr_tri/y12<4> PIN, I2, I, rcp_addr_tri/y12<2> PIN, I3, I, rcp_addr_tri/y12<1> PIN, I4, I, rcp_addr_tri/y12<3>, , INV PIN, O, O, n2111 END SYM, U3748, NAND PIN, I1, I, n2180 PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<10> PIN, O, O, n3382 END SYM, U3749, NAND PIN, I1, I, rcp_iic_rd<9> PIN, I2, I, n1921 PIN, O, O, n3381 END SYM, synthesizer_interface/synth/cycle_reg<2>, DFF, BLKNM=U1804 PIN, D, I, n2920 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n338<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/cycle<2> END SYM, U3901, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<11>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3511 END SYM, U3902, OR PIN, I1, I, n3511 PIN, I2, I, n1906 PIN, O, O, n3516 END SYM, U3905, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<10>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3514 END SYM, U3906, OR PIN, I1, I, n3514 PIN, I2, I, n2056 PIN, O, O, n3515 END SYM, U3908, NAND PIN, I1, I, antenna_interface/ant/clock<7> PIN, I2, I, n1907 PIN, O, O, n3517 END SYM, synthesizer_interface/synth/ser_enbl_reg<1>, DFF, BLKNM=U1974 PIN, D, I, n2506, , TS359, TS358, TS357, TS356 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n318<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1379 END SYM, rtc_divide/clock_reg<8>, DFF, BLKNM=U1754 PIN, D, I, n3431 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rtc_divide/clock<8> END SYM, audio_interface/aud/comm_sreg_reg<2>, DFF, BLKNM=U1848 PIN, D, I, n2335, , TS355, TS354 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n423<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/comm_sreg_Q421<2> END SYM, U4219, OR PIN, I1, I, bootstrap/tx/baud<2> PIN, I2, I, bootstrap/tx/baud<0> PIN, I3, I, bootstrap/tx/baud<3> PIN, I4, I, bootstrap/tx/baud<1> PIN, O, O, n1994 END SYM, U4218, OR PIN, I1, I, bootstrap/tx/baud<9> PIN, I2, I, bootstrap/tx/baud<8> PIN, I3, I, bootstrap/tx/baud<7> PIN, I4, I, bootstrap/tx/baud<6> PIN, O, O, n2159 END SYM, U4217, NAND PIN, I1, I, bootstrap/tx/baud<10> PIN, I2, I, bootstrap/tx/baud<5>, , INV PIN, I3, I, bootstrap/tx/baud<4> PIN, I4, I, n1994, , INV PIN, O, O, n2160 END SYM, bootstrap/tx/int_busy_reg, DFF, BLKNM=U1611 PIN, D, I, bootstrap/tx/int_busy137 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n142 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx_busy END SYM, U4214, OR PIN, I1, I, bootstrap/rx/sreg274<4> PIN, I2, I, bootstrap/incr_en48 PIN, I3, I, bootstrap/rx/sreg274<5> PIN, I4, I, bootstrap/rx/sreg274<6> PIN, O, O, n1954 END SYM, U4213, OR PIN, I1, I, antenna_interface/ant/cycle<3> PIN, I2, I, antenna_interface/ant/cycle<1> PIN, I3, I, antenna_interface/ant/cycle<0> PIN, I4, I, antenna_interface/ant/cycle<2> PIN, O, O, n1805 END SYM, U4212, INV PIN, I, I, bootstrap/wr_control/n114 PIN, O, O, antenna_interface/ant/n388 END SYM, U4210, NOR PIN, I1, I, audio_interface/aud/clock<3>, , INV PIN, I2, I, audio_interface/aud/clock<0> PIN, I3, I, audio_interface/aud/clock<1> PIN, O, O, n2021 END SYM, U4058, NAND PIN, I1, I, tod_receiver/tod_receiver/n217<0>, , INV PIN, I2, I, tod_receiver/tod_receiver/active PIN, O, O, tod_receiver/tod_receiver/n207<3> END SYM, U4056, NAND PIN, I1, I, n3648 PIN, I2, I, n3647 PIN, O, O, n2191 END SYM, U4055, NAND PIN, I1, I, address_generator/int_addr30<9>, , TS336, TS335, TS325 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n3647 END SYM, U4054, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<8>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n3648 END SYM, U4052, NAND PIN, I1, I, n3645 PIN, I2, I, n3644 PIN, O, O, n2190 END SYM, U4051, NAND PIN, I1, I, n1381 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n3644 END SYM, U4050, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<22>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n3645 END SYM, U2580, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<21>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2391 END SYM, U2581, NAND PIN, I1, I, synthesizer_interface/synth/shift_reg<22> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2390 END SYM, U2582, NAND PIN, I1, I, n2391 PIN, I2, I, n2390 PIN, O, O, n2221 END SYM, U2584, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<20>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2394 END SYM, U2585, NAND PIN, I1, I, synthesizer_interface/synth/shift_reg<21> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2393 END SYM, tod_receiver/tod_receiver/shift_reg_reg<5>, DFF, BLKNM=U1683 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<6> END SYM, U2586, NAND PIN, I1, I, n2394 PIN, I2, I, n2393 PIN, O, O, n2124 END SYM, U2588, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<3>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2397 END SYM, U2589, NAND PIN, I1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2396 END SYM, iic_bus_interface/iic/cycle_reg<2>, DFF, BLKNM=U1936 PIN, D, I, n3098 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n489<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/cycle<2> END SYM, U2741, OR PIN, I1, I, bootstrap/tx/int_busy137, , INV PIN, I2, I, n2520 PIN, O, O, n2521 END SYM, U2743, OR PIN, I1, I, bootstrap/rd_sel PIN, I2, I, address_generator/int_addr30<7>, , TS224 PIN, O, O, n2518 END SYM, U2744, NAND PIN, I1, I, address_generator/int_addr30<15>, , INV, TS353, TS95, TS94 PIN, I2, I, bootstrap/rd_sel PIN, O, O, n2517 END SYM, U2745, AND PIN, I1, I, n2518 PIN, I2, I, n2517 PIN, I3, I, bootstrap/tx/int_busy137 PIN, O, O, n2520 END SYM, U2748, NOR PIN, I1, I, bootstrap/tx/sreg_Q150<8>, , INV PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, O, n2523 END SYM, U2749, OR PIN, I1, I, n2523 PIN, I2, I, n2528 PIN, O, O, n2529 END SYM, U2900, OR PIN, I1, I, address_generator/int_addr30<9>, , TS336, TS335, TS325 PIN, I2, I, bootstrap/rd_sel, , INV PIN, O, O, n2648 END SYM, U2901, OR PIN, I1, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I2, I, bootstrap/rd_sel PIN, O, O, n2647 END SYM, U2902, AND PIN, I1, I, n2648 PIN, I2, I, n2647 PIN, I3, I, bootstrap/tx/int_busy137 PIN, O, O, n2650 END SYM, U2904, XOR PIN, I1, I, iic_bus_interface/iic/clock<6> PIN, I2, I, n2073 PIN, O, O, n2652 END SYM, U2905, AND PIN, I1, I, n2070 PIN, I2, I, n2652 PIN, O, O, n2653 END SYM, U2906, AND PIN, I1, I, iic_bus_interface/iic/clock<3> PIN, I2, I, iic_bus_interface/iic/clock<4> PIN, I3, I, iic_bus_interface/iic/clock<5> PIN, I4, I, n2087 PIN, O, O, n2073 END SYM, U2907, XOR PIN, I1, I, iic_bus_interface/iic/clock<3> PIN, I2, I, n2087 PIN, O, O, n2654 END SYM, U2908, AND PIN, I1, I, n2070 PIN, I2, I, n2654 PIN, O, O, n2655 END SYM, U2909, AND PIN, I1, I, iic_bus_interface/iic/clock<2> PIN, I2, I, iic_bus_interface/iic/clock<1> PIN, I3, I, iic_bus_interface/iic/clock<0> PIN, O, O, n2087 END SYM, iic_bus_interface/iic/clock_reg<2>, DFF, BLKNM=U1920 PIN, D, I, n3285 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/clock<2> END SYM, U3280, AND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<16> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n2969 END SYM, U3282, NAND PIN, I1, I, rcp_iic_rd<6> PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2973 END SYM, audio_interface/aud/clock_reg<4>, DFF, BLKNM=U1888 PIN, D, I, n3661 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/clock<4> END SYM, U3283, NAND PIN, I1, I, address_generator/int_addr30<7>, , TS224 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, n2972 END SYM, U3284, NAND PIN, I1, I, n2973 PIN, I2, I, n2972 PIN, O, O, n2294 END SYM, U3286, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<17> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n2976 END SYM, U3287, NAND PIN, I1, I, address_generator/int_addr30<0>, , TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, I2, I, fan_interface/load PIN, O, O, n2975 END SYM, U3288, NAND PIN, I1, I, n2976 PIN, I2, I, n2975 PIN, O, O, n2977 END SYM, U3442, NOR PIN, I1, I, address_generator/int_addr30<7>, , INV, TS224 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3109 END SYM, U3443, OR PIN, I1, I, n3109 PIN, I2, I, n2190 PIN, O, O, n3110 END SYM, U3445, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<1> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n3113 END SYM, U3446, NAND PIN, I1, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I2, I, fan_interface/load PIN, O, O, n3112 END SYM, U3447, NAND PIN, I1, I, n3113 PIN, I2, I, n3112 PIN, O, O, n3118 END SYM, U3449, NAND PIN, I1, I, n1377 PIN, I2, I, fan_interface/load, , INV PIN, O, O, n3116 END SYM, synthesizer_interface/synth/shift_reg_reg<1>, DFF, BLKNM=U1619 PIN, D, I, synthesizer_interface/synth/shift_reg342<1>, , TS352, TS351 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<1> END SYM, U3600, NAND PIN, I1, I, synthesizer_interface/synth/clock<0> PIN, I2, I, n3253 PIN, O, O, n3255 END SYM, U3601, OR PIN, I1, I, synthesizer_interface/synth/clock<0> PIN, I2, I, synthesizer_interface/synth/clock<1> PIN, O, O, n3254 END SYM, U3602, OR PIN, I1, I, n2027, , INV PIN, I2, I, synthesizer_interface/synth/clock<1> PIN, O, O, n3253 END SYM, U3603, AND PIN, I1, I, n3255 PIN, I2, I, n3254 PIN, I3, I, rcp_sts2_rd PIN, O, O, n3258 END SYM, U3604, NAND PIN, I1, I, rcp_rcv_rd<10> PIN, I2, I, n2111 PIN, O, O, n3257 END SYM, U3605, NAND PIN, I1, I, n2180 PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<11> PIN, O, O, n3256 END SYM, U3606, AND PIN, I1, I, n3257 PIN, I2, I, n3256 PIN, O, O, n2110 END SYM, U3608, NAND PIN, I1, I, bootstrap/rx/baud16<5> PIN, I2, I, n2227 PIN, O, O, n3259 END SYM, audio_interface/aud/data_sreg_reg<3>, DFF, BLKNM=U1858 PIN, D, I, n3864, , TS350, TS349 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n413<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_audio_rd<3> END SYM, tod_receiver/tod_receiver/dinv_reg, DFF, BLKNM=U1621 PIN, D, I, tod_receiver/tod_receiver/active174 PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n188 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_sts2_rd END SYM, bootstrap/wr_source/r20/q_reg<0>, DFF, BLKNM=U1623 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r20/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<0> END SYM, bootstrap/wr_source/r23/q_reg<3>, DFF, BLKNM=U1685 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r23/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<15> END SYM, receiver_interface/dac/shift_reg_reg<7>, DFF, BLKNM=U1814 PIN, D, I, n2718, , TS348, TS347 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_rcv_rd<5> END SYM, bootstrap/wr_source/r00/q_reg<3>, DFF, BLKNM=U1729 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r00/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<3> END SYM, bootstrap/dma_cnt/iq_reg<10>, DFF, BLKNM=U2032 PIN, D, I, n3031 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<10> END SYM, U4519, IBUF PIN, I, I, fill_data PIN, O, O, rcp_fill_rd END SYM, U4514, IBUF PIN, I, I, ext_tod_in PIN, O, O, tod_receiver/tod_receiver/manchester_decoder/sdai_1238 END SYM, U4512, IBUF PIN, I, I, ext_bs_dati PIN, O, O, bootstrap/rx/sreg274<7> END SYM, synthesizer_interface/synth/clock_reg<0>, DFF, BLKNM=U1976 PIN, D, I, n2502 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/clock<0> END SYM, U4358, NAND PIN, I1, I, n3860 PIN, I2, I, n3859 PIN, O, O, n3865 END SYM, U4357, NAND PIN, I1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n3859 END SYM, U4356, NAND PIN, I1, I, rcp_audio_rd<3> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n3860 END SYM, U4354, AND PIN, I1, I, iic_bus_interface/iic/cycle<1> PIN, I2, I, iic_bus_interface/iic/cycle<2>, , INV PIN, I3, I, iic_bus_interface/iic/cycle<0> PIN, O, O, n1989 END SYM, U4352, NAND PIN, I1, I, rcp_rcv_rd<10> PIN, I2, I, n3856 PIN, O, O, receiver_interface/dac/n281 END SYM, U4351, NAND PIN, I1, I, n1934 PIN, I2, I, receiver_interface/dac/ser_clk258 PIN, O, O, n3856 END SYM, U4350, AND PIN, I1, I, n1869 PIN, I2, I, n3855 PIN, O, O, n1841 END SYM, receiver_interface/dac/ser_ld_n_reg, DFF, BLKNM=U1736 PIN, D, I, n3708 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n281 PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, n1372 END SYM, bootstrap/wr_source/r22/q_reg<0>, DFF, BLKNM=U1625 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r22/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<8> END SYM, bootstrap/wr_source/r21/q_reg<3>, DFF, BLKNM=U1627 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r21/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<7> END SYM, U4199, OR PIN, I1, I, n2055 PIN, I2, I, n2129 PIN, O, O, n3767 END SYM, U4198, AND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<6> PIN, I2, I, n1949 PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<5> PIN, O, O, n2178 END SYM, U4197, AND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<7> PIN, I2, I, n2178 PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<8> PIN, O, O, n2013 END SYM, U4196, AND PIN, I1, I, bs_addr<7> PIN, I2, I, n2208 PIN, I3, I, bs_addr<6> PIN, O, O, n2054 END SYM, U4195, AND PIN, I1, I, bs_addr<8> PIN, I2, I, n2054 PIN, I3, I, bs_addr<9> PIN, O, O, n2052 END SYM, U4194, AND PIN, I1, I, bootstrap/tx/n133<3>, , INV PIN, I2, I, n3763 PIN, O, O, n3765 END SYM, U4193, XOR PIN, I1, I, bootstrap/tx/baud<5> PIN, I2, I, n1919 PIN, O, O, n3763 END SYM, U4191, AND PIN, I1, I, bootstrap/tx/n133<3>, , INV PIN, I2, I, n3761 PIN, O, O, n3766 END SYM, U4190, XOR PIN, I1, I, n2184 PIN, I2, I, bootstrap/tx/baud<3> PIN, O, O, n3761 END SYM, bootstrap/dma_cnt/iq_reg<0>, DFF, BLKNM=U2026 PIN, D, I, n3167 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<0> END SYM, U3890, OR PIN, I1, I, n3498 PIN, I2, I, n2060 PIN, O, O, n3499 END SYM, U3893, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<13>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3503 END SYM, U3894, OR PIN, I1, I, n3503 PIN, I2, I, n2057 PIN, O, O, n3508 END SYM, U3897, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<12>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3506 END SYM, U3898, OR PIN, I1, I, n3506 PIN, I2, I, n2058 PIN, O, O, n3507 END SYM, bootstrap/wr_source/r02/q_reg<3>, DFF, BLKNM=U1631 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r02/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<11> END SYM, bootstrap/rd_control/tx_strt_reg, DFF, BLKNM=U1962 PIN, D, I, n2622 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/int_busy137 END SYM, U2601, NAND PIN, I1, I, bootstrap/rx/cycle246<0> PIN, I2, I, bootstrap/rx/cycle<1> PIN, O, O, n2407 END SYM, U2602, NAND PIN, I1, I, n2258 PIN, I2, I, bootstrap/rx/cycle<1>, , INV PIN, O, O, n2406 END SYM, U2603, NAND PIN, I1, I, n2407 PIN, I2, I, n2406 PIN, O, O, n2408 END SYM, U2604, AND PIN, I1, I, bootstrap/rx/busy PIN, I2, I, bootstrap/rx/cycle<0> PIN, O, O, n2258 END SYM, U2605, AND PIN, I1, I, antenna_interface/ant/clock<3> PIN, I2, I, n1916 PIN, I3, I, antenna_interface/ant/clock<4> PIN, O, O, n1913 END SYM, U2606, AND PIN, I1, I, antenna_interface/ant/clock<1> PIN, I2, I, antenna_interface/ant/clock<0> PIN, I3, I, antenna_interface/ant/clock<2> PIN, O, O, n1916 END SYM, U2608, NOR PIN, I1, I, n1959, , INV PIN, I2, I, n1934 PIN, O, O, n2410 END SYM, U2609, OR PIN, I1, I, n2410 PIN, I2, I, receiver_interface/dac/busy285 PIN, O, O, receiver_interface/dac/n300<0> END SYM, fan_interface/pwm/clock_reg<1>, DFF, BLKNM=U1874 PIN, D, I, n3752 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/clock<1> END SYM, bootstrap/tx/sreg_reg<3>, DFF, BLKNM=U2056 PIN, D, I, n2643, , TS346, TS345, TS344, TS343 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n152<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/sreg_Q150<3> END SYM, U3141, NAND PIN, I1, I, n2234 PIN, I2, I, n1958, , INV PIN, O, O, n2856 END SYM, U3142, NAND PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, n2856 PIN, O, O, iic_bus_interface/iic/n489<3> END SYM, bootstrap/rx/baud16_reg<5>, DFF, BLKNM=U1513 PIN, D, I, n2669 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/baud16<5> END SYM, U3145, AND PIN, I1, I, iic_bus_interface/iic/clock<0> PIN, I2, I, iic_bus_interface/iic/clock<1> PIN, I3, I, iic_bus_interface/iic/clock<4>, , INV PIN, I4, I, iic_bus_interface/iic/clock<3>, , INV PIN, O, O, n2234 END SYM, U3147, OR PIN, I1, I, n2199 PIN, I2, I, receiver_interface/dac/clock<2>, , INV PIN, O, O, n2861 END SYM, U3148, NAND PIN, I1, I, n2169 PIN, I2, I, receiver_interface/dac/clock<2>, , INV PIN, O, O, n2860 END SYM, U3149, NAND PIN, I1, I, n2861 PIN, I2, I, n2860 PIN, O, O, n2863 END SYM, U3300, NAND PIN, I1, I, address_generator/int_addr30<7>, , TS224 PIN, I2, I, fan_interface/load PIN, O, O, n2988 END SYM, fan_interface/pwm/shift_reg_reg<12>, DFF, BLKNM=U1774 PIN, D, I, n3133, , TS342, TS341 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1375 END SYM, U3301, NAND PIN, I1, I, n2989 PIN, I2, I, n2988 PIN, O, O, n2295 END SYM, U3302, XOR PIN, I1, I, iic_bus_interface/iic/cycle<0> PIN, I2, I, iic_bus_interface/iic/cycle<1> PIN, O, O, n2990 END SYM, U3303, AND PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, n2990 PIN, O, O, n2991 END SYM, U3305, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<5> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n2994 END SYM, U3306, NAND PIN, I1, I, address_generator/int_addr30<6>, , TS191 PIN, I2, I, fan_interface/load PIN, O, O, n2993 END SYM, U3307, NAND PIN, I1, I, n2994 PIN, I2, I, n2993 PIN, O, O, n2999 END SYM, U3309, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<4> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n2997 END SYM, tod_receiver/tod_receiver/manchester_decoder/stb_reg, DFF, BLKNM=U1820 PIN, D, I, n2590 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/n217<0> END SYM, U2890, OR PIN, I1, I, n2637 PIN, I2, I, n2642 PIN, O, O, n2643 END SYM, U2892, OR PIN, I1, I, address_generator/int_addr30<10>, , TS131 PIN, I2, I, bootstrap/rd_sel, , INV PIN, O, O, n2640 END SYM, U2893, OR PIN, I1, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I2, I, bootstrap/rd_sel PIN, O, O, n2639 END SYM, U2894, AND PIN, I1, I, n2640 PIN, I2, I, n2639 PIN, I3, I, bootstrap/tx/int_busy137 PIN, O, O, n2642 END SYM, U2897, NOR PIN, I1, I, bootstrap/tx/sreg_Q150<3>, , INV PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, O, n2645 END SYM, U2898, OR PIN, I1, I, n2645 PIN, I2, I, n2650 PIN, O, O, n2651 END SYM, antenna_interface/ant/shift_reg_reg<4>, DFF, BLKNM=U1842 PIN, D, I, n2358, , TS340, TS339 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<4> END SYM, bootstrap/rd_control/cycle_reg<3>, DFF, BLKNM=U2156 PIN, D, I, n3338 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rd_control/n125<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rd_sel END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<0>, DFF, BLKNM=U1987 PIN, D, I, n2404 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<0> END SYM, bootstrap/rx/div16_reg<0>, DFF, BLKNM=U1653 PIN, D, I, n2752 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n242<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/div16<0> END SYM, fan_interface/pwm/shift_reg_reg<5>, DFF, BLKNM=U1782 PIN, D, I, n2998, , TS338, TS337 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<5> END SYM, iic_bus_interface/iic/stop_cycle_reg, DFF, BLKNM=U1633 PIN, D, I, address_generator/int_addr30<9>, , TS336, TS335, TS325 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/busy427 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/stop_cycle END SYM, U3590, NAND PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<7> PIN, I2, I, n2180 PIN, O, O, n3247 END SYM, U3591, NAND PIN, I1, I, rcp_rcv_rd<6> PIN, I2, I, n2111 PIN, O, O, n3246 END SYM, U3592, NAND PIN, I1, I, n3247 PIN, I2, I, n3246 PIN, O, O, n2116 END SYM, U3593, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<6> PIN, O, O, n3249 END SYM, U3594, NAND PIN, I1, I, bootstrap/wr_source/r_mid<6> PIN, I2, I, n2089 PIN, O, O, n3248 END SYM, U3595, NAND PIN, I1, I, n3249 PIN, I2, I, n3248 PIN, O, O, n2224 END SYM, U3596, NAND PIN, I1, I, n2181 PIN, I2, I, rcp_audio_rd<7> PIN, O, O, n3251 END SYM, U3597, NAND PIN, I1, I, rcp_iic_rd<7> PIN, I2, I, n1921 PIN, O, O, n3250 END SYM, U3598, NAND PIN, I1, I, n3251 PIN, I2, I, n3250 PIN, O, O, n2117 END SYM, antenna_interface/ant/clock_reg<8>, DFF, BLKNM=U1890 PIN, D, I, n3524 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/ser_clk234 END SYM, U3750, NAND PIN, I1, I, n3382 PIN, I2, I, n3381 PIN, O, O, n1920 END SYM, U3753, AND PIN, I1, I, rcp_addr_tri/y12<3> PIN, I2, I, rcp_addr_tri/y12<1> PIN, I3, I, rcp_addr_tri/y12<2>, , INV PIN, I4, I, rcp_addr_tri/y12<4>, , INV PIN, O, O, n1921 END SYM, U3755, AND PIN, I1, I, bootstrap/rx_data<0> PIN, I2, I, bootstrap/rx/sreg274<0>, , INV PIN, I3, I, n303 PIN, O, O, n2089 END SYM, U3758, NOR PIN, I1, I, address_generator/int_addr30<4>, , INV, TS98, TS29, TS28 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3388 END SYM, U3759, OR PIN, I1, I, n3388 PIN, I2, I, n2061 PIN, O, O, n2287 END SYM, synthesizer_interface/synth/cycle_reg<1>, DFF, BLKNM=U1792 PIN, D, I, n2810 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n338<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/cycle<1> END SYM, U3910, AND PIN, I1, I, antenna_interface/ant/n268<4>, , INV PIN, I2, I, n3518 PIN, O, O, n3524 END SYM, U3912, NAND PIN, I1, I, rtc_divide/clock<8> PIN, I2, I, n2076 PIN, O, O, n3520 END SYM, U3914, AND PIN, I1, I, rtc_divide/clk111, , INV PIN, I2, I, n3521 PIN, O, O, n3523 END SYM, U3915, XOR PIN, I1, I, n3527 PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<11> PIN, O, O, n3525 END SYM, U3916, AND PIN, I1, I, n2246 PIN, I2, I, n3525 PIN, O, O, n3528 END SYM, U3917, AND PIN, I1, I, n2013 PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<9> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<10> PIN, O, O, n3527 END SYM, U3919, AND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/edge_n PIN, I2, I, n2290, , INV PIN, O, O, n2246 END SYM, synthesizer_interface/synth/ser_enbl_reg<2>, DFF, BLKNM=U1976 PIN, D, I, n2503, , TS334, TS333, TS332, TS331 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n318<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1378 END SYM, rtc_divide/clock_reg<9>, DFF, BLKNM=U1890 PIN, D, I, n3523 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rtc_divide/clock<9> END SYM, audio_interface/aud/comm_sreg_reg<1>, DFF, BLKNM=U1850 PIN, D, I, n3899, , TS330, TS329 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n423<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/comm_sreg_Q421<1> END SYM, U4208, AND PIN, I1, I, n2021 PIN, I2, I, audio_interface/aud/clock<4>, , INV PIN, I3, I, audio_interface/aud/clock<2> PIN, O, O, n1825 END SYM, U4206, AND PIN, I1, I, bootstrap/rx/cycle<0> PIN, I2, I, bootstrap/rx/cycle<3> PIN, I3, I, bootstrap/rx/cycle<2>, , INV PIN, I4, I, bootstrap/rx/cycle<1>, , INV PIN, O, O, n2148 END SYM, U4203, AND PIN, I1, I, n2149 PIN, I2, I, n2148, , INV PIN, I3, I, bootstrap/wr_control/n114 PIN, O, O, bootstrap/rx/n278<0> END SYM, U4201, AND PIN, I1, I, bootstrap/rx/sreg274<0> PIN, I2, I, bootstrap/rx_data<0> PIN, O, O, n2129 END SYM, U4200, AND PIN, I1, I, n303 PIN, I2, I, n3767 PIN, O, O, n2210 END SYM, U3000, NAND PIN, I1, I, n2731 PIN, I2, I, n2730 PIN, O, O, n2737 END SYM, U3002, NAND PIN, I1, I, rcp_rcv_rd<0> PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, n2734 END SYM, U3003, NAND PIN, I1, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I2, I, receiver_interface/dac/busy285 PIN, O, O, n2733 END SYM, U3004, NAND PIN, I1, I, n2734 PIN, I2, I, n2733 PIN, O, O, n2736 END SYM, U3006, NAND PIN, I1, I, rcp_sts1_rd PIN, I2, I, n1875 PIN, O, O, n2739 END SYM, U3007, NAND PIN, I1, I, rcp_iic_rd<0> PIN, I2, I, n1921 PIN, O, O, n2738 END SYM, U3008, NAND PIN, I1, I, n2739 PIN, I2, I, n2738 PIN, O, O, n1939 END SYM, U3009, NAND PIN, I1, I, n1799 PIN, I2, I, rcp_sts2_rd PIN, O, O, n2741 END SYM, U4048, NAND PIN, I1, I, n3642 PIN, I2, I, n3641 PIN, O, O, n2189 END SYM, U4047, NAND PIN, I1, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n3641 END SYM, U4046, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<0>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n3642 END SYM, U4044, NAND PIN, I1, I, synthesizer_interface/synth/int_busy303, , INV PIN, I2, I, rcp_sts2_rd PIN, O, O, synthesizer_interface/synth/n318<0> END SYM, U4042, NAND PIN, I1, I, n1959, , INV PIN, I2, I, rcp_rcv_rd<10> PIN, O, O, receiver_interface/dac/n310<3> END SYM, U4040, INV PIN, I, I, audio_interface/aud/clock<4> PIN, O, O, n3637 END SYM, synthesizer_interface/sync_low/ale_latch_reg, DFF, BLKNM=U1719 PIN, D, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/sync_low/n72 END SYM, U2590, NAND PIN, I1, I, n2397 PIN, I2, I, n2396 PIN, O, O, n2125 END SYM, U2592, NAND PIN, I1, I, bootstrap/tx/cycle127<0> PIN, I2, I, bootstrap/tx/cycle<1> PIN, O, O, n2400 END SYM, U2593, NAND PIN, I1, I, n1911 PIN, I2, I, bootstrap/tx/cycle<1>, , INV PIN, O, O, n2399 END SYM, U2594, NAND PIN, I1, I, n2400 PIN, I2, I, n2399 PIN, O, O, n2401 END SYM, tod_receiver/tod_receiver/shift_reg_reg<4>, DFF, BLKNM=U1639 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<5> END SYM, U2595, AND PIN, I1, I, bootstrap/tx_busy PIN, I2, I, bootstrap/tx/cycle<0> PIN, O, O, n1911 END SYM, U2597, NOR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/edge_n, , INV PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<0> PIN, I3, I, n2290 PIN, O, O, n2404 END SYM, U2599, NOR PIN, I1, I, n1905 PIN, I2, I, n1904 PIN, I3, I, n1903 PIN, I4, I, n1948, , INV PIN, O, O, n2290 END SYM, iic_bus_interface/iic/cycle_reg<3>, DFF, BLKNM=U1914 PIN, D, I, n3407 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n489<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/cycle<3> END SYM, U2751, OR PIN, I1, I, bootstrap/rd_sel PIN, I2, I, address_generator/int_addr30<6>, , TS191 PIN, O, O, n2526 END SYM, U2752, NAND PIN, I1, I, address_generator/int_addr30<14>, , INV, TS312 PIN, I2, I, bootstrap/rd_sel PIN, O, O, n2525 END SYM, U2753, AND PIN, I1, I, n2526 PIN, I2, I, n2525 PIN, I3, I, bootstrap/tx/int_busy137 PIN, O, O, n2528 END SYM, tod_receiver/tod_receiver/manchester_decoder/sel_fall_reg, DFF, BLKNM=U1643 PIN, D, I, tod_receiver/tod_receiver/manchester_decoder/sdai_2247 PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/manchester_decoder/n215 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<0> END SYM, U2756, XOR PIN, I1, I, rtc_divide/clock<6> PIN, I2, I, n2225 PIN, O, O, n2530 END SYM, U2757, AND PIN, I1, I, rtc_divide/clk111, , INV PIN, I2, I, n2530 PIN, O, O, n2534 END SYM, synthesizer_interface/synth/shift_reg_reg<10>, DFF, BLKNM=U1892 PIN, D, I, n3515, , TS327, TS326 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<10> END SYM, U2911, AND PIN, I1, I, bootstrap/rx/busy PIN, I2, I, bootstrap/rx/cycle<0>, , INV PIN, O, O, bootstrap/rx/cycle246<0> END SYM, U2913, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<7> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n2659 END SYM, U2914, NAND PIN, I1, I, address_generator/int_addr30<8>, , TS261 PIN, I2, I, fan_interface/load PIN, O, O, n2658 END SYM, U2915, NAND PIN, I1, I, n2659 PIN, I2, I, n2658 PIN, O, O, n2660 END SYM, U2916, AND PIN, I1, I, n2148 PIN, I2, I, n2149 PIN, O, O, n2661 END SYM, U2917, AND PIN, I1, I, bootstrap/rx/div16<2> PIN, I2, I, bootstrap/rx/div16<3> PIN, I3, I, n2168 PIN, I4, I, n2167 PIN, O, O, n2149 END SYM, U2919, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<13>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2664 END SYM, iic_bus_interface/iic/clock_reg<1>, DFF, BLKNM=U1920 PIN, D, I, n3284 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/clock<1> END SYM, audio_interface/sync/ale_select_reg, DFF, BLKNM=U1966 PIN, D, I, n2617, , TS324, TS323, TS322, TS321, TS320, TS319, TS318, TS317, TS316, TS315, TS314, TS313 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/sync/n72 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/sync/ale_select END SYM, U3290, NAND PIN, I1, I, n337 PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2980 END SYM, U3291, NAND PIN, I1, I, address_generator/int_addr30<9>, , TS336, TS335, TS325 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, n2979 END SYM, U3292, NAND PIN, I1, I, n2980 PIN, I2, I, n2979 PIN, O, O, n2986 END SYM, U3294, NAND PIN, I1, I, rcp_iic_rd<7> PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2983 END SYM, U3295, OR PIN, I1, I, address_generator/int_addr30<8>, , TS261 PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2982 END SYM, U3296, NAND PIN, I1, I, n2983 PIN, I2, I, n2982 PIN, O, O, n2985 END SYM, U3299, NAND PIN, I1, I, n1376 PIN, I2, I, fan_interface/load, , INV PIN, O, O, n2989 END SYM, U3450, NAND PIN, I1, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I2, I, fan_interface/load PIN, O, O, n3115 END SYM, U3451, NAND PIN, I1, I, n3116 PIN, I2, I, n3115 PIN, O, O, n3117 END SYM, U3453, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<14> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n3121 END SYM, U3454, NAND PIN, I1, I, address_generator/int_addr30<15>, , TS353, TS95, TS94 PIN, I2, I, fan_interface/load PIN, O, O, n3120 END SYM, U3455, NAND PIN, I1, I, n3121 PIN, I2, I, n3120 PIN, O, O, n3126 END SYM, U3457, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<13> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n3124 END SYM, U3458, NAND PIN, I1, I, address_generator/int_addr30<14>, , TS312 PIN, I2, I, fan_interface/load PIN, O, O, n3123 END SYM, U3459, NAND PIN, I1, I, n3124 PIN, I2, I, n3123 PIN, O, O, n3125 END SYM, synthesizer_interface/synth/shift_reg_reg<0>, DFF, BLKNM=U1647 PIN, D, I, address_generator/int_addr30<0>, , TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<0> END SYM, U3610, AND PIN, I1, I, n2167, , INV PIN, I2, I, n3260 PIN, O, O, n3266 END SYM, U3612, NAND PIN, I1, I, synthesizer_interface/synth/clock<0> PIN, I2, I, synthesizer_interface/synth/clock<1> PIN, O, O, n3262 END SYM, U3614, AND PIN, I1, I, synthesizer_interface/synth/n338<4>, , INV PIN, I2, I, n3263 PIN, O, O, n3265 END SYM, U3616, XOR PIN, I1, I, rtc_divide/clock<4> PIN, I2, I, n2226 PIN, O, O, n3267 END SYM, U3617, AND PIN, I1, I, rtc_divide/clk111, , INV PIN, I2, I, n3267 PIN, O, O, n3273 END SYM, U3619, NAND PIN, I1, I, rtc_divide/clock<4> PIN, I2, I, n2226 PIN, O, O, n3269 END SYM, audio_interface/aud/data_sreg_reg<4>, DFF, BLKNM=U1858 PIN, D, I, n3865, , TS309, TS308 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n413<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_audio_rd<4> END SYM, bootstrap/wr_source/r20/q_reg<1>, DFF, BLKNM=U1649 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r20/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<1> END SYM, bootstrap/wr_source/r23/q_reg<2>, DFF, BLKNM=U1685 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r23/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<14> END SYM, iic_bus_interface/iic/shift_reg_reg<9>, DFF, BLKNM=U1800 PIN, D, I, n2936, , TS307, TS306 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n461<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_iic_rd<6> END SYM, receiver_interface/dac/shift_reg_reg<6>, DFF, BLKNM=U1816 PIN, D, I, n2710, , TS305, TS304 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_rcv_rd<4> END SYM, fill_output/sync/ale_select_reg, DFF, BLKNM=U1956 PIN, D, I, n2769, , TS303, TS302, TS301, TS300, TS299, TS298, TS297, TS296, TS295, TS294, TS293, TS292 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fill_output/sync/n72 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fill_output/sync/ale_select END SYM, bootstrap/dma_cnt/iq_reg<11>, DFF, BLKNM=U1910 PIN, D, I, n3418 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<11> END SYM, U4509, IBUF PIN, I, I, rcp_1553_csi_n PIN, O, O, memory_interface/dff139 END SYM, U4507, IBUF PIN, I, I, rcp_hlda PIN, O, O, n303 END SYM, bootstrap/decode/ext_reg<1>, DFF, BLKNM=U1948 PIN, D, I, n2958 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/decode/n701<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/decode/address<5> END SYM, U4349, NAND PIN, I1, I, bs_addr<1> PIN, I2, I, bs_addr<0> PIN, O, O, n3854 END SYM, U4348, NAND PIN, I1, I, n2165 PIN, I2, I, n3854 PIN, O, O, n3855 END SYM, U4347, NAND PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, n3853 PIN, O, O, n2197 END SYM, U4346, NAND PIN, I1, I, iic_bus_interface/iic/cycle<0> PIN, I2, I, iic_bus_interface/iic/cycle<1> PIN, O, O, n3853 END SYM, U4345, AND PIN, I1, I, bootstrap/rd_control/cyc_rst_n PIN, I2, I, n3851 PIN, O, O, n3852 END SYM, U4344, AND PIN, I1, I, bootstrap/rd_control/cycle<0> PIN, I2, I, bootstrap/rd_control/cycle<1> PIN, O, O, n3850 END SYM, U4343, XOR PIN, I1, I, bootstrap/rd_control/cycle<2> PIN, I2, I, n3850 PIN, O, O, n3851 END SYM, U4342, NAND PIN, I1, I, n3849 PIN, I2, I, n3848 PIN, O, O, n2298 END SYM, U4341, NAND PIN, I1, I, address_generator/int_addr30<7>, , TS224 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n3848 END SYM, U4340, NAND PIN, I1, I, rcp_audio_rd<6> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n3849 END SYM, bootstrap/wr_source/r22/q_reg<1>, DFF, BLKNM=U1691 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r22/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<9> END SYM, bootstrap/wr_source/r21/q_reg<2>, DFF, BLKNM=U1505 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r21/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<6> END SYM, U4188, AND PIN, I1, I, bootstrap/tx/n133<3>, , INV PIN, I2, I, n3757 PIN, O, O, n3759 END SYM, U4186, NAND PIN, I1, I, bootstrap/tx/baud<9> PIN, I2, I, n1838 PIN, O, O, n3756 END SYM, U4184, AND PIN, I1, I, bootstrap/tx/n133<3>, , INV PIN, I2, I, n3754 PIN, O, O, n3760 END SYM, U4182, NAND PIN, I1, I, bootstrap/tx/baud<6> PIN, I2, I, n1839 PIN, O, O, n3753 END SYM, U4180, AND PIN, I1, I, n2100, , INV PIN, I2, I, n3749 PIN, O, O, n3751 END SYM, tod_receiver/sync/ale_latch_reg, DFF, BLKNM=U1691 PIN, D, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/sync/n72 END SYM, U2454, NAND PIN, I1, I, n1889, , INV PIN, I2, I, n2165 PIN, O, O, n2300 END SYM, U2455, AND PIN, I1, I, n2194 PIN, I2, I, n2300 PIN, O, O, n2193 END SYM, U2456, NOR PIN, I1, I, n2212 PIN, I2, I, n2213 PIN, I3, I, n1864 PIN, I4, I, n1866 PIN, O, O, n2194 END SYM, U2458, NAND PIN, I1, I, bootstrap/rx/sreg274<5> PIN, I2, I, bootstrap/decode/n701<0> PIN, O, O, n2302 END SYM, U2459, NAND PIN, I1, I, n2302 PIN, I2, I, bootstrap/decode/int_active686, , INV PIN, O, O, bootstrap/decode/n691 END SYM, U2612, AND PIN, I1, I, receiver_interface/dac/clock<1> PIN, I2, I, receiver_interface/dac/clock<2> PIN, I3, I, receiver_interface/dac/clock<3>, , INV PIN, I4, I, receiver_interface/dac/clock<0>, , INV PIN, O, O, n1959 END SYM, U2614, NAND PIN, I1, I, bootstrap/wr_source/r_hih<7> PIN, I2, I, n1874 PIN, O, O, n2414 END SYM, U2615, NAND PIN, I1, I, n2414 PIN, I2, I, n2417, , INV PIN, O, O, rcp_ad_tri/y12<7> END SYM, antenna_interface/ant/int_busy_reg, DFF, BLKNM=U1507 PIN, D, I, antenna_interface/ant/int_busy243 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n248 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/int_busy END SYM, U2616, NOR PIN, I1, I, n303 PIN, I2, I, n2415 PIN, O, O, n2416 END SYM, U2617, NOR PIN, I1, I, n2117 PIN, I2, I, n2118 PIN, O, O, n2415 END SYM, U2618, OR PIN, I1, I, n2416 PIN, I2, I, n2119 PIN, O, O, n2417 END SYM, fan_interface/pwm/clock_reg<2>, DFF, BLKNM=U1746 PIN, D, I, n3632 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/clock<2> END SYM, bootstrap/tx/sreg_reg<4>, DFF, BLKNM=U2058 PIN, D, I, n2635, , TS290, TS289, TS288, TS287 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n152<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/sreg_Q150<4> END SYM, U3151, AND PIN, I1, I, rcp_rcv_rd<10> PIN, I2, I, receiver_interface/dac/clock<1> PIN, I3, I, receiver_interface/dac/clock<0> PIN, I4, I, receiver_interface/dac/ser_clk258, , INV PIN, O, O, n2169 END SYM, bootstrap/rx/baud16_reg<4>, DFF, BLKNM=U1756 PIN, D, I, n3427 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/baud16<4> END SYM, U3152, OR PIN, I1, I, n2167 PIN, I2, I, bootstrap/rx/baud16<0> PIN, O, O, n2864 END SYM, U3153, AND PIN, I1, I, bootstrap/rx/baud16<1> PIN, I2, I, n2864 PIN, O, O, n1938 END SYM, U3155, NOR PIN, I1, I, bootstrap/rx/baud16<4> PIN, I2, I, bootstrap/rx/baud16<5> PIN, I3, I, n1933 PIN, I4, I, bootstrap/rx/baud16<6>, , INV PIN, O, O, n2167 END SYM, U3157, NAND PIN, I1, I, audio_interface/aud/comm_sreg_Q421<4> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n2868 END SYM, U3158, NAND PIN, I1, I, address_generator/int_addr30<13>, , TS246 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n2867 END SYM, U3159, NAND PIN, I1, I, n2868 PIN, I2, I, n2867 PIN, O, O, n2284 END SYM, receiver_interface/sync/ale_latch_reg, DFF, BLKNM=U1723 PIN, D, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/sync/n72 END SYM, external_port/sync/wr_n_latch_reg, DFF, BLKNM=U1725 PIN, D, I, antenna_interface/sync/wr_n_latch76, , TS439, TS416, TS389, TS285, TS227, TS203, TS169, TS59, TS52, TS51, TS30 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, external_port/sync/wr_n_latch END SYM, U3310, NAND PIN, I1, I, address_generator/int_addr30<5>, , TS134, TS26, TS25 PIN, I2, I, fan_interface/load PIN, O, O, n2996 END SYM, fan_interface/pwm/shift_reg_reg<13>, DFF, BLKNM=U1774 PIN, D, I, n3134, , TS284, TS283 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<13> END SYM, U3311, NAND PIN, I1, I, n2997 PIN, I2, I, n2996 PIN, O, O, n2998 END SYM, U3313, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<3> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n3002 END SYM, U3314, NAND PIN, I1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I2, I, fan_interface/load PIN, O, O, n3001 END SYM, U3315, NAND PIN, I1, I, n3002 PIN, I2, I, n3001 PIN, O, O, n3007 END SYM, U3317, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<2> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n3005 END SYM, U3318, NAND PIN, I1, I, address_generator/int_addr30<3>, , TS458, TS457, TS124, TS123, TS81 PIN, I2, I, fan_interface/load PIN, O, O, n3004 END SYM, U3319, NAND PIN, I1, I, n3005 PIN, I2, I, n3004 PIN, O, O, n3006 END SYM, receiver_interface/dac/clock_reg<0>, DFF, BLKNM=U1862 PIN, D, I, receiver_interface/dac/clock314<0> PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/dac/clock<0> END SYM, antenna_interface/ant/shift_reg_reg<5>, DFF, BLKNM=U1846 PIN, D, I, n2343, , TS282, TS281 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<5> END SYM, bootstrap/rd_control/cycle_reg<2>, DFF, BLKNM=U1555 PIN, D, I, n3852 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rd_control/n125<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rd_control/cycle<2> END SYM, bootstrap/rx/div16_reg<1>, DFF, BLKNM=U1918 PIN, D, I, n3391 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n242<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/div16<1> END SYM, fan_interface/pwm/shift_reg_reg<4>, DFF, BLKNM=U1780 PIN, D, I, n3007, , TS280, TS279 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<4> END SYM, tod_receiver/sync/ale_select_reg, DFF, BLKNM=U1952 PIN, D, I, internal_port/sync/ale_select67, , TS430, TS429, TS428, TS427, TS426, TS425, TS424, TS423, TS422, TS421, TS420, TS419, TS278, TS277, TS276, TS275, TS274, TS273, TS272, TS271, TS270, TS269, TS268, TS267 PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/sync/n72 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/sync/ale_select END SYM, iic_bus_interface/sync/ale_latch_reg, DFF, BLKNM=U1725 PIN, D, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/sync/n72 END SYM, tod_receiver/tod_receiver/manchester_decoder/sdai_2_reg, DFF, BLKNM=U1693 PIN, D, I, tod_receiver/tod_receiver/manchester_decoder/sdai_2247 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/sdai_2 END SYM, antenna_interface/ant/clock_reg<7>, DFF, BLKNM=U2040 PIN, D, I, n2849 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/clock<7> END SYM, U3761, XOR PIN, I1, I, bootstrap/rx/div16<0> PIN, I2, I, bootstrap/rx/div16<1> PIN, O, O, n3390 END SYM, U3762, AND PIN, I1, I, n3390 PIN, I2, I, n2149, , INV PIN, I3, I, bootstrap/rx/busy PIN, O, O, n3391 END SYM, U3764, XOR PIN, I1, I, antenna_interface/ant/clock<3> PIN, I2, I, n1916 PIN, O, O, n3392 END SYM, U3765, AND PIN, I1, I, antenna_interface/ant/n268<4>, , INV PIN, I2, I, n3392 PIN, O, O, n3398 END SYM, U3767, NAND PIN, I1, I, antenna_interface/ant/clock<5> PIN, I2, I, n1913 PIN, O, O, n3394 END SYM, U3769, AND PIN, I1, I, antenna_interface/ant/n268<4>, , INV PIN, I2, I, n3395 PIN, O, O, n3397 END SYM, synthesizer_interface/synth/cycle_reg<0>, DFF, BLKNM=U1804 PIN, D, I, n2919 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n338<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/cycle<0> END SYM, U3921, NAND PIN, I1, I, rcp_audio_rd<8> PIN, I2, I, n1877 PIN, O, O, n3530 END SYM, U3922, NAND PIN, I1, I, n3530 PIN, I2, I, n3534, , INV PIN, O, O, n3535 END SYM, U3924, NAND PIN, I1, I, n1878 PIN, I2, I, audio_interface/aud/cycle<4> PIN, O, O, n3531 END SYM, U3925, AND PIN, I1, I, n2136, , INV PIN, I2, I, n3531 PIN, O, O, n3534 END SYM, U3927, AND PIN, I1, I, audio_interface/aud/cycle<4> PIN, I2, I, audio_interface/aud/cycle<3>, , INV PIN, O, O, n1877 END SYM, U3929, XOR PIN, I1, I, bootstrap/tx/baud<8> PIN, I2, I, n3539 PIN, O, O, n3536 END SYM, audio_interface/aud/comm_sreg_reg<0>, DFF, BLKNM=U1641 PIN, D, I, n2955, , TS265, TS264 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n423<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/comm_sreg_Q421<0> END SYM, U3010, NAND PIN, I1, I, n1833 PIN, I2, I, n1408 PIN, O, O, n2740 END SYM, U3011, NAND PIN, I1, I, n2741 PIN, I2, I, n2740 PIN, O, O, n2112 END SYM, U3012, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<0> PIN, O, O, n2743 END SYM, U3013, NAND PIN, I1, I, bootstrap/wr_source/r_mid<0> PIN, I2, I, n2089 PIN, O, O, n2742 END SYM, U3014, NAND PIN, I1, I, n2743 PIN, I2, I, n2742 PIN, O, O, n2109 END SYM, U3016, OR PIN, I1, I, n2260 PIN, I2, I, n1984 PIN, I3, I, n2259 PIN, O, O, n2744 END SYM, U3017, AND PIN, I1, I, n303, , INV PIN, I2, I, n2744 PIN, O, O, n1908 END SYM, U3018, NAND PIN, I1, I, n1799 PIN, I2, I, rcp_sts2_rd PIN, O, O, n2747 END SYM, U3019, NAND PIN, I1, I, rcp_rcv_rd<1> PIN, I2, I, n2111 PIN, O, O, n2746 END SYM, U4039, INV PIN, I, I, fan_interface/pwm/clock<0> PIN, O, O, n3636 END SYM, U4038, AND PIN, I1, I, audio_interface/aud/clock<0> PIN, I2, I, audio_interface/aud/clock<1> PIN, O, O, n3633 END SYM, U4037, XOR PIN, I1, I, audio_interface/aud/clock<2> PIN, I2, I, n3633 PIN, O, O, n3634 END SYM, U4036, XOR PIN, I1, I, audio_interface/aud/clock<0> PIN, I2, I, audio_interface/aud/clock<1> PIN, O, O, n3635 END SYM, U4035, AND PIN, I1, I, fan_interface/pwm/clock<3> PIN, I2, I, fan_interface/pwm/clock<4> PIN, I3, I, n2010 PIN, O, O, n3630 END SYM, U4034, XOR PIN, I1, I, fan_interface/pwm/clock<5> PIN, I2, I, n3630 PIN, O, O, n3631 END SYM, U4033, AND PIN, I1, I, fan_interface/pwm/clock<0> PIN, I2, I, fan_interface/pwm/clock<1> PIN, O, O, n3629 END SYM, U4032, XOR PIN, I1, I, fan_interface/pwm/clock<2> PIN, I2, I, n3629 PIN, O, O, n3632 END SYM, U4031, AND PIN, I1, I, n2282 PIN, I2, I, fan_interface/pwm/clock<9> PIN, O, O, n3626 END SYM, U4030, XOR PIN, I1, I, fan_interface/pwm/clock<10> PIN, I2, I, n3626 PIN, O, O, n3627 END SYM, tod_receiver/tod_receiver/shift_reg_reg<3>, DFF, BLKNM=U1533 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<3> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<4> END SYM, U2760, AND PIN, I1, I, rtc_divide/clock<5> PIN, I2, I, rtc_divide/clock<6> PIN, I3, I, n1876, , INV PIN, I4, I, n2023, , INV PIN, O, O, rtc_divide/clk111 END SYM, U2762, NOR PIN, I1, I, bootstrap/tx/sreg_Q150<7>, , INV PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, O, n2536 END SYM, U2763, OR PIN, I1, I, n2536 PIN, I2, I, n2541 PIN, O, O, n2542 END SYM, U2765, OR PIN, I1, I, bootstrap/rd_sel PIN, I2, I, address_generator/int_addr30<5>, , TS134, TS26, TS25 PIN, O, O, n2539 END SYM, U2766, NAND PIN, I1, I, address_generator/int_addr30<13>, , INV, TS246 PIN, I2, I, bootstrap/rd_sel PIN, O, O, n2538 END SYM, U2767, AND PIN, I1, I, n2539 PIN, I2, I, n2538 PIN, I3, I, bootstrap/tx/int_busy137 PIN, O, O, n2541 END SYM, synthesizer_interface/synth/shift_reg_reg<11>, DFF, BLKNM=U1892 PIN, D, I, n3516, , TS263, TS262 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<11> END SYM, synthesizer_interface/sync_low/ale_select_reg, DFF, BLKNM=U1960 PIN, D, I, n2627, , TS260, TS259, TS258, TS257, TS256, TS255, TS254, TS253, TS252, TS251, TS250, TS249 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/sync_low/n72 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/sync_low/ale_select END SYM, U2920, NAND PIN, I1, I, address_generator/int_addr30<14>, , TS312 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2663 END SYM, U2921, NAND PIN, I1, I, n2664 PIN, I2, I, n2663 PIN, O, O, n2060 END SYM, U2922, XOR PIN, I1, I, bootstrap/rx/cycle<2> PIN, I2, I, n2665 PIN, O, O, n2666 END SYM, U2923, AND PIN, I1, I, bootstrap/rx/cycle<0> PIN, I2, I, bootstrap/rx/cycle<1> PIN, O, O, n2665 END SYM, U2924, AND PIN, I1, I, bootstrap/rx/busy PIN, I2, I, n2666 PIN, O, O, n2667 END SYM, U2925, XOR PIN, I1, I, bootstrap/rx/baud16<5> PIN, I2, I, n2668 PIN, O, O, n2669 END SYM, U2926, AND PIN, I1, I, bootstrap/rx/baud16<4> PIN, I2, I, n1890 PIN, O, O, n2668 END SYM, U2927, AND PIN, I1, I, bootstrap/rx/baud16<0> PIN, I2, I, bootstrap/rx/baud16<2> PIN, I3, I, bootstrap/rx/baud16<1> PIN, I4, I, bootstrap/rx/baud16<3> PIN, O, O, n1890 END SYM, U2929, NOR PIN, I1, I, n2215, , INV PIN, I2, I, n1807 PIN, O, O, n2671 END SYM, iic_bus_interface/iic/clock_reg<0>, DFF, BLKNM=U1997 PIN, D, I, n3924 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/clock<0> END SYM, antenna_interface/ant/shift_reg_reg<10>, DFF, BLKNM=U1836 PIN, D, I, n2458, , TS248, TS247 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<10> END SYM, U3461, NAND PIN, I1, I, n1375 PIN, I2, I, fan_interface/load, , INV PIN, O, O, n3129 END SYM, U3462, NAND PIN, I1, I, address_generator/int_addr30<13>, , TS246 PIN, I2, I, fan_interface/load PIN, O, O, n3128 END SYM, U3463, NAND PIN, I1, I, n3129 PIN, I2, I, n3128 PIN, O, O, n3134 END SYM, U3465, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<11> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n3132 END SYM, U3466, NAND PIN, I1, I, address_generator/int_addr30<12>, , TS219 PIN, I2, I, fan_interface/load PIN, O, O, n3131 END SYM, U3467, NAND PIN, I1, I, n3132 PIN, I2, I, n3131 PIN, O, O, n3133 END SYM, U3469, NAND PIN, I1, I, rcp_audio_rd<5> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n3137 END SYM, U3621, AND PIN, I1, I, rtc_divide/clk111, , INV PIN, I2, I, n3270 PIN, O, O, n3272 END SYM, U3622, XOR PIN, I1, I, iic_bus_interface/iic/clock<4> PIN, I2, I, n3274 PIN, O, O, n3275 END SYM, U3623, AND PIN, I1, I, iic_bus_interface/iic/clock<3> PIN, I2, I, n2087 PIN, O, O, n3274 END SYM, U3624, AND PIN, I1, I, n2070 PIN, I2, I, n3275 PIN, O, O, n3279 END SYM, U3625, XOR PIN, I1, I, iic_bus_interface/iic/clock<7> PIN, I2, I, n3276 PIN, O, O, n3277 END SYM, U3626, AND PIN, I1, I, iic_bus_interface/iic/clock<6> PIN, I2, I, n2073 PIN, O, O, n3276 END SYM, U3627, AND PIN, I1, I, n2070 PIN, I2, I, n3277 PIN, O, O, n3278 END SYM, U3628, XOR PIN, I1, I, iic_bus_interface/iic/clock<2> PIN, I2, I, n3280 PIN, O, O, n3281 END SYM, U3629, AND PIN, I1, I, iic_bus_interface/iic/clock<0> PIN, I2, I, iic_bus_interface/iic/clock<1> PIN, O, O, n3280 END SYM, audio_interface/aud/data_sreg_reg<5>, DFF, BLKNM=U1772 PIN, D, I, n3141, , TS245, TS244 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n413<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_audio_rd<5> END SYM, bootstrap/wr_source/r20/q_reg<2>, DFF, BLKNM=U1661 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r20/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<2> END SYM, bootstrap/wr_source/r23/q_reg<1>, DFF, BLKNM=U1535 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r23/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<13> END SYM, iic_bus_interface/iic/shift_reg_reg<8>, DFF, BLKNM=U1800 PIN, D, I, n2935, , TS243, TS242 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n461<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_iic_rd<5> END SYM, bootstrap/wr_control/cycle_reg<2>, DFF, BLKNM=U1579 PIN, D, I, n3717 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_control/cycle<2> END SYM, receiver_interface/dac/shift_reg_reg<5>, DFF, BLKNM=U1812 PIN, D, I, n2727, , TS241, TS240 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_rcv_rd<3> END SYM, bootstrap/dma_cnt/iq_reg<12>, DFF, BLKNM=U2034 PIN, D, I, n3021 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<12> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<12> END SYM, bootstrap/decode/ext_reg<0>, DFF, BLKNM=U2132 PIN, D, I, n3705 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/decode/n701<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/decode/address<4> END SYM, U4338, NAND PIN, I1, I, bootstrap/rd_control/cyc_rst_n PIN, I2, I, n3846 PIN, O, O, n2195 END SYM, U4337, NAND PIN, I1, I, bootstrap/rd_control/cycle<0> PIN, I2, I, bootstrap/rd_control/cycle<1> PIN, O, O, n3846 END SYM, U4336, AND PIN, I1, I, n1865 PIN, I2, I, n3845 PIN, O, O, n2035 END SYM, U4335, NAND PIN, I1, I, n2052, , INV PIN, I2, I, n2165 PIN, O, O, n3845 END SYM, U4333, NAND PIN, I1, I, bootstrap/tx_busy PIN, I2, I, n3843 PIN, O, O, n2032 END SYM, U4332, NAND PIN, I1, I, bootstrap/tx/cycle<0> PIN, I2, I, bootstrap/tx/cycle<1> PIN, O, O, n3843 END SYM, U4331, AND PIN, I1, I, bootstrap/rx/busy PIN, I2, I, n3842 PIN, O, O, n2030 END SYM, U4330, NAND PIN, I1, I, bootstrap/rx/cycle<0> PIN, I2, I, bootstrap/rx/cycle<1> PIN, O, O, n3842 END SYM, bootstrap/wr_source/r22/q_reg<2>, DFF, BLKNM=U1693 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r22/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<10> END SYM, tod_receiver/tod_receiver/cycle_reg<3>, DFF, BLKNM=U2198 PIN, D, I, n2676 PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n207<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/cycle<3> END SYM, bootstrap/wr_source/r21/q_reg<1>, DFF, BLKNM=U1537 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r21/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<5> END SYM, U4178, NAND PIN, I1, I, n2010 PIN, I2, I, fan_interface/pwm/clock<3> PIN, O, O, n3748 END SYM, U4176, AND PIN, I1, I, n2100, , INV PIN, I2, I, n3746 PIN, O, O, n3752 END SYM, U4175, XOR PIN, I1, I, fan_interface/pwm/clock<0> PIN, I2, I, fan_interface/pwm/clock<1> PIN, O, O, n3746 END SYM, U4173, AND PIN, I1, I, n2246 PIN, I2, I, n3743 PIN, O, O, n3744 END SYM, U4172, AND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<3> PIN, I2, I, n2253 PIN, O, O, n3742 END SYM, U4171, XOR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<4> PIN, I2, I, n3742 PIN, O, O, n3743 END SYM, U4170, AND PIN, I1, I, n2100, , INV PIN, I2, I, n3740 PIN, O, O, n3745 END SYM, U2460, AND PIN, I1, I, n2130 PIN, I2, I, bootstrap/n53 PIN, O, O, bootstrap/decode/n701<0> END SYM, U2462, NAND PIN, I1, I, n2170 PIN, I2, I, n1877 PIN, O, O, n2304 END SYM, U2463, NAND PIN, I1, I, n2304 PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, audio_interface/aud/n365 END SYM, U2466, AND PIN, I1, I, audio_interface/aud/cycle<0> PIN, I2, I, n1825 PIN, I3, I, audio_interface/aud/cycle<1>, , INV PIN, I4, I, audio_interface/aud/cycle<2>, , INV PIN, O, O, n2170 END SYM, U2468, NAND PIN, I1, I, n1871 PIN, I2, I, n2079 PIN, O, O, n2308 END SYM, U2469, NAND PIN, I1, I, n2308 PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, antenna_interface/ant/n248 END SYM, U2620, NAND PIN, I1, I, bootstrap/wr_source/r_hih<2> PIN, I2, I, n1874 PIN, O, O, n2419 END SYM, U2621, NAND PIN, I1, I, n2419 PIN, I2, I, n2422, , INV PIN, O, O, rcp_ad_tri/y12<2> END SYM, U2622, NOR PIN, I1, I, n303 PIN, I2, I, n2420 PIN, O, O, n2421 END SYM, U2623, NOR PIN, I1, I, n2062 PIN, I2, I, n2063 PIN, O, O, n2420 END SYM, U2624, OR PIN, I1, I, n2421 PIN, I2, I, n2064 PIN, O, O, n2422 END SYM, U2626, NAND PIN, I1, I, bootstrap/wr_source/r_hih<0> PIN, I2, I, n1874 PIN, O, O, n2424 END SYM, U2627, NAND PIN, I1, I, n2424 PIN, I2, I, n2427, , INV PIN, O, O, rcp_ad_tri/y12<0> END SYM, U2628, NOR PIN, I1, I, n303 PIN, I2, I, n2425 PIN, O, O, n2426 END SYM, U2629, NOR PIN, I1, I, n2107 PIN, I2, I, n2108 PIN, O, O, n2425 END SYM, fan_interface/pwm/clock_reg<3>, DFF, BLKNM=U1876 PIN, D, I, n3745 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/clock<3> END SYM, bootstrap/tx/sreg_reg<5>, DFF, BLKNM=U2060 PIN, D, I, n2550, , TS239, TS238, TS237, TS236 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n152<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/sreg_Q150<5> END SYM, U3161, NAND PIN, I1, I, n322 PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n2871 END SYM, bootstrap/rx/baud16_reg<3>, DFF, BLKNM=U1860 PIN, D, I, n3815 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/baud16<3> END SYM, U3162, NAND PIN, I1, I, address_generator/int_addr30<0>, , TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n2870 END SYM, U3163, NAND PIN, I1, I, n2871 PIN, I2, I, n2870 PIN, O, O, n2872 END SYM, U3165, NAND PIN, I1, I, bootstrap/wr_source/r_hih<9> PIN, I2, I, n1874 PIN, O, O, n2874 END SYM, U3166, NAND PIN, I1, I, n2874 PIN, I2, I, n2878, , INV PIN, O, O, rcp_ad_tri/y12<9> END SYM, U3167, NOR PIN, I1, I, n303 PIN, I2, I, n2875 PIN, O, O, n2876 END SYM, U3168, NOR PIN, I1, I, n2264 PIN, I2, I, n1920 PIN, O, O, n2875 END SYM, U3169, OR PIN, I1, I, n2876 PIN, I2, I, n1925 PIN, O, O, n2878 END SYM, fan_interface/pwm/shift_reg_reg<14>, DFF, BLKNM=U1776 PIN, D, I, n3125, , TS235, TS234 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<14> END SYM, U3321, XOR PIN, I1, I, antenna_interface/ant/clock<5> PIN, I2, I, n1913 PIN, O, O, n3008 END SYM, U3322, AND PIN, I1, I, antenna_interface/ant/n268<4>, , INV PIN, I2, I, n3008 PIN, O, O, n3011 END SYM, U3324, NAND PIN, I1, I, n1871, , INV PIN, I2, I, antenna_interface/ant/int_busy PIN, O, O, antenna_interface/ant/n268<4> END SYM, receiver_interface/dac/cycle_reg<3>, DFF, BLKNM=U2140 PIN, D, I, n3554 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n310<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/dac/cycle<3> END SYM, U3326, XOR PIN, I1, I, antenna_interface/ant/clock<4> PIN, I2, I, n2216 PIN, O, O, n3012 END SYM, U3327, AND PIN, I1, I, antenna_interface/ant/n268<4>, , INV PIN, I2, I, n3012 PIN, O, O, n3014 END SYM, U3328, AND PIN, I1, I, antenna_interface/ant/clock<3> PIN, I2, I, antenna_interface/ant/clock<2> PIN, I3, I, antenna_interface/ant/clock<1> PIN, I4, I, antenna_interface/ant/clock<0> PIN, O, O, n2216 END SYM, receiver_interface/dac/clock_reg<1>, DFF, BLKNM=U1802 PIN, D, I, n2927 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/dac/clock<1> END SYM, external_port/sync/ale_latch_reg, DFF, BLKNM=U1655 PIN, D, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, external_port/sync/n72 END SYM, antenna_interface/ant/shift_reg_reg<6>, DFF, BLKNM=U1844 PIN, D, I, n2350, , TS232, TS231 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<6> END SYM, audio_interface/sync/wren_reg, DFF, BLKNM=U1962 PIN, D, I, n2623, , TS230 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/busy360 END SYM, bootstrap/rd_control/cycle_reg<1>, DFF, BLKNM=U1503 PIN, D, I, n2297 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rd_control/n125<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rd_control/cycle<1> END SYM, bootstrap/rx/div16_reg<2>, DFF, BLKNM=U2046 PIN, D, I, n2826 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n242<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/div16<2> END SYM, fan_interface/pwm/shift_reg_reg<3>, DFF, BLKNM=U1780 PIN, D, I, n3006, , TS229, TS228 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<3> END SYM, U4470, IBUF PIN, I, I, rcp_a_bus<16> PIN, O, O, address_generator/int_addr30<16> END SYM, antenna_interface/ant/clock_reg<6>, DFF, BLKNM=U1916 PIN, D, I, n3397 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/clock<6> END SYM, U3771, OR PIN, I1, I, iic_bus_interface/iic/cycle<2>, , INV PIN, I2, I, n2248 PIN, O, O, n3402 END SYM, U3772, NAND PIN, I1, I, iic_bus_interface/iic/cycle<3> PIN, I2, I, n3400 PIN, O, O, n3401 END SYM, U3773, NAND PIN, I1, I, n2197 PIN, I2, I, n2248 PIN, O, O, n3400 END SYM, U3774, NAND PIN, I1, I, n3402 PIN, I2, I, n3401 PIN, O, O, n3407 END SYM, U3776, NAND PIN, I1, I, antenna_interface/ant/clock<1> PIN, I2, I, antenna_interface/ant/clock<0> PIN, O, O, n3403 END SYM, U3778, AND PIN, I1, I, antenna_interface/ant/n268<4>, , INV PIN, I2, I, n3404 PIN, O, O, n3406 END SYM, U3779, NAND PIN, I1, I, bootstrap/rx/sreg274<4> PIN, I2, I, n2211 PIN, O, O, n3409 END SYM, iic_bus_interface/iic/busy_reg, DFF, BLKNM=U1549 PIN, D, I, iic_bus_interface/iic/busy427 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n432 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_iic_rd<8> END SYM, U3930, AND PIN, I1, I, bootstrap/tx/n133<3>, , INV PIN, I2, I, n3536 PIN, O, O, n3540 END SYM, U3931, AND PIN, I1, I, bootstrap/tx/baud<7> PIN, I2, I, bootstrap/tx/baud<6> PIN, I3, I, bootstrap/tx/baud<5> PIN, I4, I, n1919 PIN, O, O, n3539 END SYM, U3932, OR PIN, I1, I, n2159 PIN, I2, I, n2160 PIN, O, O, n3538 END SYM, U3933, NAND PIN, I1, I, bootstrap/tx_busy PIN, I2, I, n3538 PIN, O, O, bootstrap/tx/n133<3> END SYM, U3934, OR PIN, I1, I, n3546 PIN, I2, I, n3545 PIN, O, O, n3547 END SYM, U3936, NAND PIN, I1, I, n2032 PIN, I2, I, n3542 PIN, O, O, n3543 END SYM, U3937, NAND PIN, I1, I, bootstrap/tx_busy PIN, I2, I, bootstrap/tx/cycle<2>, , INV PIN, O, O, n3542 END SYM, U3938, AND PIN, I1, I, bootstrap/tx/cycle<3> PIN, I2, I, n3543 PIN, O, O, n3546 END SYM, U3020, NAND PIN, I1, I, n2747 PIN, I2, I, n2746 PIN, O, O, n2259 END SYM, bootstrap/tx/baud_reg<0>, DFF, BLKNM=U1938 PIN, D, I, n3092 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/baud<0> END SYM, U3021, NAND PIN, I1, I, rcp_sts1_rd PIN, I2, I, n1875 PIN, O, O, n2749 END SYM, U3022, NAND PIN, I1, I, rcp_iic_rd<1> PIN, I2, I, n1921 PIN, O, O, n2748 END SYM, U3023, NAND PIN, I1, I, n2749 PIN, I2, I, n2748 PIN, O, O, n2260 END SYM, U3024, XOR PIN, I1, I, bootstrap/rd_control/cycle<0> PIN, I2, I, bootstrap/rd_control/cycle<1> PIN, O, O, n2750 END SYM, U3025, AND PIN, I1, I, bootstrap/rd_control/cyc_rst_n PIN, I2, I, n2750 PIN, O, O, n2297 END SYM, U3027, AND PIN, I1, I, bootstrap/rx/busy PIN, I2, I, bootstrap/rx/div16<0>, , INV PIN, O, O, n2752 END SYM, U3029, AND PIN, I1, I, bootstrap/rx/baud16<0> PIN, I2, I, bootstrap/rx/baud16<2> PIN, I3, I, bootstrap/rx/baud16<1> PIN, I4, I, bootstrap/rx/baud16<3>, , INV PIN, O, O, n1937 END SYM, U4029, AND PIN, I1, I, n2153 PIN, I2, I, fan_interface/pwm/clock<7> PIN, O, O, n3625 END SYM, U4028, XOR PIN, I1, I, fan_interface/pwm/clock<8> PIN, I2, I, n3625 PIN, O, O, n3628 END SYM, U4027, OR PIN, I1, I, n3622 PIN, I2, I, n2220 PIN, O, O, n3623 END SYM, U4026, NOR PIN, I1, I, address_generator/int_addr30<2>, , INV, TS58, TS57, TS46, TS3, TS2 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3622 END SYM, U4023, OR PIN, I1, I, n3619 PIN, I2, I, n2219 PIN, O, O, n3624 END SYM, U4022, NOR PIN, I1, I, address_generator/int_addr30<3>, , INV, TS458, TS457, TS124, TS123, TS81 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3619 END SYM, antenna_interface/sync/wr_n_latch_reg, DFF, BLKNM=U1734 PIN, D, I, antenna_interface/sync/wr_n_latch76, , TS439, TS416, TS389, TS285, TS227, TS203, TS169, TS59, TS52, TS51, TS30 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/sync/wr_n_latch END SYM, tod_receiver/tod_receiver/shift_reg_reg<2>, DFF, BLKNM=U1675 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<2> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<3> END SYM, U2770, NOR PIN, I1, I, bootstrap/tx/sreg_Q150<6>, , INV PIN, I2, I, bootstrap/tx/int_busy137 PIN, O, O, n2544 END SYM, U2771, OR PIN, I1, I, n2544 PIN, I2, I, n2549 PIN, O, O, n2550 END SYM, U2773, OR PIN, I1, I, address_generator/int_addr30<12>, , TS219 PIN, I2, I, bootstrap/rd_sel, , INV PIN, O, O, n2547 END SYM, U2774, OR PIN, I1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I2, I, bootstrap/rd_sel PIN, O, O, n2546 END SYM, U2775, AND PIN, I1, I, n2547 PIN, I2, I, n2546 PIN, I3, I, bootstrap/tx/int_busy137 PIN, O, O, n2549 END SYM, U2779, NOR PIN, I1, I, audio_interface/aud/clock<4>, , INV PIN, I2, I, audio_interface/aud/clock<2> PIN, I3, I, n2021, , INV PIN, O, O, n2553 END SYM, synthesizer_interface/synth/shift_reg_reg<12>, DFF, BLKNM=U1894 PIN, D, I, n3507, , TS226, TS225 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<12> END SYM, U2930, OR PIN, I1, I, n2671 PIN, I2, I, n1871 PIN, O, O, antenna_interface/ant/n239 END SYM, U2932, NOR PIN, I1, I, antenna_interface/ant/clock<7>, , INV PIN, I2, I, antenna_interface/ant/clock<4> PIN, I3, I, antenna_interface/ant/clock<5> PIN, O, O, n2215 END SYM, U2933, OR PIN, I1, I, tod_receiver/tod_receiver/cycle<3> PIN, I2, I, n2675 PIN, O, O, n2673 END SYM, U2934, AND PIN, I1, I, n2188 PIN, I2, I, n2673 PIN, O, O, n2676 END SYM, U2935, AND PIN, I1, I, tod_receiver/tod_receiver/cycle<2> PIN, I2, I, tod_receiver/tod_receiver/cycle<1> PIN, I3, I, tod_receiver/tod_receiver/cycle<0> PIN, O, O, n2675 END SYM, U2937, AND PIN, I1, I, tod_receiver/tod_receiver/active PIN, I2, I, tod_receiver/tod_receiver/stb192, , INV PIN, O, O, n2188 END SYM, U2938, OR PIN, I1, I, n2679 PIN, I2, I, n2680 PIN, O, O, n2677 END SYM, U2939, NAND PIN, I1, I, tod_receiver/tod_receiver/active174 PIN, I2, I, n2677 PIN, O, O, tod_receiver/tod_receiver/n188 END SYM, receiver_interface/dac/shift_reg_reg<10>, DFF, BLKNM=U1810 PIN, D, I, n2737, , TS223, TS222 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_rcv_rd<8> END SYM, antenna_interface/ant/shift_reg_reg<11>, DFF, BLKNM=U1629 PIN, D, I, n3235, , TS221, TS220 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<11> END SYM, internal_port/sync/wren_reg, DFF, BLKNM=U1954 PIN, D, I, n2772, , TS218 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, internal_port/n89 END SYM, bootstrap/wr_source/r03/q_reg<3>, DFF, BLKNM=U1527 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r03/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<15> END SYM, U3470, NAND PIN, I1, I, address_generator/int_addr30<6>, , TS191 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n3136 END SYM, U3471, NAND PIN, I1, I, n3137 PIN, I2, I, n3136 PIN, O, O, n3142 END SYM, U3473, NAND PIN, I1, I, rcp_audio_rd<4> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n3140 END SYM, U3474, NAND PIN, I1, I, address_generator/int_addr30<5>, , TS134, TS26, TS25 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n3139 END SYM, U3475, NAND PIN, I1, I, n3140 PIN, I2, I, n3139 PIN, O, O, n3141 END SYM, U3477, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<10> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n3145 END SYM, U3478, NAND PIN, I1, I, address_generator/int_addr30<11>, , TS185, TS89, TS88 PIN, I2, I, fan_interface/load PIN, O, O, n3144 END SYM, U3479, NAND PIN, I1, I, n3145 PIN, I2, I, n3144 PIN, O, O, n3150 END SYM, U3630, AND PIN, I1, I, n2070 PIN, I2, I, n3281 PIN, O, O, n3285 END SYM, U3632, XOR PIN, I1, I, iic_bus_interface/iic/clock<0> PIN, I2, I, iic_bus_interface/iic/clock<1> PIN, O, O, n3283 END SYM, U3633, AND PIN, I1, I, n3283 PIN, I2, I, n1872, , INV PIN, I3, I, rcp_iic_rd<8> PIN, O, O, n3284 END SYM, U3634, XOR PIN, I1, I, bootstrap/wr_control/cycle<0> PIN, I2, I, bootstrap/wr_control/cycle<1> PIN, O, O, n3286 END SYM, U3635, AND PIN, I1, I, bootstrap/wr_control/cycle_rst_n PIN, I2, I, n3286 PIN, O, O, n3289 END SYM, U3637, AND PIN, I1, I, bootstrap/wr_control/cycle_rst_n PIN, I2, I, bootstrap/wr_control/cycle<0>, , INV PIN, O, O, n3288 END SYM, U3638, XOR PIN, I1, I, n3290 PIN, I2, I, bootstrap/rx/div16<3> PIN, O, O, n3291 END SYM, U3639, NAND PIN, I1, I, bootstrap/rx/div16<2> PIN, I2, I, n2168 PIN, O, O, n3290 END SYM, audio_interface/aud/data_sreg_reg<6>, DFF, BLKNM=U1772 PIN, D, I, n3142, , TS217, TS216 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n413<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_audio_rd<6> END SYM, bootstrap/wr_source/r20/q_reg<3>, DFF, BLKNM=U1661 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r20/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<3> END SYM, bootstrap/wr_source/r23/q_reg<0>, DFF, BLKNM=U1541 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r23/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<12> END SYM, iic_bus_interface/iic/shift_reg_reg<7>, DFF, BLKNM=U1798 PIN, D, I, n2789, , TS215, TS214 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n461<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_iic_rd<4> END SYM, fill_output/fill_req_reg, DFF, BLKNM=U1543 PIN, D, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fill_output/n124 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1407 END SYM, bootstrap/wr_control/cycle_reg<1>, DFF, BLKNM=U1768 PIN, D, I, n3289 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_control/cycle<1> END SYM, receiver_interface/dac/shift_reg_reg<4>, DFF, BLKNM=U1814 PIN, D, I, n2719, , TS211, TS210 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_rcv_rd<2> END SYM, receiver_interface/dac/ser_clk_reg, DFF, BLKNM=U2190 PIN, D, I, receiver_interface/dac/ser_clk258 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n263 PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, n1373 END SYM, bootstrap/wr_source/r01/q_reg<3>, DFF, BLKNM=U1545 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r01/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<7> END SYM, bootstrap/dma_cnt/iq_reg<13>, DFF, BLKNM=U1589 PIN, D, I, n2288 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<12> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<13> END SYM, U4328, OR PIN, I1, I, rtc_divide/clock<2> PIN, I2, I, rtc_divide/clock<0> PIN, I3, I, rtc_divide/clock<3> PIN, I4, I, rtc_divide/clock<1> PIN, O, O, n2023 END SYM, U4327, NAND PIN, I1, I, rtc_divide/clock<9> PIN, I2, I, rtc_divide/clock<8>, , INV PIN, I3, I, rtc_divide/clock<4> PIN, I4, I, rtc_divide/clock<7>, , INV PIN, O, O, n1876 END SYM, U4324, OR PIN, I1, I, bootstrap/rx/baud16<1> PIN, I2, I, bootstrap/rx/baud16<2> PIN, I3, I, bootstrap/rx/baud16<0> PIN, I4, I, bootstrap/rx/baud16<3> PIN, O, O, n1933 END SYM, U4323, NAND PIN, I1, I, iic_bus_interface/iic/clock<7> PIN, I2, I, iic_bus_interface/iic/clock<5>, , INV PIN, I3, I, iic_bus_interface/iic/clock<2> PIN, I4, I, iic_bus_interface/iic/clock<6> PIN, O, O, n2072 END SYM, U4321, NAND PIN, I1, I, bootstrap/decode/address<4> PIN, I2, I, bootstrap/rx/sreg274<2>, , INV PIN, I3, I, bootstrap/rx/sreg274<1> PIN, I4, I, bootstrap/decode/address<5> PIN, O, O, n2222 END SYM, bootstrap/wr_source/r22/q_reg<3>, DFF, BLKNM=U1547 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r22/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<11> END SYM, bootstrap/wr_source/r21/q_reg<0>, DFF, BLKNM=U1551 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r21/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_hih<4> END SYM, tod_receiver/tod_receiver/cycle_reg<2>, DFF, BLKNM=U1820 PIN, D, I, n2589 PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n207<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/cycle<2> END SYM, U4169, XOR PIN, I1, I, n2010 PIN, I2, I, fan_interface/pwm/clock<3> PIN, O, O, n3740 END SYM, U4167, AND PIN, I1, I, n2246 PIN, I2, I, n3737 PIN, O, O, n3738 END SYM, U4166, AND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<7> PIN, I2, I, n2178 PIN, O, O, n3736 END SYM, U4165, XOR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<8> PIN, I2, I, n3736 PIN, O, O, n3737 END SYM, U4164, AND PIN, I1, I, n2246 PIN, I2, I, n3735 PIN, O, O, n3739 END SYM, U4163, AND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<5> PIN, I2, I, n1949 PIN, O, O, n3734 END SYM, U4162, XOR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<6> PIN, I2, I, n3734 PIN, O, O, n3735 END SYM, U4161, NOR PIN, I1, I, synthesizer_interface/synth/n348<0> PIN, I2, I, n3733 PIN, O, O, synthesizer_interface/synth/n348<16> END SYM, U4160, NOR PIN, I1, I, synthesizer_interface/synth/clock<0>, , INV PIN, I2, I, n2027 PIN, O, O, n3732 END SYM, U2471, AND PIN, I1, I, antenna_interface/ant/ser_clk234 PIN, I2, I, n2215 PIN, I3, I, n2216 PIN, I4, I, antenna_interface/ant/clock<6>, , INV PIN, O, O, n1871 END SYM, U2472, AND PIN, I1, I, rtc_divide/clock<4> PIN, I2, I, n2226 PIN, I3, I, rtc_divide/clock<5> PIN, O, O, n2225 END SYM, U2473, AND PIN, I1, I, rtc_divide/clock<3> PIN, I2, I, rtc_divide/clock<0> PIN, I3, I, rtc_divide/clock<2> PIN, I4, I, rtc_divide/clock<1> PIN, O, O, n2226 END SYM, U2475, NAND PIN, I1, I, synthesizer_interface/synth/cycle<2> PIN, I2, I, synthesizer_interface/synth/cycle<3>, , INV PIN, I3, I, synthesizer_interface/synth/cycle<4> PIN, I4, I, n2025 PIN, O, O, n2024 END SYM, U2478, NAND PIN, I1, I, synthesizer_interface/synth/clock<4> PIN, I2, I, synthesizer_interface/synth/clock<1> PIN, I3, I, synthesizer_interface/synth/clock<3>, , INV PIN, I4, I, synthesizer_interface/synth/clock<2>, , INV PIN, O, O, n2027 END SYM, U2630, OR PIN, I1, I, n2426 PIN, I2, I, n2109 PIN, O, O, n2427 END SYM, U2632, AND PIN, I1, I, bootstrap/decode/address<5> PIN, I2, I, n1940 PIN, I3, I, n1941 PIN, I4, I, bootstrap/decode/address<4>, , INV PIN, O, O, bootstrap/wr_source/r22/n51<0> END SYM, U2634, AND PIN, I1, I, bootstrap/decode/address<4> PIN, I2, I, n1940 PIN, I3, I, n2113 PIN, I4, I, bootstrap/decode/address<5>, , INV PIN, O, O, bootstrap/wr_source/r11/n51<0> END SYM, U2636, AND PIN, I1, I, bootstrap/decode/address<4> PIN, I2, I, n1940 PIN, I3, I, n2055 PIN, I4, I, bootstrap/decode/address<5>, , INV PIN, O, O, bootstrap/wr_source/r10/n51<0> END SYM, U2638, AND PIN, I1, I, bootstrap/decode/address<5> PIN, I2, I, n1940 PIN, I3, I, n2113 PIN, I4, I, bootstrap/decode/address<4>, , INV PIN, O, O, bootstrap/wr_source/r21/n51<0> END SYM, fan_interface/pwm/clock_reg<4>, DFF, BLKNM=U1874 PIN, D, I, n3751 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/clock<4> END SYM, bootstrap/tx/sreg_reg<6>, DFF, BLKNM=U2062 PIN, D, I, n2542, , TS209, TS208, TS207, TS206 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n152<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/sreg_Q150<6> END SYM, iic_bus_interface/iic/shift_reg_reg<10>, DFF, BLKNM=U1521 PIN, D, I, n2294, , TS205, TS204 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n461<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_iic_rd<7> END SYM, fan_interface/sync/wr_n_latch_reg, DFF, BLKNM=U1657 PIN, D, I, antenna_interface/sync/wr_n_latch76, , TS439, TS416, TS389, TS285, TS227, TS203, TS169, TS59, TS52, TS51, TS30 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/sync/wr_n_latch END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<13>, DFF, BLKNM=U1888 PIN, D, I, n3662 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<13> END SYM, U3171, AND PIN, I1, I, bootstrap/rx/sreg274<0> PIN, I2, I, bootstrap/rx_data<0>, , INV PIN, I3, I, n303 PIN, O, O, n1874 END SYM, U3172, OR PIN, I1, I, n2884 PIN, I2, I, n2883 PIN, O, O, rcp_ad_tri/y12<8> END SYM, bootstrap/rx/baud16_reg<2>, DFF, BLKNM=U1651 PIN, D, I, n2759 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/baud16<2> END SYM, U3173, NAND PIN, I1, I, bootstrap/wr_source/r_hih<8> PIN, I2, I, n1874 PIN, O, O, n2880 END SYM, U3174, OR PIN, I1, I, n303 PIN, I2, I, n2263 PIN, O, O, n2879 END SYM, U3175, NAND PIN, I1, I, n2880 PIN, I2, I, n2879 PIN, O, O, n2884 END SYM, U3176, NAND PIN, I1, I, bootstrap/wr_source/r_low<8> PIN, I2, I, n2210 PIN, O, O, n2882 END SYM, U3177, NAND PIN, I1, I, bootstrap/wr_source/r_mid<8> PIN, I2, I, n2089 PIN, O, O, n2881 END SYM, U3178, NAND PIN, I1, I, n2882 PIN, I2, I, n2881 PIN, O, O, n2883 END SYM, U3179, OR PIN, I1, I, n2890 PIN, I2, I, n2889 PIN, O, O, rcp_ad_tri/y12<5> END SYM, external_port/rcp_reg1_reg, DFF, BLKNM=U1663 PIN, D, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, C, I, n278, , INV, TS0 PIN, CE, I, external_port/n89 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1401 END SYM, U3330, NAND PIN, I1, I, bootstrap/incr_en48 PIN, I2, I, n2211 PIN, O, O, n3016 END SYM, fan_interface/pwm/shift_reg_reg<15>, DFF, BLKNM=U1776 PIN, D, I, n3126, , TS200, TS199 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<15> END SYM, U3331, NAND PIN, I1, I, n3016 PIN, I2, I, n3020, , INV PIN, O, O, n3021 END SYM, U3333, NAND PIN, I1, I, n1889 PIN, I2, I, n2165 PIN, I3, I, bs_addr<12>, , INV PIN, O, O, n3019 END SYM, U3334, OR PIN, I1, I, n2193 PIN, I2, I, bs_addr<12>, , INV PIN, O, O, n3018 END SYM, U3335, NAND PIN, I1, I, n3019 PIN, I2, I, n3018 PIN, O, O, n3020 END SYM, receiver_interface/dac/cycle_reg<2>, DFF, BLKNM=U1806 PIN, D, I, n2914 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n310<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/dac/cycle<2> END SYM, U3337, NAND PIN, I1, I, bootstrap/rx/sreg274<5> PIN, I2, I, n1866 PIN, O, O, n3023 END SYM, U3338, NAND PIN, I1, I, n3023 PIN, I2, I, n3030, , INV PIN, O, O, n3031 END SYM, receiver_interface/dac/clock_reg<2>, DFF, BLKNM=U1505 PIN, D, I, n2863 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/dac/clock<2> END SYM, antenna_interface/ant/shift_reg_reg<7>, DFF, BLKNM=U1629 PIN, D, I, n2285, , TS198, TS197 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<7> END SYM, bootstrap/rx/sreg_reg<0>, DFF, BLKNM=U1705 PIN, D, I, bootstrap/rx/sreg274<0> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n278<0> PIN, Q, O, bootstrap/rx_data<0> END SYM, bootstrap/rd_control/cycle_reg<0>, DFF, BLKNM=U1555 PIN, D, I, bootstrap/rd_control/cycle119<0> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rd_control/n125<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rd_control/cycle<0> END SYM, bootstrap/rx/div16_reg<3>, DFF, BLKNM=U1653 PIN, D, I, n2283 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n242<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/div16<3> END SYM, fan_interface/pwm/shift_reg_reg<2>, DFF, BLKNM=U1778 PIN, D, I, n3118, , TS196, TS195 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<2> END SYM, external_port/sync/wren_reg, DFF, BLKNM=U1533 PIN, D, I, n2436, , TS194 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, external_port/n89 END SYM, U4469, IBUF PIN, I, I, rcp_a_bus<17> PIN, O, O, address_generator/int_addr30<17> END SYM, U4468, IBUF PIN, I, I, rcp_a_bus<18> PIN, O, O, address_generator/int_addr30<18> END SYM, U4467, IBUF PIN, I, I, rcp_a_bus<19> PIN, O, O, address_generator/int_addr30<19> END SYM, U4466, BUFGS PIN, I, I, rcp_ale PIN, O, O, address_generator/n31<0> END SYM, U4460, IBUF PIN, I, I, fnc_cs_n PIN, O, O, n279 END SYM, antenna_interface/ant/clock_reg<5>, DFF, BLKNM=U2038 PIN, D, I, n3011 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/clock<5> END SYM, U3780, OR PIN, I1, I, n2104 PIN, I2, I, n2103 PIN, O, O, n3408 END SYM, U3781, NAND PIN, I1, I, n3409 PIN, I2, I, n3408 PIN, O, O, n2288 END SYM, U3782, NAND PIN, I1, I, bootstrap/rx/sreg274<4> PIN, I2, I, n1866 PIN, O, O, n3411 END SYM, U3783, OR PIN, I1, I, n2106 PIN, I2, I, n2105 PIN, O, O, n3410 END SYM, U3784, NAND PIN, I1, I, n3411 PIN, I2, I, n3410 PIN, O, O, n3412 END SYM, U3787, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<7>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3415 END SYM, U3788, OR PIN, I1, I, n3415 PIN, I2, I, n1930 PIN, O, O, n2289 END SYM, U3789, NAND PIN, I1, I, bootstrap/rx/sreg274<6> PIN, I2, I, n1866 PIN, O, O, n3417 END SYM, U3940, AND PIN, I1, I, bootstrap/tx/cycle<2> PIN, I2, I, bootstrap/tx/cycle<1> PIN, I3, I, n1911 PIN, I4, I, bootstrap/tx/cycle<3>, , INV PIN, O, O, n3545 END SYM, U3941, OR PIN, I1, I, n3553 PIN, I2, I, n3552 PIN, O, O, n3554 END SYM, U3943, NAND PIN, I1, I, n2028 PIN, I2, I, n3549 PIN, O, O, n3550 END SYM, U3944, NAND PIN, I1, I, rcp_rcv_rd<10> PIN, I2, I, receiver_interface/dac/cycle<2>, , INV PIN, O, O, n3549 END SYM, U3945, AND PIN, I1, I, receiver_interface/dac/cycle<3> PIN, I2, I, n3550 PIN, O, O, n3553 END SYM, U3947, AND PIN, I1, I, receiver_interface/dac/cycle<2> PIN, I2, I, rcp_rcv_rd<10> PIN, I3, I, n2256 PIN, I4, I, receiver_interface/dac/cycle<3>, , INV PIN, O, O, n3552 END SYM, U3948, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<9> PIN, O, O, n3556 END SYM, U3949, NAND PIN, I1, I, bootstrap/wr_source/r_mid<9> PIN, I2, I, n2089 PIN, O, O, n3555 END SYM, bootstrap/rx/int_stb_reg, DFF, BLKNM=U1517 PIN, D, I, n2661 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/n53 END SYM, bootstrap/tx/baud_reg<1>, DFF, BLKNM=U1868 PIN, D, I, n3794 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/baud<1> END SYM, U3031, NAND PIN, I1, I, bootstrap/rx/baud16<0> PIN, I2, I, bootstrap/rx/baud16<1> PIN, I3, I, bootstrap/rx/baud16<2>, , INV PIN, O, O, n2758 END SYM, U3032, OR PIN, I1, I, bootstrap/rx/baud16<2>, , INV PIN, I2, I, n2755 PIN, O, O, n2757 END SYM, U3033, AND PIN, I1, I, bootstrap/rx/baud16<1> PIN, I2, I, n2756 PIN, O, O, n2755 END SYM, U3034, OR PIN, I1, I, bootstrap/rx/baud16<0> PIN, I2, I, n2167 PIN, O, O, n2756 END SYM, U3035, NAND PIN, I1, I, n2758 PIN, I2, I, n2757 PIN, O, O, n2759 END SYM, U3037, AND PIN, I1, I, antenna_interface/sync/wr_n_latch PIN, I2, I, n280, , INV PIN, I3, I, antenna_interface/sync/ale_select PIN, O, O, n2763 END SYM, U3039, AND PIN, I1, I, fan_interface/sync/wr_n_latch PIN, I2, I, n280, , INV PIN, I3, I, fan_interface/sync/ale_select PIN, O, O, n2762 END SYM, bootstrap/incr_en_reg, DFF, BLKNM=U1565 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/n53 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/incr_en END SYM, U4019, OR PIN, I1, I, n3614 PIN, I2, I, n2124 PIN, O, O, n3615 END SYM, U4018, NOR PIN, I1, I, address_generator/int_addr30<5>, , INV, TS134, TS26, TS25 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3614 END SYM, U4015, OR PIN, I1, I, n3611 PIN, I2, I, n2221 PIN, O, O, n3616 END SYM, U4014, NOR PIN, I1, I, address_generator/int_addr30<6>, , INV, TS191 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3611 END SYM, U4011, OR PIN, I1, I, n3606 PIN, I2, I, n2126 PIN, O, O, n3607 END SYM, U4010, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<3>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3606 END SYM, tod_receiver/tod_receiver/shift_reg_reg<1>, DFF, BLKNM=U1671 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<1> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<2> END SYM, U2780, NOR PIN, I1, I, audio_interface/aud/clock<0> PIN, I2, I, n2553 PIN, O, O, n2296 END SYM, U2782, AND PIN, I1, I, receiver_interface/dac/shift_reg<0> PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, n2556 END SYM, U2785, NOR PIN, I1, I, rcp_addr_tri/y12<3> PIN, I2, I, rcp_addr_tri/y12<2> PIN, I3, I, rcp_addr_tri/y12<1> PIN, I4, I, rcp_addr_tri/y12<4>, , INV PIN, O, O, n2180 END SYM, U2786, OR PIN, I1, I, iic_bus_interface/iic/cycle<1> PIN, I2, I, iic_bus_interface/iic/cycle<2> PIN, O, O, n2558 END SYM, U2787, AND PIN, I1, I, iic_bus_interface/iic/cycle<3> PIN, I2, I, n2558 PIN, O, O, n2018 END SYM, synthesizer_interface/synth/shift_reg_reg<13>, DFF, BLKNM=U1894 PIN, D, I, n3508, , TS193, TS192 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<13> END SYM, U2941, OR PIN, I1, I, n2233 PIN, I2, I, n1882 PIN, I3, I, n2232 PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<11>, , INV PIN, O, O, n2680 END SYM, U2942, NAND PIN, I1, I, tod_receiver/tod_receiver/n217<0> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<14> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<15> PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<12> PIN, O, O, n2679 END SYM, U2944, OR PIN, I1, I, n2684 PIN, I2, I, n2685 PIN, O, O, n2682 END SYM, U2945, NAND PIN, I1, I, n2682 PIN, I2, I, tod_receiver/tod_receiver/n188, , INV PIN, O, O, tod_receiver/tod_receiver/n179 END SYM, U2947, OR PIN, I1, I, n2230 PIN, I2, I, n2231 PIN, I3, I, n1808 PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<13>, , INV PIN, O, O, n2685 END SYM, U2948, NAND PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<7> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<8> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<9> PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<6> PIN, O, O, n2684 END SYM, receiver_interface/dac/shift_reg_reg<11>, DFF, BLKNM=U1808 PIN, D, I, n2909, , TS190, TS189 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_rcv_rd<9> END SYM, receiver_interface/sync/wren_reg, DFF, BLKNM=U1970 PIN, D, I, n2513, , TS188 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/dac/busy285 END SYM, antenna_interface/ant/shift_reg_reg<12>, DFF, BLKNM=U1838 PIN, D, I, n2450, , TS187, TS186 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<12> END SYM, bootstrap/wr_source/r03/q_reg<2>, DFF, BLKNM=U1567 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r03/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<14> END SYM, antenna_interface/ant/cycle_reg<0>, DFF, BLKNM=U1834 PIN, D, I, n2460 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n268<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/cycle<0> END SYM, U3481, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<9> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n3148 END SYM, U3482, NAND PIN, I1, I, address_generator/int_addr30<10>, , TS131 PIN, I2, I, fan_interface/load PIN, O, O, n3147 END SYM, U3483, NAND PIN, I1, I, n3148 PIN, I2, I, n3147 PIN, O, O, n3149 END SYM, U3485, NAND PIN, I1, I, bootstrap/rx/sreg274<6> PIN, I2, I, n2211 PIN, O, O, n3152 END SYM, U3486, NAND PIN, I1, I, n3152 PIN, I2, I, n3159, , INV PIN, O, O, n3160 END SYM, U3489, NAND PIN, I1, I, n2154 PIN, I2, I, n2165 PIN, I3, I, bs_addr<15>, , INV PIN, O, O, n3158 END SYM, U3640, NAND PIN, I1, I, n3291 PIN, I2, I, bootstrap/rx/busy PIN, O, O, n2283 END SYM, U3641, XOR PIN, I1, I, bootstrap/tx/cycle<2> PIN, I2, I, n3292 PIN, O, O, n3293 END SYM, U3642, AND PIN, I1, I, bootstrap/tx/cycle<0> PIN, I2, I, bootstrap/tx/cycle<1> PIN, O, O, n3292 END SYM, U3643, AND PIN, I1, I, bootstrap/tx_busy PIN, I2, I, n3293 PIN, O, O, n3294 END SYM, U3645, OR PIN, I1, I, iic_bus_interface/iic/cycle<0> PIN, I2, I, iic_bus_interface/iic/read_cycle PIN, I3, I, iic_bus_interface/iic/cycle<3>, , INV PIN, O, O, n3297 END SYM, U3646, NAND PIN, I1, I, iic_bus_interface/iic/read_cycle PIN, I2, I, iic_bus_interface/iic/cycle<3>, , INV PIN, O, O, n3296 END SYM, U3647, NAND PIN, I1, I, n3297 PIN, I2, I, n3296 PIN, O, O, n3299 END SYM, U3649, NAND PIN, I1, I, iic_bus_interface/iic/shift_reg_Q459<11>, , INV PIN, I2, I, bootstrap/wr_control/n114 PIN, O, O, iic_bus_interface/iic_sda62 END SYM, audio_interface/aud/data_sreg_reg<7>, DFF, BLKNM=U1501 PIN, D, I, n2298, , TS184, TS183 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n413<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_audio_rd<7> END SYM, iic_bus_interface/iic/shift_reg_reg<6>, DFF, BLKNM=U1798 PIN, D, I, n2788, , TS182, TS181 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n461<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_iic_rd<3> END SYM, bootstrap/dma_cnt/iq_reg<9>, DFF, BLKNM=U1912 PIN, D, I, n3412 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<9> END SYM, U3800, NAND PIN, I1, I, address_generator/int_addr30<9>, , TS336, TS335, TS325 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n3424 END SYM, U3801, NAND PIN, I1, I, n3425 PIN, I2, I, n3424 PIN, O, O, n3426 END SYM, U3802, XOR PIN, I1, I, rtc_divide/clock<8> PIN, I2, I, n3428 PIN, O, O, n3431 END SYM, U3803, AND PIN, I1, I, rtc_divide/clock<7> PIN, I2, I, n2225 PIN, I3, I, rtc_divide/clock<6> PIN, O, O, n3428 END SYM, U3804, XOR PIN, I1, I, rtc_divide/clock<7> PIN, I2, I, n3429 PIN, O, O, n3430 END SYM, U3805, AND PIN, I1, I, rtc_divide/clock<6> PIN, I2, I, n2225 PIN, O, O, n3429 END SYM, U3806, XOR PIN, I1, I, interrupt_source/divide<0> PIN, I2, I, interrupt_source/divide<1> PIN, O, O, n3434 END SYM, U3807, XOR PIN, I1, I, rtc_divide/clock<3> PIN, I2, I, n3432 PIN, O, O, n3433 END SYM, U3808, AND PIN, I1, I, rtc_divide/clock<2> PIN, I2, I, rtc_divide/clock<1> PIN, I3, I, rtc_divide/clock<0> PIN, O, O, n3432 END SYM, bootstrap/wr_control/cycle_reg<0>, DFF, BLKNM=U1768 PIN, D, I, n3288 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_control/cycle<0> END SYM, receiver_interface/dac/shift_reg_reg<3>, DFF, BLKNM=U1810 PIN, D, I, n2736, , TS180, TS179 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_rcv_rd<1> END SYM, bootstrap/wr_source/r01/q_reg<2>, DFF, BLKNM=U1573 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r01/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<6> END SYM, bootstrap/dma_cnt/iq_reg<14>, DFF, BLKNM=U2154 PIN, D, I, n3348 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<12> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<14> END SYM, U4319, OR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<4> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<12> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<11> PIN, I4, I, tod_receiver/tod_receiver/manchester_decoder/timeout<5> PIN, O, O, n1905 END SYM, U4318, NAND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<6>, , INV PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<7>, , INV PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<9> PIN, I4, I, tod_receiver/tod_receiver/manchester_decoder/timeout<3> PIN, O, O, n1904 END SYM, U4315, NAND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<13> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<2> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<10> PIN, I4, I, tod_receiver/tod_receiver/manchester_decoder/timeout<8> PIN, O, O, n1903 END SYM, U4314, NAND PIN, I1, I, fan_interface/pwm/clock<0> PIN, I2, I, fan_interface/pwm/clock<4> PIN, I3, I, fan_interface/pwm/clock<3> PIN, I4, I, fan_interface/pwm/clock<10>, , INV PIN, O, O, n2102 END SYM, U4312, NAND PIN, I1, I, fan_interface/pwm/clock<9> PIN, I2, I, fan_interface/pwm/clock<7> PIN, I3, I, fan_interface/pwm/clock<6> PIN, I4, I, fan_interface/pwm/clock<11> PIN, O, O, n2101 END SYM, U4311, AND PIN, I1, I, rcp_rcv_rd<10> PIN, I2, I, receiver_interface/dac/ser_clk258, , INV PIN, O, O, n1840 END SYM, tod_receiver/tod_receiver/cycle_reg<1>, DFF, BLKNM=U1818 PIN, D, I, n2701 PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n207<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/cycle<1> END SYM, U4159, NOR PIN, I1, I, n3732 PIN, I2, I, synthesizer_interface/synth/int_busy303 PIN, O, O, n3733 END SYM, U4157, OR PIN, I1, I, n3730 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, synthesizer_interface/synth/n348<10> END SYM, U4156, AND PIN, I1, I, synthesizer_interface/synth/clock<0> PIN, I2, I, synthesizer_interface/synth/int_busy303, , INV PIN, I3, I, n2027, , INV PIN, O, O, n3730 END SYM, U4153, OR PIN, I1, I, n3727 PIN, I2, I, synthesizer_interface/synth/int_busy303 PIN, O, O, synthesizer_interface/synth/n308 END SYM, U4152, NOR PIN, I1, I, synthesizer_interface/synth/cycle<0>, , INV PIN, I2, I, n2024 PIN, I3, I, synthesizer_interface/synth/cycle<1>, , INV PIN, O, O, n3727 END SYM, U2481, NAND PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<1> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<4> PIN, I3, I, tod_receiver/tod_receiver/n217<0> PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<2>, , INV PIN, O, O, n1808 END SYM, U2482, OR PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<5> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<3> PIN, I3, I, rcp_tod_rd<15> PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<10> PIN, O, O, n2230 END SYM, U2484, OR PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<14> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<15> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<11> PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<12> PIN, O, O, n2231 END SYM, U2485, NAND PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<5> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<3> PIN, I3, I, rcp_tod_rd<15> PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<10> PIN, O, O, n2232 END SYM, U2488, OR PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<1> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<4> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<6> PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<2>, , INV PIN, O, O, n2233 END SYM, U2489, OR PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<8> PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<9> PIN, I3, I, tod_receiver/tod_receiver/shift_reg211<13> PIN, I4, I, tod_receiver/tod_receiver/shift_reg211<7> PIN, O, O, n1882 END SYM, U2640, AND PIN, I1, I, bootstrap/decode/address<4> PIN, I2, I, n1940 PIN, I3, I, n2129 PIN, I4, I, bootstrap/decode/address<5>, , INV PIN, O, O, bootstrap/wr_source/r13/n51<0> END SYM, U2643, AND PIN, I1, I, bootstrap/n53 PIN, I2, I, n1417 PIN, I3, I, bootstrap/rx/sreg274<2>, , INV PIN, I4, I, bootstrap/rx/sreg274<1>, , INV PIN, O, O, n1940 END SYM, U2644, NOR PIN, I1, I, n2211 PIN, I2, I, n2212 PIN, I3, I, n2213 PIN, I4, I, n1866 PIN, O, O, n1869 END SYM, U2646, AND PIN, I1, I, external_port/sync/wr_n_latch PIN, I2, I, n280, , INV PIN, I3, I, external_port/sync/ale_select PIN, O, O, n2436 END SYM, U2648, NAND PIN, I1, I, audio_interface/aud/cycle<3> PIN, I2, I, n2171 PIN, I3, I, audio_interface/aud/cycle<2> PIN, O, O, n2437 END SYM, U2649, AND PIN, I1, I, audio_interface/aud/cycle<4>, , INV PIN, I2, I, n2437 PIN, O, O, n2136 END SYM, U2802, NOR PIN, I1, I, n2169, , INV PIN, I2, I, receiver_interface/dac/clock<3> PIN, I3, I, receiver_interface/dac/clock<2>, , INV PIN, O, O, n2567 END SYM, U2803, OR PIN, I1, I, n2567 PIN, I2, I, n1861 PIN, O, O, n2571 END SYM, fan_interface/pwm/clock_reg<5>, DFF, BLKNM=U1746 PIN, D, I, n3631 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/clock<5> END SYM, U2805, NAND PIN, I1, I, n2199 PIN, I2, I, n2569 PIN, O, O, n2570 END SYM, U2806, NAND PIN, I1, I, n1840 PIN, I2, I, receiver_interface/dac/clock<2>, , INV PIN, O, O, n2569 END SYM, U2807, AND PIN, I1, I, receiver_interface/dac/clock<3> PIN, I2, I, n2570 PIN, O, O, n1861 END SYM, U2809, AND PIN, I1, I, bootstrap/rd_control/cyc_rst_n PIN, I2, I, bootstrap/rd_control/cycle<0>, , INV PIN, O, O, bootstrap/rd_control/cycle119<0> END SYM, fill_output/sync/wren_reg, DFF, BLKNM=U1960 PIN, D, I, n2626, , TS178 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fill_output/n124 END SYM, bootstrap/tx/sreg_reg<7>, DFF, BLKNM=U2066 PIN, D, I, n2529, , TS177, TS176, TS175, TS174 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n152<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/sreg_Q150<7> END SYM, iic_bus_interface/iic/shift_reg_reg<11>, DFF, BLKNM=U1786 PIN, D, I, n2985, , TS173, TS172 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n461<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/shift_reg_Q459<11> END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<12>, DFF, BLKNM=U2016 PIN, D, I, n3312 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<12> END SYM, U3180, NAND PIN, I1, I, bootstrap/wr_source/r_hih<5> PIN, I2, I, n1874 PIN, O, O, n2886 END SYM, U3181, OR PIN, I1, I, n303 PIN, I2, I, n1951 PIN, O, O, n2885 END SYM, bootstrap/rx/baud16_reg<1>, DFF, BLKNM=U1860 PIN, D, I, n3816 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/baud16<1> END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<9>, DFF, BLKNM=U1882 PIN, D, I, n3681 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<9> END SYM, U3182, NAND PIN, I1, I, n2886 PIN, I2, I, n2885 PIN, O, O, n2890 END SYM, U3183, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<5> PIN, O, O, n2888 END SYM, U3184, NAND PIN, I1, I, bootstrap/wr_source/r_mid<5> PIN, I2, I, n2089 PIN, O, O, n2887 END SYM, U3185, NAND PIN, I1, I, n2888 PIN, I2, I, n2887 PIN, O, O, n2889 END SYM, U3186, OR PIN, I1, I, n2897 PIN, I2, I, n2896 PIN, O, O, rcp_ad_tri/y12<15> END SYM, U3188, NAND PIN, I1, I, rcp_tod_rd<15> PIN, I2, I, n303, , INV PIN, O, O, n2893 END SYM, U3189, NAND PIN, I1, I, bootstrap/wr_source/r_hih<15> PIN, I2, I, n1874 PIN, O, O, n2892 END SYM, U3341, NAND PIN, I1, I, n2052 PIN, I2, I, n2165 PIN, I3, I, bs_addr<10>, , INV PIN, O, O, n3029 END SYM, fan_interface/pwm/shift_reg_reg<16>, DFF, BLKNM=U1940 PIN, D, I, n2970 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<16> END SYM, U3342, OR PIN, I1, I, bs_addr<10>, , INV PIN, I2, I, n3025 PIN, O, O, n3028 END SYM, U3343, AND PIN, I1, I, n1865 PIN, I2, I, n3027 PIN, O, O, n3025 END SYM, U3344, NAND PIN, I1, I, n2165 PIN, I2, I, n2052, , INV PIN, O, O, n3027 END SYM, U3345, NAND PIN, I1, I, n3029 PIN, I2, I, n3028 PIN, O, O, n3030 END SYM, receiver_interface/dac/cycle_reg<1>, DFF, BLKNM=U1806 PIN, D, I, n2915 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n310<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/dac/cycle<1> END SYM, U3347, NAND PIN, I1, I, bootstrap/rx/sreg274<6> PIN, I2, I, n1864 PIN, O, O, n3033 END SYM, U3348, NAND PIN, I1, I, n3033 PIN, I2, I, n3036, , INV PIN, O, O, n3037 END SYM, U3349, NOR PIN, I1, I, n3034 PIN, I2, I, bs_addr<3> PIN, O, O, n3035 END SYM, receiver_interface/dac/clock_reg<3>, DFF, BLKNM=U1828 PIN, D, I, n2571 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/dac/clock<3> END SYM, audio_interface/aud/ser_doe_n_reg, DFF, BLKNM=U1972 PIN, D, I, n2510 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n384 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/doe_n END SYM, U3500, NAND PIN, I1, I, n3165 PIN, I2, I, n3164 PIN, O, O, n3166 END SYM, U3502, NAND PIN, I1, I, bootstrap/rx/sreg274<4> PIN, I2, I, n2212 PIN, O, O, n3169 END SYM, U3503, NAND PIN, I1, I, n3169 PIN, I2, I, n3176, , INV PIN, O, O, n3177 END SYM, U3506, NAND PIN, I1, I, n2155 PIN, I2, I, n2165 PIN, I3, I, bs_addr<17>, , INV PIN, O, O, n3175 END SYM, U3507, OR PIN, I1, I, bs_addr<17>, , INV PIN, I2, I, n3171 PIN, O, O, n3174 END SYM, U3508, AND PIN, I1, I, n1870 PIN, I2, I, n3173 PIN, O, O, n3171 END SYM, U3509, NAND PIN, I1, I, n2165 PIN, I2, I, n2155, , INV PIN, O, O, n3173 END SYM, antenna_interface/ant/shift_reg_reg<8>, DFF, BLKNM=U1846 PIN, D, I, n2342, , TS171, TS170 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<8> END SYM, iic_bus_interface/sync/wr_n_latch_reg, DFF, BLKNM=U1717 PIN, D, I, antenna_interface/sync/wr_n_latch76, , TS439, TS416, TS389, TS285, TS227, TS203, TS169, TS59, TS52, TS51, TS30 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/sync/wr_n_latch END SYM, bootstrap/rx/sreg_reg<1>, DFF, BLKNM=U1703 PIN, D, I, bootstrap/rx/sreg274<1> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n278<0> PIN, Q, O, bootstrap/rx/sreg274<0> END SYM, synthesizer_interface/sync_high/ale_select_reg, DFF, BLKNM=U1964 PIN, D, I, n2619, , TS168, TS167, TS166, TS165, TS164, TS163, TS162, TS161, TS160, TS159, TS158, TS157 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/sync_high/n72 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/sync_high/ale_select END SYM, fan_interface/sync/ale_select_reg, DFF, BLKNM=U1942 PIN, D, I, n2966, , TS156, TS155, TS154, TS153, TS152, TS151, TS150, TS149, TS148, TS147, TS146, TS145 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/sync/n72 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/sync/ale_select END SYM, rtc_divide/clock_reg<0>, DFF, BLKNM=U1932 PIN, D, I, n3103 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rtc_divide/clock<0> END SYM, fan_interface/pwm/shift_reg_reg<1>, DFF, BLKNM=U1778 PIN, D, I, n3117, , TS144, TS143 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<1> END SYM, bootstrap/decode/int_active_reg, DFF, BLKNM=U1864 PIN, D, I, bootstrap/decode/int_active686 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/decode/n691 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1417 END SYM, U4459, BUFGP PIN, I, I, cp_n PIN, O, O, n278 END SYM, U4458, IBUF PIN, I, I, cd_n PIN, O, O, bootstrap/wr_control/n114 END SYM, U4456, NOR PIN, I1, I, iic_bus_interface/iic/busy427 PIN, I2, I, n3936 PIN, I3, I, n3935 PIN, O, O, n3938 END SYM, U4455, NOR PIN, I1, I, n2018 PIN, I2, I, iic_bus_interface/iic/clock<7> PIN, O, O, n3936 END SYM, U4454, AND PIN, I1, I, iic_bus_interface/iic/stop_cycle, , INV PIN, I2, I, n2018 PIN, O, O, n3935 END SYM, U4452, NAND PIN, I1, I, n3933 PIN, I2, I, n3938, , INV PIN, O, O, n3939 END SYM, U4451, NAND PIN, I1, I, address_generator/int_addr30<8>, , TS261 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, n3933 END SYM, U4299, NAND PIN, I1, I, n3826 PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, receiver_interface/dac/n290 END SYM, U4298, NAND PIN, I1, I, n1934 PIN, I2, I, n1959 PIN, O, O, n3826 END SYM, U4296, AND PIN, I1, I, n2212, , INV PIN, I2, I, n3823 PIN, O, O, n2165 END SYM, U4295, NAND PIN, I1, I, bootstrap/decode/address<5> PIN, I2, I, bootstrap/decode/address<4> PIN, I3, I, n1940 PIN, O, O, n3823 END SYM, U4293, AND PIN, I1, I, bs_addr<0> PIN, I2, I, n2165 PIN, I3, I, bs_addr<1> PIN, O, O, n1993 END SYM, U4292, AND PIN, I1, I, bootstrap/tx/baud<2> PIN, I2, I, bootstrap/tx/baud<1> PIN, I3, I, bootstrap/tx/baud<0> PIN, O, O, n2184 END SYM, U4291, AND PIN, I1, I, bootstrap/tx/baud<3> PIN, I2, I, bootstrap/tx/baud<4> PIN, I3, I, n2184 PIN, O, O, n1919 END SYM, U4290, AND PIN, I1, I, bootstrap/rx_data<0> PIN, I2, I, bootstrap/rx/sreg274<0>, , INV PIN, O, O, n2113 END SYM, antenna_interface/ant/clock_reg<4>, DFF, BLKNM=U2036 PIN, D, I, n3014 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/clock<4> END SYM, synthesizer_interface/sync_high/ale_latch_reg, DFF, BLKNM=U1713 PIN, D, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/sync_high/n72 END SYM, U3790, OR PIN, I1, I, n1932 PIN, I2, I, n1931 PIN, O, O, n3416 END SYM, U3791, NAND PIN, I1, I, n3417 PIN, I2, I, n3416 PIN, O, O, n3418 END SYM, U3793, NAND PIN, I1, I, audio_interface/aud/comm_sreg_Q421<6> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n3421 END SYM, U3794, NAND PIN, I1, I, address_generator/int_addr30<15>, , TS353, TS95, TS94 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n3420 END SYM, U3795, NAND PIN, I1, I, n3421 PIN, I2, I, n3420 PIN, O, O, n3422 END SYM, U3796, OR PIN, I1, I, n1880 PIN, I2, I, n1825 PIN, O, O, audio_interface/aud/n356 END SYM, U3797, XOR PIN, I1, I, bootstrap/rx/baud16<4> PIN, I2, I, n1890 PIN, O, O, n3427 END SYM, U3799, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<8> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n3425 END SYM, U3950, NAND PIN, I1, I, n3556 PIN, I2, I, n3555 PIN, O, O, n1925 END SYM, U3952, NAND PIN, I1, I, address_generator/int_addr<0> PIN, I2, I, n303, , INV PIN, O, O, n3559 END SYM, U3953, NAND PIN, I1, I, bs_addr<0> PIN, I2, I, n303 PIN, O, O, n3558 END SYM, U3954, NAND PIN, I1, I, n3559 PIN, I2, I, n3558 PIN, O, O, rcp_addr_tri/y12<0> END SYM, U2500, AND PIN, I1, I, audio_interface/aud/cycle<1> PIN, I2, I, audio_interface/aud/cycle<0> PIN, I3, I, rcp_audio_rd<8> PIN, O, O, n2171 END SYM, U3957, NAND PIN, I1, I, address_generator/int_addr<10> PIN, I2, I, n303, , INV PIN, O, O, n3563 END SYM, U3958, NAND PIN, I1, I, bs_addr<10> PIN, I2, I, n303 PIN, O, O, n3562 END SYM, U2502, AND PIN, I1, I, antenna_interface/ant/cycle<3> PIN, I2, I, antenna_interface/ant/cycle<2> PIN, I3, I, n2080 PIN, I4, I, antenna_interface/ant/cycle<4>, , INV PIN, O, O, n2079 END SYM, U3959, NAND PIN, I1, I, n3563 PIN, I2, I, n3562 PIN, O, O, rcp_addr_tri/y12<10> END SYM, U2503, AND PIN, I1, I, synthesizer_interface/synth/cycle<1> PIN, I2, I, synthesizer_interface/synth/cycle<0> PIN, I3, I, rcp_sts2_rd PIN, O, O, n2081 END SYM, U2505, NOR PIN, I1, I, iic_bus_interface/iic/cycle<2> PIN, I2, I, iic_bus_interface/iic/cycle<1> PIN, I3, I, n1983 PIN, I4, I, n1982, , INV PIN, O, O, iic_bus_interface/iic/n451 END SYM, U2506, AND PIN, I1, I, interrupt_source/divide<0> PIN, I2, I, interrupt_source/divide<1> PIN, O, O, interrupt_source/n131<0> END SYM, U2508, AND PIN, I1, I, bootstrap/decode/address<5> PIN, I2, I, n1940 PIN, I3, I, n2055 PIN, I4, I, bootstrap/decode/address<4>, , INV PIN, O, O, bootstrap/wr_source/r20/n51<0> END SYM, bootstrap/wr_control/cycle_rst_n_reg, DFF, BLKNM=U2116 PIN, D, I, bootstrap/wr_control/cycle_rst_n92 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_control/n97 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_control/cycle_rst_n END SYM, interrupt_source/intr_reg, DFF, BLKNM=U2010 PIN, D, I, n3322 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1386 END SYM, iic_bus_interface/sync/wren_reg, DFF, BLKNM=U1966 PIN, D, I, n2616, , TS141 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/busy427 END SYM, bootstrap/tx/baud_reg<2>, DFF, BLKNM=U1866 PIN, D, I, n3801 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/baud<2> END SYM, U3041, NAND PIN, I1, I, n280, , INV PIN, I2, I, n303 PIN, O, O, n2766 END SYM, U3042, OR PIN, I1, I, n281 PIN, I2, I, n279 PIN, O, O, n2765 END SYM, U3043, AND PIN, I1, I, n2766 PIN, I2, I, n2765 PIN, O, O, rcp_ad_tri/y_tri_enable<0> END SYM, U3046, AND PIN, I1, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I2, I, n2185 PIN, I3, I, address_generator/int_addr30<1>, , INV, TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I4, I, address_generator/int_addr30<4>, , INV, TS98, TS29, TS28 PIN, O, O, n2769 END SYM, U3048, AND PIN, I1, I, bootstrap/tx/sreg_Q150<1> PIN, I2, I, bootstrap/tx/int_busy137, , INV PIN, O, O, bootstrap/tx/sreg146<0> END SYM, U4007, OR PIN, I1, I, n3603 PIN, I2, I, n2125 PIN, O, O, n3608 END SYM, U4006, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<4>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3603 END SYM, U4003, OR PIN, I1, I, n3598 PIN, I2, I, n2128 PIN, O, O, n3599 END SYM, U4002, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<5>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3598 END SYM, antenna_interface/sync/ale_latch_reg, DFF, BLKNM=U1655 PIN, D, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/sync/n72 END SYM, U3200, NAND PIN, I1, I, bootstrap/wr_source/r_mid<14> PIN, I2, I, n2089 PIN, O, O, n2901 END SYM, U3201, NAND PIN, I1, I, n2902 PIN, I2, I, n2901 PIN, O, O, n2903 END SYM, U3202, OR PIN, I1, I, n332 PIN, I2, I, receiver_interface/dac/busy285 PIN, O, O, n2910 END SYM, U3204, NAND PIN, I1, I, rcp_rcv_rd<8> PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, n2907 END SYM, U3205, NAND PIN, I1, I, address_generator/int_addr30<9>, , TS336, TS335, TS325 PIN, I2, I, receiver_interface/dac/busy285 PIN, O, O, n2906 END SYM, U3206, NAND PIN, I1, I, n2907 PIN, I2, I, n2906 PIN, O, O, n2909 END SYM, U3208, XOR PIN, I1, I, receiver_interface/dac/cycle<0> PIN, I2, I, receiver_interface/dac/cycle<1> PIN, O, O, n2911 END SYM, U3209, AND PIN, I1, I, rcp_rcv_rd<10> PIN, I2, I, n2911 PIN, O, O, n2915 END SYM, tod_receiver/sync/wren_reg, DFF, BLKNM=U1952 PIN, D, I, n2776, , TS139 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/n88 END SYM, tod_receiver/tod_receiver/shift_reg_reg<0>, DFF, BLKNM=U1675 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<0> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<1> END SYM, U2790, AND PIN, I1, I, bootstrap/tx/cycle<0> PIN, I2, I, bootstrap/tx/cycle<3> PIN, I3, I, bootstrap/tx/cycle<1>, , INV PIN, I4, I, bootstrap/tx/cycle<2>, , INV PIN, O, O, n1868 END SYM, U2791, NOR PIN, I1, I, n2211 PIN, I2, I, n2212 PIN, I3, I, n1864 PIN, I4, I, n1866 PIN, O, O, n1867 END SYM, U2792, OR PIN, I1, I, n1945 PIN, I2, I, bootstrap/wr_control/cycle_rst_n92 PIN, O, O, bootstrap/wr_control/n97 END SYM, U2793, AND PIN, I1, I, bootstrap/wr_control/cycle<1> PIN, I2, I, bootstrap/wr_control/cycle<2> PIN, I3, I, bootstrap/wr_control/cycle<0> PIN, O, O, n1945 END SYM, U2795, AND PIN, I1, I, n2215 PIN, I2, I, n1807, , INV PIN, O, O, n1806 END SYM, U2798, NAND PIN, I1, I, antenna_interface/ant/clock<6> PIN, I2, I, n1916 PIN, I3, I, antenna_interface/ant/ser_clk234, , INV PIN, I4, I, antenna_interface/ant/clock<3>, , INV PIN, O, O, n1807 END SYM, synthesizer_interface/synth/shift_reg_reg<9>, DFF, BLKNM=U1581 PIN, D, I, synthesizer_interface/synth/shift_reg342<9>, , TS138, TS137 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<9> END SYM, synthesizer_interface/synth/shift_reg_reg<14>, DFF, BLKNM=U1896 PIN, D, I, n3499, , TS136, TS135 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<14> END SYM, U2950, NOR PIN, I1, I, synthesizer_interface/synth/clock<3>, , INV PIN, I2, I, n2690 PIN, O, O, n2687 END SYM, U2951, OR PIN, I1, I, n2687 PIN, I2, I, n2025 PIN, O, O, synthesizer_interface/synth/n299 END SYM, U2953, OR PIN, I1, I, synthesizer_interface/synth/clock<1> PIN, I2, I, synthesizer_interface/synth/clock<2> PIN, I3, I, synthesizer_interface/synth/clock<4> PIN, I4, I, synthesizer_interface/synth/clock<0>, , INV PIN, O, O, n2690 END SYM, U2955, AND PIN, I1, I, synthesizer_interface/synth/clock<0> PIN, I2, I, n2027, , INV PIN, O, O, n2025 END SYM, U2956, OR PIN, I1, I, n2695 PIN, I2, I, receiver_interface/dac/ser_clk258 PIN, O, O, receiver_interface/dac/n263 END SYM, U2957, NAND PIN, I1, I, receiver_interface/dac/cycle<3> PIN, I2, I, n2691 PIN, O, O, n2692 END SYM, U2958, OR PIN, I1, I, receiver_interface/dac/cycle<2> PIN, I2, I, n2256 PIN, O, O, n2691 END SYM, U2959, AND PIN, I1, I, n1959 PIN, I2, I, n2692 PIN, O, O, n2695 END SYM, receiver_interface/dac/shift_reg_reg<12>, DFF, BLKNM=U1529 PIN, D, I, n2293 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/dac/ser_dato267 END SYM, antenna_interface/ant/shift_reg_reg<13>, DFF, BLKNM=U1836 PIN, D, I, n2457, , TS133, TS132 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<13> END SYM, receiver_interface/dac/busy_reg, DFF, BLKNM=U1583 PIN, D, I, receiver_interface/dac/busy285 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n290 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_rcv_rd<10> END SYM, bootstrap/wr_source/r03/q_reg<1>, DFF, BLKNM=U1585 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r03/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<13> END SYM, antenna_interface/ant/cycle_reg<1>, DFF, BLKNM=U1832 PIN, D, I, n2465 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n268<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/cycle<1> END SYM, U3490, OR PIN, I1, I, bs_addr<15>, , INV PIN, I2, I, n3154 PIN, O, O, n3157 END SYM, U3491, AND PIN, I1, I, n2194 PIN, I2, I, n3156 PIN, O, O, n3154 END SYM, U3492, NAND PIN, I1, I, n2165 PIN, I2, I, n2154, , INV PIN, O, O, n3156 END SYM, U3493, NAND PIN, I1, I, n3158 PIN, I2, I, n3157 PIN, O, O, n3159 END SYM, U3495, NAND PIN, I1, I, bootstrap/incr_en48 PIN, I2, I, n1864 PIN, O, O, n3162 END SYM, U3496, NAND PIN, I1, I, n3162 PIN, I2, I, n3166, , INV PIN, O, O, n3167 END SYM, U3498, NAND PIN, I1, I, n2165 PIN, I2, I, bs_addr<0>, , INV PIN, O, O, n3165 END SYM, U3499, OR PIN, I1, I, n1869 PIN, I2, I, bs_addr<0>, , INV PIN, O, O, n3164 END SYM, U3651, NAND PIN, I1, I, fan_interface/pwm/shift_reg_Q142<8> PIN, I2, I, fan_interface/load, , INV PIN, O, O, n3302 END SYM, U3652, NAND PIN, I1, I, address_generator/int_addr30<9>, , TS336, TS335, TS325 PIN, I2, I, fan_interface/load PIN, O, O, n3301 END SYM, U3653, NAND PIN, I1, I, n3302 PIN, I2, I, n3301 PIN, O, O, n3306 END SYM, U3656, AND PIN, I1, I, n1872 PIN, I2, I, iic_bus_interface/iic/cycle<0>, , INV PIN, I3, I, iic_bus_interface/iic/cycle<2>, , INV PIN, O, O, n3305 END SYM, U3657, OR PIN, I1, I, n3305 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, n1956 END SYM, U3659, AND PIN, I1, I, n2167 PIN, I2, I, bootstrap/rx/sreg274<7>, , INV, TS432, TS431 PIN, O, O, n3310 END SYM, iic_bus_interface/iic/shift_reg_reg<5>, DFF, BLKNM=U1796 PIN, D, I, n2798, , TS130, TS129 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n461<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_iic_rd<2> END SYM, bootstrap/dma_cnt/iq_reg<8>, DFF, BLKNM=U2168 PIN, D, I, n3195 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<8> END SYM, bootstrap/wr_source/r11/q_reg<0>, DFF, BLKNM=U1591 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r11/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<4> END SYM, U3813, NAND PIN, I1, I, address_generator/int_addr<18> PIN, I2, I, n303, , INV PIN, O, O, n3440 END SYM, U3814, NAND PIN, I1, I, bs_addr<18> PIN, I2, I, n303 PIN, O, O, n3439 END SYM, U3815, NAND PIN, I1, I, n3440 PIN, I2, I, n3439 PIN, O, O, rcp_addr_tri/y12<18> END SYM, U3817, NAND PIN, I1, I, address_generator/int_addr<19> PIN, I2, I, n303, , INV PIN, O, O, n3443 END SYM, U3818, NAND PIN, I1, I, bs_addr<19> PIN, I2, I, n303 PIN, O, O, n3442 END SYM, U3819, NAND PIN, I1, I, n3443 PIN, I2, I, n3442 PIN, O, O, rcp_addr_tri/y12<19> END SYM, receiver_interface/dac/shift_reg_reg<2>, DFF, BLKNM=U1812 PIN, D, I, n2728, , TS128, TS127 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_rcv_rd<0> END SYM, internal_port/rcp_reg2_reg, DFF, BLKNM=U1593 PIN, D, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, C, I, n278, , INV, TS0 PIN, CE, I, internal_port/n89 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1367 END SYM, bootstrap/wr_source/r01/q_reg<1>, DFF, BLKNM=U1721 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r01/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<5> END SYM, bootstrap/dma_cnt/iq_reg<15>, DFF, BLKNM=U2028 PIN, D, I, n3160 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<12> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<15> END SYM, tod_receiver/tod_receiver/shift_reg_reg<15>, DFF, BLKNM=U1679 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<15> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_tod_rd<15> END SYM, bootstrap/rx/cycle_reg<3>, DFF, BLKNM=U2136 PIN, D, I, n3700 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n252<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/cycle<3> END SYM, fill_output/fill_clk_reg, DFF, BLKNM=U1669 PIN, D, I, address_generator/int_addr30<3>, , TS458, TS457, TS124, TS123, TS81 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fill_output/n124 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1409 END SYM, receiver_interface/sync/ale_select_reg, DFF, BLKNM=U2118 PIN, D, I, n3818, , TS122, TS121, TS120, TS119, TS118, TS117, TS116, TS115, TS114, TS113, TS112, TS111 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/sync/n72 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/sync/ale_select END SYM, U4309, NOR PIN, I1, I, receiver_interface/dac/clock314<0> PIN, I2, I, n3832 PIN, O, O, n2199 END SYM, U4308, NOR PIN, I1, I, n1840, , INV PIN, I2, I, receiver_interface/dac/clock<1> PIN, O, O, n3832 END SYM, U4306, NOR PIN, I1, I, n2211 PIN, I2, I, n2212 PIN, I3, I, n2213 PIN, I4, I, n1864 PIN, O, O, n1865 END SYM, U4305, AND PIN, I1, I, n1865 PIN, I2, I, n3830 PIN, O, O, n1845 END SYM, U4304, NAND PIN, I1, I, n2054, , INV PIN, I2, I, n2165 PIN, O, O, n3830 END SYM, U4302, AND PIN, I1, I, receiver_interface/dac/cycle<3> PIN, I2, I, receiver_interface/dac/cycle<2> PIN, I3, I, receiver_interface/dac/cycle<1>, , INV PIN, I4, I, receiver_interface/dac/cycle<0>, , INV PIN, O, O, n1934 END SYM, tod_receiver/tod_receiver/cycle_reg<0>, DFF, BLKNM=U1993 PIN, D, I, n3931 PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n207<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/cycle<0> END SYM, U4149, NAND PIN, I1, I, n3724 PIN, I2, I, n3723 PIN, O, O, n1875 END SYM, U4148, OR PIN, I1, I, rcp_addr_tri/y12<2> PIN, I2, I, rcp_addr_tri/y12<1> PIN, I3, I, rcp_addr_tri/y12<3> PIN, O, O, n3722 END SYM, U4147, NAND PIN, I1, I, rcp_addr_tri/y12<3> PIN, I2, I, rcp_addr_tri/y12<2> PIN, O, O, n3723 END SYM, U4146, XOR PIN, I1, I, n3722 PIN, I2, I, rcp_addr_tri/y12<4> PIN, O, O, n3724 END SYM, U4145, OR PIN, I1, I, n2223 PIN, I2, I, n3721 PIN, I3, I, n2224 PIN, O, O, rcp_ad_tri/y12<6> END SYM, U4144, AND PIN, I1, I, bootstrap/wr_source/r_hih<6> PIN, I2, I, n1874 PIN, O, O, n3721 END SYM, bootstrap/wr_source/r13/q_reg<0>, DFF, BLKNM=U1595 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r13/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<12> END SYM, U4143, OR PIN, I1, I, n2067 PIN, I2, I, n3720 PIN, I3, I, n2068 PIN, O, O, rcp_ad_tri/y12<4> END SYM, U4142, AND PIN, I1, I, bootstrap/wr_source/r_hih<4> PIN, I2, I, n1874 PIN, O, O, n3720 END SYM, U4141, OR PIN, I1, I, n2065 PIN, I2, I, n3719 PIN, I3, I, n2066 PIN, O, O, rcp_ad_tri/y12<3> END SYM, U4140, AND PIN, I1, I, bootstrap/wr_source/r_hih<3> PIN, I2, I, n1874 PIN, O, O, n3719 END SYM, U2492, NAND PIN, I1, I, n2021 PIN, I2, I, audio_interface/aud/clock<4>, , INV PIN, I3, I, audio_interface/aud/clock<2> PIN, O, O, n2320 END SYM, U2493, NAND PIN, I1, I, rcp_audio_rd<8> PIN, I2, I, n2320 PIN, O, O, audio_interface/aud/n394<4> END SYM, U2495, NAND PIN, I1, I, rcp_audio_rd<8> PIN, I2, I, n1880 PIN, I3, I, audio_interface/aud/read_cycle PIN, O, O, n2322 END SYM, U2496, NAND PIN, I1, I, n2322 PIN, I2, I, n2201, , INV PIN, O, O, audio_interface/aud/n413<0> END SYM, U2498, INV PIN, I, I, interrupt_source/divide<0> PIN, O, O, n2324 END SYM, U2499, AND PIN, I1, I, n2155 PIN, I2, I, n2165 PIN, I3, I, bs_addr<17> PIN, O, O, n1991 END SYM, U2651, NAND PIN, I1, I, audio_interface/aud/cycle<2> PIN, I2, I, n2171 PIN, I3, I, audio_interface/aud/cycle<3>, , INV PIN, O, O, n2441 END SYM, U2652, OR PIN, I1, I, n1878 PIN, I2, I, audio_interface/aud/cycle<3>, , INV PIN, O, O, n2440 END SYM, U2653, NAND PIN, I1, I, n2441 PIN, I2, I, n2440 PIN, O, O, n2442 END SYM, U2655, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<11> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2445 END SYM, U2656, NAND PIN, I1, I, address_generator/int_addr30<12>, , TS219 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2444 END SYM, U2657, NAND PIN, I1, I, n2445 PIN, I2, I, n2444 PIN, O, O, n2450 END SYM, U2659, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<14> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2448 END SYM, U2811, AND PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, iic_bus_interface/iic/cycle<0>, , INV PIN, O, O, n2574 END SYM, U2813, AND PIN, I1, I, bootstrap/tx_busy PIN, I2, I, bootstrap/tx/cycle<0>, , INV PIN, O, O, bootstrap/tx/cycle127<0> END SYM, fan_interface/pwm/clock_reg<6>, DFF, BLKNM=U1882 PIN, D, I, n3680 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/clock<6> END SYM, U2815, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<16>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2578 END SYM, U2816, NAND PIN, I1, I, synthesizer_interface/synth/shift_reg<17> PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2577 END SYM, U2817, NAND PIN, I1, I, n2578 PIN, I2, I, n2577 PIN, O, O, n2217 END SYM, U2819, AND PIN, I1, I, rcp_rcv_rd<10> PIN, I2, I, receiver_interface/dac/cycle<0>, , INV PIN, O, O, n2583 END SYM, bootstrap/tx/sreg_reg<8>, DFF, BLKNM=U2068 PIN, D, I, n2521, , TS110, TS109, TS108, TS107 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n152<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/sreg_Q150<8> END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<11>, DFF, BLKNM=U2148 PIN, D, I, n3528 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<11> END SYM, U3190, NAND PIN, I1, I, n2893 PIN, I2, I, n2892 PIN, O, O, n2897 END SYM, U3191, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<15> PIN, O, O, n2895 END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<8>, DFF, BLKNM=U1878 PIN, D, I, n3738 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<8> END SYM, bootstrap/rx/baud16_reg<0>, DFF, BLKNM=U1934 PIN, D, I, n3099 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/baud16<0> END SYM, U3192, NAND PIN, I1, I, bootstrap/wr_source/r_mid<15> PIN, I2, I, n2089 PIN, O, O, n2894 END SYM, U3193, NAND PIN, I1, I, n2895 PIN, I2, I, n2894 PIN, O, O, n2896 END SYM, U3194, OR PIN, I1, I, n2904 PIN, I2, I, n2903 PIN, O, O, rcp_ad_tri/y12<14> END SYM, U3196, NAND PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<15> PIN, I2, I, n303, , INV PIN, O, O, n2900 END SYM, U3197, NAND PIN, I1, I, bootstrap/wr_source/r_hih<14> PIN, I2, I, n1874 PIN, O, O, n2899 END SYM, U3198, NAND PIN, I1, I, n2900 PIN, I2, I, n2899 PIN, O, O, n2904 END SYM, U3199, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<14> PIN, O, O, n2902 END SYM, bootstrap/wr_control/wr_n_reg, DFF, BLKNM=U1750 PIN, D, I, n3437 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_control/n114 PIN, Q, O, rcp_wr_tri/y12 END SYM, U3350, AND PIN, I1, I, bs_addr<2> PIN, I2, I, n1993 PIN, O, O, n3034 END SYM, U3351, NOR PIN, I1, I, n2268 PIN, I2, I, n3035 PIN, O, O, n3036 END SYM, fan_interface/pwm/shift_reg_reg<17>, DFF, BLKNM=U1940 PIN, D, I, n2969 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/shift_reg_Q142<17> END SYM, U3352, OR PIN, I1, I, n3044 PIN, I2, I, n3043 PIN, O, O, rcp_ad_tri/y12<13> END SYM, U3354, NAND PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<14> PIN, I2, I, n303, , INV PIN, O, O, n3040 END SYM, U3355, NAND PIN, I1, I, bootstrap/wr_source/r_hih<13> PIN, I2, I, n1874 PIN, O, O, n3039 END SYM, U3356, NAND PIN, I1, I, n3040 PIN, I2, I, n3039 PIN, O, O, n3044 END SYM, receiver_interface/dac/cycle_reg<0>, DFF, BLKNM=U1822 PIN, D, I, n2583 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n310<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/dac/cycle<0> END SYM, U3357, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<13> PIN, O, O, n3042 END SYM, U3358, NAND PIN, I1, I, bootstrap/wr_source/r_mid<13> PIN, I2, I, n2089 PIN, O, O, n3041 END SYM, U3359, NAND PIN, I1, I, n3042 PIN, I2, I, n3041 PIN, O, O, n3043 END SYM, U3510, NAND PIN, I1, I, n3175 PIN, I2, I, n3174 PIN, O, O, n3176 END SYM, U3512, NAND PIN, I1, I, bootstrap/rx/sreg274<6> PIN, I2, I, n2212 PIN, O, O, n3179 END SYM, U3513, NAND PIN, I1, I, n3179 PIN, I2, I, n3182, , INV PIN, O, O, n3183 END SYM, U3514, NOR PIN, I1, I, n3180 PIN, I2, I, bs_addr<19> PIN, O, O, n3181 END SYM, U3515, AND PIN, I1, I, bs_addr<18> PIN, I2, I, n1991 PIN, O, O, n3180 END SYM, U3516, NOR PIN, I1, I, n2008 PIN, I2, I, n3181 PIN, O, O, n3182 END SYM, U3517, XOR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<2> PIN, I2, I, n1948 PIN, O, O, n3184 END SYM, U3518, AND PIN, I1, I, n2246 PIN, I2, I, n3184 PIN, O, O, n3185 END SYM, U3519, AND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<0> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<1> PIN, O, O, n1948 END SYM, antenna_interface/ant/shift_reg_reg<9>, DFF, BLKNM=U1756 PIN, D, I, n3426, , TS106, TS105 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<9> END SYM, bootstrap/tx/cycle_reg<0>, DFF, BLKNM=U1824 PIN, D, I, bootstrap/tx/cycle127<0> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n133<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/cycle<0> END SYM, bootstrap/rx/sreg_reg<2>, DFF, BLKNM=U1701 PIN, D, I, bootstrap/rx/sreg274<2> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n278<0> PIN, Q, O, bootstrap/rx/sreg274<1> END SYM, rtc_divide/clock_reg<1>, DFF, BLKNM=U1852 PIN, D, I, n3889 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rtc_divide/clock<1> END SYM, fan_interface/pwm/shift_reg_reg<0>, DFF, BLKNM=U1788 PIN, D, I, n2977, , TS104, TS103 PIN, C, I, n278, , INV, TS0 PIN, CE, I, fan_interface/pwm/n144<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1377 END SYM, U4449, AND PIN, I1, I, tod_receiver/tod_receiver/cycle<0> PIN, I2, I, tod_receiver/tod_receiver/cycle<3> PIN, I3, I, tod_receiver/tod_receiver/cycle<2> PIN, I4, I, tod_receiver/tod_receiver/cycle<1> PIN, O, O, tod_receiver/tod_receiver/stb192 END SYM, U4448, NOR PIN, I1, I, tod_receiver/tod_receiver/active, , INV PIN, I2, I, tod_receiver/tod_receiver/cycle<0> PIN, I3, I, tod_receiver/tod_receiver/stb192 PIN, O, O, n3931 END SYM, U4446, AND PIN, I1, I, antenna_interface/ant/int_busy PIN, I2, I, antenna_interface/ant/cycle<2> PIN, I3, I, n2080 PIN, I4, I, antenna_interface/ant/cycle<3>, , INV PIN, O, O, n3928 END SYM, U4444, OR PIN, I1, I, n3926 PIN, I2, I, n3928 PIN, O, O, n3929 END SYM, U4443, NOR PIN, I1, I, antenna_interface/ant/cycle<3>, , INV PIN, I2, I, n1843 PIN, O, O, n3926 END SYM, U4441, AND PIN, I1, I, n2234 PIN, I2, I, n2072, , INV PIN, O, O, n1872 END SYM, U4288, AND PIN, I1, I, n2113 PIN, I2, I, n1981 PIN, I3, I, n1980 PIN, O, O, bootstrap/wr_source/r01/n51<0> END SYM, U4287, AND PIN, I1, I, n2151 PIN, I2, I, fan_interface/pwm/clock<6> PIN, I3, I, fan_interface/pwm/clock<5> PIN, O, O, n2153 END SYM, U4286, AND PIN, I1, I, fan_interface/pwm/clock<7> PIN, I2, I, fan_interface/pwm/clock<8> PIN, I3, I, n2153 PIN, O, O, n2282 END SYM, U4285, AND PIN, I1, I, fan_interface/pwm/clock<2> PIN, I2, I, fan_interface/pwm/clock<1> PIN, I3, I, fan_interface/pwm/clock<0> PIN, O, O, n2010 END SYM, U4284, AND PIN, I1, I, fan_interface/pwm/clock<3> PIN, I2, I, fan_interface/pwm/clock<4> PIN, I3, I, n2010 PIN, O, O, n2151 END SYM, U4283, AND PIN, I1, I, bootstrap/n53 PIN, I2, I, n1417 PIN, I3, I, bootstrap/decode/address<5>, , INV PIN, I4, I, bootstrap/decode/address<4>, , INV PIN, O, O, n1980 END SYM, U4280, AND PIN, I1, I, n1980 PIN, I2, I, bootstrap/rx/sreg274<2>, , INV PIN, I3, I, bootstrap/rx/sreg274<1> PIN, O, O, bootstrap/wr_control/cycle_rst_n92 END SYM, antenna_interface/ant/clock_reg<3>, DFF, BLKNM=U1916 PIN, D, I, n3398 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/clock<3> END SYM, synthesizer_interface/synth/int_busy_reg, DFF, BLKNM=U1603 PIN, D, I, synthesizer_interface/synth/int_busy303 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n308 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_sts2_rd END SYM, U3961, NAND PIN, I1, I, address_generator/int_addr<11> PIN, I2, I, n303, , INV PIN, O, O, n3566 END SYM, U3962, NAND PIN, I1, I, bs_addr<11> PIN, I2, I, n303 PIN, O, O, n3565 END SYM, U3963, NAND PIN, I1, I, n3566 PIN, I2, I, n3565 PIN, O, O, rcp_addr_tri/y12<11> END SYM, U3965, NAND PIN, I1, I, address_generator/int_addr<12> PIN, I2, I, n303, , INV PIN, O, O, n3569 END SYM, U3966, NAND PIN, I1, I, bs_addr<12> PIN, I2, I, n303 PIN, O, O, n3568 END SYM, U2510, NOR PIN, I1, I, rcp_addr_tri/y12<4> PIN, I2, I, rcp_addr_tri/y12<3> PIN, I3, I, rcp_addr_tri/y12<1> PIN, I4, I, rcp_addr_tri/y12<2>, , INV PIN, O, O, n1833 END SYM, U3967, NAND PIN, I1, I, n3569 PIN, I2, I, n3568 PIN, O, O, rcp_addr_tri/y12<12> END SYM, U2512, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<6> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2331 END SYM, U3969, NAND PIN, I1, I, address_generator/int_addr<13> PIN, I2, I, n303, , INV PIN, O, O, n3572 END SYM, U2513, NAND PIN, I1, I, address_generator/int_addr30<7>, , TS224 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2330 END SYM, U2514, NAND PIN, I1, I, n2331 PIN, I2, I, n2330 PIN, O, O, n2285 END SYM, U2516, NAND PIN, I1, I, audio_interface/aud/comm_sreg_Q421<1> PIN, I2, I, audio_interface/aud/busy360, , INV PIN, O, O, n2334 END SYM, U2517, NAND PIN, I1, I, address_generator/int_addr30<10>, , TS131 PIN, I2, I, audio_interface/aud/busy360 PIN, O, O, n2333 END SYM, U2518, NAND PIN, I1, I, n2334 PIN, I2, I, n2333 PIN, O, O, n2335 END SYM, U3050, AND PIN, I1, I, internal_port/sync/wr_n_latch PIN, I2, I, n280, , INV PIN, I3, I, internal_port/sync/ale_select PIN, O, O, n2772 END SYM, bootstrap/tx/baud_reg<3>, DFF, BLKNM=U1870 PIN, D, I, n3766 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/baud<3> END SYM, U3052, AND PIN, I1, I, tod_receiver/sync/wr_n_latch PIN, I2, I, n280, , INV PIN, I3, I, tod_receiver/sync/ale_select PIN, O, O, n2776 END SYM, U3055, AND PIN, I1, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I2, I, n2185 PIN, I3, I, address_generator/int_addr30<2>, , INV, TS58, TS57, TS46, TS3, TS2 PIN, I4, I, address_generator/int_addr30<4>, , INV, TS98, TS29, TS28 PIN, O, O, internal_port/sync/ale_select67 END SYM, U3057, AND PIN, I1, I, bootstrap/decode/address<4> PIN, I2, I, n1940 PIN, I3, I, n1941 PIN, I4, I, bootstrap/decode/address<5>, , INV PIN, O, O, bootstrap/wr_source/r12/n51<0> END SYM, U3210, XOR PIN, I1, I, receiver_interface/dac/cycle<2> PIN, I2, I, n2912 PIN, O, O, n2913 END SYM, U3211, AND PIN, I1, I, receiver_interface/dac/cycle<0> PIN, I2, I, receiver_interface/dac/cycle<1> PIN, O, O, n2912 END SYM, U3212, AND PIN, I1, I, rcp_rcv_rd<10> PIN, I2, I, n2913 PIN, O, O, n2914 END SYM, U3213, XOR PIN, I1, I, synthesizer_interface/synth/cycle<2> PIN, I2, I, n2916 PIN, O, O, n2917 END SYM, U3214, AND PIN, I1, I, synthesizer_interface/synth/cycle<1> PIN, I2, I, synthesizer_interface/synth/cycle<0> PIN, O, O, n2916 END SYM, U3215, AND PIN, I1, I, rcp_sts2_rd PIN, I2, I, n2917 PIN, O, O, n2920 END SYM, U3217, AND PIN, I1, I, rcp_sts2_rd PIN, I2, I, synthesizer_interface/synth/cycle<0>, , INV PIN, O, O, n2919 END SYM, U3219, XOR PIN, I1, I, receiver_interface/dac/clock<1> PIN, I2, I, receiver_interface/dac/clock<0> PIN, O, O, n2922 END SYM, synthesizer_interface/synth/shift_reg_reg<8>, DFF, BLKNM=U1908 PIN, D, I, n3591, , TS102, TS101 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<8> END SYM, synthesizer_interface/synth/shift_reg_reg<15>, DFF, BLKNM=U1896 PIN, D, I, n3500, , TS100, TS99 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<15> END SYM, U2961, AND PIN, I1, I, receiver_interface/dac/clock<0> PIN, I2, I, receiver_interface/dac/clock<3> PIN, I3, I, receiver_interface/dac/clock<2> PIN, I4, I, receiver_interface/dac/clock<1>, , INV PIN, O, O, receiver_interface/dac/ser_clk258 END SYM, U2964, NAND PIN, I1, I, rcp_rcv_rd<5> PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, n2698 END SYM, U2965, NAND PIN, I1, I, address_generator/int_addr30<6>, , TS191 PIN, I2, I, receiver_interface/dac/busy285 PIN, O, O, n2697 END SYM, U2966, NAND PIN, I1, I, n2698 PIN, I2, I, n2697 PIN, O, O, n2291 END SYM, U2968, XOR PIN, I1, I, tod_receiver/tod_receiver/cycle<0> PIN, I2, I, tod_receiver/tod_receiver/cycle<1> PIN, O, O, n2700 END SYM, U2969, AND PIN, I1, I, n2700 PIN, I2, I, tod_receiver/tod_receiver/stb192, , INV PIN, I3, I, tod_receiver/tod_receiver/active PIN, O, O, n2701 END SYM, antenna_interface/ant/shift_reg_reg<14>, DFF, BLKNM=U1840 PIN, D, I, n2367, , TS97, TS96 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/shift_reg_Q276<14> END SYM, audio_interface/aud/read_cycle_reg, DFF, BLKNM=U1719 PIN, D, I, address_generator/int_addr30<15>, , TS353, TS95, TS94 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/busy360 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/read_cycle END SYM, bootstrap/wr_source/r03/q_reg<0>, DFF, BLKNM=U1597 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r03/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<12> END SYM, antenna_interface/ant/cycle_reg<2>, DFF, BLKNM=U1832 PIN, D, I, n2464 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n268<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/cycle<2> END SYM, U3661, OR PIN, I1, I, n2101 PIN, I2, I, n2245 PIN, I3, I, n2102 PIN, O, O, n3309 END SYM, U3662, NAND PIN, I1, I, n3309 PIN, I2, I, fan_interface/load, , INV PIN, O, O, fan_interface/pwm/n144<0> END SYM, U3663, NOR PIN, I1, I, n2101 PIN, I2, I, n2245 PIN, I3, I, n2102 PIN, O, O, n2100 END SYM, U3664, OR PIN, I1, I, fan_interface/pwm/clock<1> PIN, I2, I, fan_interface/pwm/clock<2> PIN, I3, I, fan_interface/pwm/clock<5> PIN, I4, I, fan_interface/pwm/clock<8> PIN, O, O, n2245 END SYM, U3665, XOR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<12> PIN, I2, I, n2252 PIN, O, O, n3311 END SYM, U3666, AND PIN, I1, I, n2246 PIN, I2, I, n3311 PIN, O, O, n3312 END SYM, U3667, AND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<10> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<11> PIN, I3, I, n2013 PIN, I4, I, tod_receiver/tod_receiver/manchester_decoder/timeout<9> PIN, O, O, n2252 END SYM, U3668, XOR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<5> PIN, I2, I, n1949 PIN, O, O, n3313 END SYM, U3669, AND PIN, I1, I, n2246 PIN, I2, I, n3313 PIN, O, O, n3314 END SYM, iic_bus_interface/iic/shift_reg_reg<4>, DFF, BLKNM=U1796 PIN, D, I, n2797, , TS93, TS92 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n461<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_iic_rd<1> END SYM, bootstrap/dma_cnt/iq_reg<7>, DFF, BLKNM=U2152 PIN, D, I, n3358 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<7> END SYM, U3821, NAND PIN, I1, I, address_generator/int_addr<1> PIN, I2, I, n303, , INV PIN, O, O, n3446 END SYM, U3822, NAND PIN, I1, I, bs_addr<1> PIN, I2, I, n303 PIN, O, O, n3445 END SYM, U3823, NAND PIN, I1, I, n3446 PIN, I2, I, n3445 PIN, O, O, rcp_addr_tri/y12<1> END SYM, bootstrap/wr_source/r11/q_reg<1>, DFF, BLKNM=U1599 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r11/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<5> END SYM, U3825, NAND PIN, I1, I, address_generator/int_addr<2> PIN, I2, I, n303, , INV PIN, O, O, n3449 END SYM, U3826, NAND PIN, I1, I, bs_addr<2> PIN, I2, I, n303 PIN, O, O, n3448 END SYM, U3827, NAND PIN, I1, I, n3449 PIN, I2, I, n3448 PIN, O, O, rcp_addr_tri/y12<2> END SYM, rtc_divide/clk_reg, DFF, BLKNM=U2064 PIN, D, I, rtc_divide/clk111 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1360 END SYM, U3829, NAND PIN, I1, I, address_generator/int_addr<3> PIN, I2, I, n303, , INV PIN, O, O, n3452 END SYM, receiver_interface/dac/shift_reg_reg<1>, DFF, BLKNM=U1529 PIN, D, I, n2556 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/dac/shift_reg<1> END SYM, internal_port/rcp_reg2_reg, DFF, BLKNM=U1601 PIN, D, I, address_generator/int_addr30<0>, , TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, C, I, n278, , INV, TS0 PIN, CE, I, internal_port/n89 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1368 END SYM, bootstrap/wr_source/r01/q_reg<0>, DFF, BLKNM=U1721 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r01/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_low<4> END SYM, bootstrap/dma_cnt/iq_reg<16>, DFF, BLKNM=U2158 PIN, D, I, n3330 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<16> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<16> END SYM, tod_receiver/tod_receiver/shift_reg_reg<14>, DFF, BLKNM=U1681 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<14> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<15> END SYM, bootstrap/rx/cycle_reg<2>, DFF, BLKNM=U1515 PIN, D, I, n2667 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n252<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/cycle<2> END SYM, U4139, OR PIN, I1, I, n1908 PIN, I2, I, n3718 PIN, I3, I, n1909 PIN, O, O, rcp_ad_tri/y12<1> END SYM, U4138, AND PIN, I1, I, bootstrap/wr_source/r_hih<1> PIN, I2, I, n1874 PIN, O, O, n3718 END SYM, U4137, AND PIN, I1, I, bootstrap/wr_control/cycle_rst_n PIN, I2, I, n3716 PIN, O, O, n3717 END SYM, U4136, AND PIN, I1, I, bootstrap/wr_control/cycle<0> PIN, I2, I, bootstrap/wr_control/cycle<1> PIN, O, O, n3715 END SYM, U4135, XOR PIN, I1, I, bootstrap/wr_control/cycle<2> PIN, I2, I, n3715 PIN, O, O, n3716 END SYM, U4134, NAND PIN, I1, I, n3714 PIN, I2, I, n3713 PIN, I3, I, n3712 PIN, O, O, n1414 END SYM, bootstrap/wr_source/r13/q_reg<1>, DFF, BLKNM=U1613 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r13/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<13> END SYM, U4133, OR PIN, I1, I, rcp_addr_tri/y12<16> PIN, I2, I, rcp_addr_tri/y12<17> PIN, O, O, n3711 END SYM, U4132, OR PIN, I1, I, rcp_addr_tri/y12<18>, , INV PIN, I2, I, rcp_addr_tri/y12<19> PIN, O, O, n3712 END SYM, U4131, NAND PIN, I1, I, n3711 PIN, I2, I, rcp_addr_tri/y12<18>, , INV PIN, O, O, n3713 END SYM, U4130, OR PIN, I1, I, rcp_addr_tri/y12<19>, , INV PIN, I2, I, n3711 PIN, O, O, n3714 END SYM, U2660, NAND PIN, I1, I, address_generator/int_addr30<15>, , TS353, TS95, TS94 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2447 END SYM, U2661, NAND PIN, I1, I, n2448 PIN, I2, I, n2447 PIN, O, O, n2449 END SYM, U2663, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<9> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2453 END SYM, U2664, NAND PIN, I1, I, address_generator/int_addr30<10>, , TS131 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2452 END SYM, U2665, NAND PIN, I1, I, n2453 PIN, I2, I, n2452 PIN, O, O, n2458 END SYM, U2667, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<12> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2456 END SYM, U2668, NAND PIN, I1, I, address_generator/int_addr30<13>, , TS246 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2455 END SYM, U2669, NAND PIN, I1, I, n2456 PIN, I2, I, n2455 PIN, O, O, n2457 END SYM, iic_bus_interface/iic/read_cycle_reg, DFF, BLKNM=U1615 PIN, D, I, address_generator/int_addr30<11>, , TS185, TS89, TS88 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/busy427 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/read_cycle END SYM, U2821, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<10>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2582 END SYM, U2822, NAND PIN, I1, I, address_generator/int_addr30<11>, , TS185, TS89, TS88 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2581 END SYM, U2823, NAND PIN, I1, I, n2582 PIN, I2, I, n2581 PIN, O, O, n1906 END SYM, fan_interface/pwm/clock_reg<7>, DFF, BLKNM=U1884 PIN, D, I, n3675 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/clock<7> END SYM, U2825, OR PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<0> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/sdai_2 PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/sdai_2247, , INV PIN, O, O, n2586 END SYM, U2826, NAND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/sdai_2 PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<0> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/sdai_2247, , INV PIN, O, O, n2585 END SYM, U2827, NAND PIN, I1, I, n2586 PIN, I2, I, n2585 PIN, O, O, n2590 END SYM, U2828, XOR PIN, I1, I, tod_receiver/tod_receiver/cycle<2> PIN, I2, I, n2587 PIN, O, O, n2588 END SYM, U2829, AND PIN, I1, I, tod_receiver/tod_receiver/cycle<0> PIN, I2, I, tod_receiver/tod_receiver/cycle<1> PIN, O, O, n2587 END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<10>, DFF, BLKNM=U1880 PIN, D, I, n3685 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<10> END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<7>, DFF, BLKNM=U1880 PIN, D, I, n3686 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<7> END SYM, U3360, OR PIN, I1, I, n3051 PIN, I2, I, n3050 PIN, O, O, rcp_ad_tri/y12<12> END SYM, U3362, NAND PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<13> PIN, I2, I, n303, , INV PIN, O, O, n3047 END SYM, U3363, NAND PIN, I1, I, bootstrap/wr_source/r_hih<12> PIN, I2, I, n1874 PIN, O, O, n3046 END SYM, U3364, NAND PIN, I1, I, n3047 PIN, I2, I, n3046 PIN, O, O, n3051 END SYM, U3365, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<12> PIN, O, O, n3049 END SYM, U3366, NAND PIN, I1, I, bootstrap/wr_source/r_mid<12> PIN, I2, I, n2089 PIN, O, O, n3048 END SYM, U3367, NAND PIN, I1, I, n3049 PIN, I2, I, n3048 PIN, O, O, n3050 END SYM, U3368, OR PIN, I1, I, n3058 PIN, I2, I, n3057 PIN, O, O, rcp_ad_tri/y12<11> END SYM, U3521, NAND PIN, I1, I, bootstrap/incr_en48 PIN, I2, I, n1866 PIN, O, O, n3187 END SYM, U3522, NAND PIN, I1, I, n3187 PIN, I2, I, n3194, , INV PIN, O, O, n3195 END SYM, audio_interface/sync/ale_latch_reg, DFF, BLKNM=U1687 PIN, D, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/sync/n72 END SYM, U3525, NAND PIN, I1, I, n2054 PIN, I2, I, n2165 PIN, I3, I, bs_addr<8>, , INV PIN, O, O, n3193 END SYM, U3526, OR PIN, I1, I, bs_addr<8>, , INV PIN, I2, I, n3189 PIN, O, O, n3192 END SYM, U3527, AND PIN, I1, I, n1865 PIN, I2, I, n3191 PIN, O, O, n3189 END SYM, U3528, NAND PIN, I1, I, n2165 PIN, I2, I, n2054, , INV PIN, O, O, n3191 END SYM, U3529, NAND PIN, I1, I, n3193 PIN, I2, I, n3192 PIN, O, O, n3194 END SYM, bootstrap/tx/cycle_reg<1>, DFF, BLKNM=U1989 PIN, D, I, n2401 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n133<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/cycle<1> END SYM, bootstrap/rx/sreg_reg<3>, DFF, BLKNM=U1701 PIN, D, I, bootstrap/incr_en48 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n278<0> PIN, Q, O, bootstrap/rx/sreg274<2> END SYM, rtc_divide/clock_reg<2>, DFF, BLKNM=U1850 PIN, D, I, n3898 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rtc_divide/clock<2> END SYM, fan_interface/sync/wren_reg, DFF, BLKNM=U1958 PIN, D, I, n2762, , TS86 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/load END SYM, tod_receiver/tod_receiver/manchester_decoder/to_dff_reg, DFF, BLKNM=U1987 PIN, D, I, n2290 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/n215 END SYM, U4439, NOR PIN, I1, I, rcp_iic_rd<8>, , INV PIN, I2, I, iic_bus_interface/iic/clock<0> PIN, I3, I, n1872 PIN, O, O, n3924 END SYM, U4437, AND PIN, I1, I, bootstrap/rd_sel PIN, I2, I, bootstrap/rd_control/cycle<0> PIN, I3, I, bootstrap/rd_control/cycle<1> PIN, I4, I, bootstrap/rd_control/cycle<2> PIN, O, O, n1944 END SYM, U4436, AND PIN, I1, I, bootstrap/incr_en PIN, I2, I, n3920 PIN, O, O, n3921 END SYM, U4435, OR PIN, I1, I, n1945 PIN, I2, I, n1944 PIN, O, O, n3920 END SYM, U4434, AND PIN, I1, I, bs_addr<2> PIN, I2, I, bs_addr<1> PIN, I3, I, bs_addr<3> PIN, I4, I, bs_addr<0> PIN, O, O, n2156 END SYM, U4433, AND PIN, I1, I, bs_addr<4> PIN, I2, I, n2156 PIN, I3, I, bs_addr<5> PIN, O, O, n2208 END SYM, U4432, AND PIN, I1, I, bs_addr<14> PIN, I2, I, n1889 PIN, I3, I, bs_addr<13> PIN, I4, I, bs_addr<12> PIN, O, O, n2154 END SYM, U4431, AND PIN, I1, I, bs_addr<16> PIN, I2, I, n2154 PIN, I3, I, bs_addr<15> PIN, O, O, n2155 END SYM, U4430, NOR PIN, I1, I, bootstrap/rx/sreg274<0> PIN, I2, I, bootstrap/rx_data<0> PIN, O, O, n2055 END SYM, U4278, OR PIN, I1, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I2, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I3, I, address_generator/int_addr30<15>, , TS353, TS95, TS94 PIN, I4, I, n279 PIN, O, O, n1979 END SYM, U4277, NOR PIN, I1, I, address_generator/int_addr30<3>, , INV, TS458, TS457, TS124, TS123, TS81 PIN, I2, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I3, I, n1979 PIN, O, O, n3818 END SYM, U4275, OR PIN, I1, I, n3814 PIN, I2, I, n1937 PIN, O, O, n3815 END SYM, U4274, AND PIN, I1, I, bootstrap/rx/baud16<3> PIN, I2, I, n3813 PIN, O, O, n3814 END SYM, U4273, NAND PIN, I1, I, n1938 PIN, I2, I, bootstrap/rx/baud16<2> PIN, O, O, n3813 END SYM, U4272, NAND PIN, I1, I, n3812 PIN, I2, I, n3811 PIN, O, O, n3816 END SYM, U4271, NAND PIN, I1, I, bootstrap/rx/baud16<0> PIN, I2, I, bootstrap/rx/baud16<1>, , INV PIN, O, O, n3811 END SYM, U4270, OR PIN, I1, I, bootstrap/rx/baud16<0> PIN, I2, I, n2167 PIN, I3, I, bootstrap/rx/baud16<1>, , INV PIN, O, O, n3812 END SYM, antenna_interface/ant/clock_reg<2>, DFF, BLKNM=U1914 PIN, D, I, n3406 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/clock<2> END SYM, U3970, NAND PIN, I1, I, bs_addr<13> PIN, I2, I, n303 PIN, O, O, n3571 END SYM, U3971, NAND PIN, I1, I, n3572 PIN, I2, I, n3571 PIN, O, O, rcp_addr_tri/y12<13> END SYM, U3973, NAND PIN, I1, I, address_generator/int_addr<14> PIN, I2, I, n303, , INV PIN, O, O, n3575 END SYM, U3974, NAND PIN, I1, I, bs_addr<14> PIN, I2, I, n303 PIN, O, O, n3574 END SYM, U3975, NAND PIN, I1, I, n3575 PIN, I2, I, n3574 PIN, O, O, rcp_addr_tri/y12<14> END SYM, U2520, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<4> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2338 END SYM, U3977, NAND PIN, I1, I, address_generator/int_addr<15> PIN, I2, I, n303, , INV PIN, O, O, n3578 END SYM, U2521, NAND PIN, I1, I, address_generator/int_addr30<5>, , TS134, TS26, TS25 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2337 END SYM, U3978, NAND PIN, I1, I, bs_addr<15> PIN, I2, I, n303 PIN, O, O, n3577 END SYM, U2522, NAND PIN, I1, I, n2338 PIN, I2, I, n2337 PIN, O, O, n2343 END SYM, U3979, NAND PIN, I1, I, n3578 PIN, I2, I, n3577 PIN, O, O, rcp_addr_tri/y12<15> END SYM, U2524, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<7> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2341 END SYM, U2525, NAND PIN, I1, I, address_generator/int_addr30<8>, , TS261 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2340 END SYM, U2526, NAND PIN, I1, I, n2341 PIN, I2, I, n2340 PIN, O, O, n2342 END SYM, U2528, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<2> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2346 END SYM, U2529, NAND PIN, I1, I, address_generator/int_addr30<3>, , TS458, TS457, TS124, TS123, TS81 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2345 END SYM, U3060, AND PIN, I1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I2, I, n2185 PIN, I3, I, address_generator/int_addr30<1>, , INV, TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I4, I, address_generator/int_addr30<2>, , INV, TS58, TS57, TS46, TS3, TS2 PIN, O, O, n2780 END SYM, bootstrap/tx/baud_reg<4>, DFF, BLKNM=U1868 PIN, D, I, n3793 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/baud<4> END SYM, U3062, NAND PIN, I1, I, rcp_iic_rd<3> PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2783 END SYM, U3063, NAND PIN, I1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, n2782 END SYM, U3064, NAND PIN, I1, I, n2783 PIN, I2, I, n2782 PIN, O, O, n2789 END SYM, U3066, NAND PIN, I1, I, rcp_iic_rd<2> PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2786 END SYM, U3067, NAND PIN, I1, I, address_generator/int_addr30<3>, , TS458, TS457, TS124, TS123, TS81 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, n2785 END SYM, U3068, NAND PIN, I1, I, n2786 PIN, I2, I, n2785 PIN, O, O, n2788 END SYM, U3220, AND PIN, I1, I, n2922 PIN, I2, I, receiver_interface/dac/ser_clk258, , INV PIN, I3, I, rcp_rcv_rd<10> PIN, O, O, n2927 END SYM, U3222, NAND PIN, I1, I, synthesizer_interface/synth/cycle<2> PIN, I2, I, n2081 PIN, I3, I, synthesizer_interface/synth/cycle<3>, , INV PIN, O, O, n2925 END SYM, U3223, OR PIN, I1, I, n1879 PIN, I2, I, synthesizer_interface/synth/cycle<3>, , INV PIN, O, O, n2924 END SYM, U3224, NAND PIN, I1, I, n2925 PIN, I2, I, n2924 PIN, O, O, n2926 END SYM, U3226, NAND PIN, I1, I, rcp_iic_rd<5> PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2930 END SYM, U3227, NAND PIN, I1, I, address_generator/int_addr30<6>, , TS191 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, n2929 END SYM, U3228, NAND PIN, I1, I, n2930 PIN, I2, I, n2929 PIN, O, O, n2936 END SYM, synthesizer_interface/synth/shift_reg_reg<7>, DFF, BLKNM=U1587 PIN, D, I, n2289, , TS85, TS84 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<7> END SYM, synthesizer_interface/synth/shift_reg_reg<16>, DFF, BLKNM=U1898 PIN, D, I, n3491, , TS83, TS82 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<16> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<16> END SYM, U2971, NAND PIN, I1, I, rcp_rcv_rd<3> PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, n2704 END SYM, U2972, NAND PIN, I1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I2, I, receiver_interface/dac/busy285 PIN, O, O, n2703 END SYM, U2973, NAND PIN, I1, I, n2704 PIN, I2, I, n2703 PIN, O, O, n2710 END SYM, U2975, NAND PIN, I1, I, rcp_rcv_rd<6> PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, n2707 END SYM, U2976, NAND PIN, I1, I, address_generator/int_addr30<7>, , TS224 PIN, I2, I, receiver_interface/dac/busy285 PIN, O, O, n2706 END SYM, U2977, NAND PIN, I1, I, n2707 PIN, I2, I, n2706 PIN, O, O, n2709 END SYM, antenna_interface/ant/shift_reg_reg<15>, DFF, BLKNM=U1838 PIN, D, I, n2449, , TS80, TS79 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n278<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1403 END SYM, antenna_interface/sync/wren_reg, DFF, BLKNM=U1958 PIN, D, I, n2763, , TS78 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/int_busy243 END SYM, antenna_interface/ant/cycle_reg<3>, DFF, BLKNM=U1995 PIN, D, I, n3929 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n268<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/cycle<3> END SYM, U3670, AND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<2> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<4> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<3> PIN, I4, I, n1948 PIN, O, O, n1949 END SYM, U3671, XOR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<3> PIN, I2, I, n2253 PIN, O, O, n3315 END SYM, U3672, AND PIN, I1, I, n2246 PIN, I2, I, n3315 PIN, O, O, n3316 END SYM, U3673, AND PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<2> PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<1> PIN, I3, I, tod_receiver/tod_receiver/manchester_decoder/timeout<0> PIN, O, O, n2253 END SYM, U3676, NAND PIN, I1, I, n3321, , INV PIN, I2, I, n3317 PIN, O, O, n3322 END SYM, U3679, NAND PIN, I1, I, n3320 PIN, I2, I, n3319 PIN, O, O, n3321 END SYM, iic_bus_interface/iic/shift_reg_reg<3>, DFF, BLKNM=U1794 PIN, D, I, n2807, , TS77, TS76 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n461<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_iic_rd<0> END SYM, bootstrap/dma_cnt/iq_reg<6>, DFF, BLKNM=U2166 PIN, D, I, n3205 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<6> END SYM, U3830, NAND PIN, I1, I, bs_addr<3> PIN, I2, I, n303 PIN, O, O, n3451 END SYM, U3831, NAND PIN, I1, I, n3452 PIN, I2, I, n3451 PIN, O, O, rcp_addr_tri/y12<3> END SYM, U3833, NAND PIN, I1, I, address_generator/int_addr<4> PIN, I2, I, n303, , INV PIN, O, O, n3455 END SYM, bootstrap/wr_source/r11/q_reg<2>, DFF, BLKNM=U1687 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r11/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<6> END SYM, U3834, NAND PIN, I1, I, bs_addr<4> PIN, I2, I, n303 PIN, O, O, n3454 END SYM, U3835, NAND PIN, I1, I, n3455 PIN, I2, I, n3454 PIN, O, O, rcp_addr_tri/y12<4> END SYM, U3837, NAND PIN, I1, I, address_generator/int_addr<5> PIN, I2, I, n303, , INV PIN, O, O, n3458 END SYM, U3838, NAND PIN, I1, I, bs_addr<5> PIN, I2, I, n303 PIN, O, O, n3457 END SYM, U3839, NAND PIN, I1, I, n3458 PIN, I2, I, n3457 PIN, O, O, rcp_addr_tri/y12<5> END SYM, receiver_interface/dac/shift_reg_reg<0>, DFF, BLKNM=U1808 PIN, D, I, n2910, , TS75, TS74 PIN, C, I, n278, , INV, TS0 PIN, CE, I, receiver_interface/dac/n300<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, receiver_interface/dac/shift_reg<0> END SYM, iic_bus_interface/sync/ale_select_reg, DFF, BLKNM=U1946 PIN, D, I, n2961, , TS73, TS72, TS71, TS70, TS69, TS68, TS67, TS66, TS65, TS64, TS63, TS62 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/sync/n72 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/sync/ale_select END SYM, bootstrap/dma_cnt/iq_reg<17>, DFF, BLKNM=U2024 PIN, D, I, n3177 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<16> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<17> END SYM, interrupt_source/q_reg<0>, DFF, BLKNM=U1707 PIN, D, I, interrupt_source/q130<0>, , TS61, TS60 PIN, C, I, n278, , INV, TS0 PIN, CE, I, interrupt_source/n131<0> PIN, Q, O, interrupt_source/q130<1> END SYM, tod_receiver/tod_receiver/shift_reg_reg<13>, DFF, BLKNM=U1683 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<13> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<14> END SYM, bootstrap/rx/cycle_reg<1>, DFF, BLKNM=U1984 PIN, D, I, n2408 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n252<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/cycle<1> END SYM, tod_receiver/tod_receiver/active_reg, DFF, BLKNM=U1635 PIN, D, I, tod_receiver/tod_receiver/active174 PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n179 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/active END SYM, audio_interface/sync/wr_n_latch_reg, DFF, BLKNM=U1657 PIN, D, I, antenna_interface/sync/wr_n_latch76, , TS439, TS416, TS389, TS285, TS227, TS203, TS169, TS59, TS52, TS51, TS30 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/sync/wr_n_latch END SYM, U4127, INV PIN, I, I, n280 PIN, O, O, antenna_interface/sync/wr_n_latch76 END SYM, U4125, INV PIN, I, I, rcp_rcv_rd<10> PIN, O, O, n3708 END SYM, U4124, INV PIN, I, I, synthesizer_interface/synth/clock<4> PIN, O, O, n3706 END SYM, bootstrap/wr_source/r13/q_reg<2>, DFF, BLKNM=U1637 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r13/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<14> END SYM, U4123, AND PIN, I1, I, bs_addr<10> PIN, I2, I, bs_addr<11> PIN, I3, I, n2052 PIN, O, O, n1889 END SYM, U4122, AND PIN, I1, I, bs_addr<13> PIN, I2, I, bs_addr<12> PIN, I3, I, n1889 PIN, O, O, n2051 END SYM, U4121, AND PIN, I1, I, bootstrap/rx/sreg274<1> PIN, I2, I, bootstrap/rx/sreg274<2> PIN, I3, I, n1417 PIN, I4, I, n2129 PIN, O, O, n2130 END SYM, U4120, AND PIN, I1, I, bootstrap/incr_en48 PIN, I2, I, n3704 PIN, O, O, n3705 END SYM, U2671, AND PIN, I1, I, antenna_interface/ant/int_busy PIN, I2, I, antenna_interface/ant/cycle<0>, , INV PIN, O, O, n2460 END SYM, U2672, NOR PIN, I1, I, bootstrap/rx/sreg274<1> PIN, I2, I, bootstrap/rx/sreg274<2> PIN, O, O, n1981 END SYM, U2673, XOR PIN, I1, I, antenna_interface/ant/cycle<0> PIN, I2, I, antenna_interface/ant/cycle<1> PIN, O, O, n2461 END SYM, U2674, AND PIN, I1, I, antenna_interface/ant/int_busy PIN, I2, I, n2461 PIN, O, O, n2465 END SYM, U2675, XOR PIN, I1, I, antenna_interface/ant/cycle<2> PIN, I2, I, n2462 PIN, O, O, n2463 END SYM, U2676, AND PIN, I1, I, antenna_interface/ant/cycle<0> PIN, I2, I, antenna_interface/ant/cycle<1> PIN, O, O, n2462 END SYM, U2677, AND PIN, I1, I, antenna_interface/ant/int_busy PIN, I2, I, n2463 PIN, O, O, n2464 END SYM, U2679, XOR PIN, I1, I, antenna_interface/ant/clock<1> PIN, I2, I, antenna_interface/ant/clock<0> PIN, O, O, n2467 END SYM, U2830, AND PIN, I1, I, n2188 PIN, I2, I, n2588 PIN, O, O, n2589 END SYM, U2832, NAND PIN, I1, I, bs_addr<12>, , INV PIN, I2, I, n2165 PIN, O, O, n2592 END SYM, U2833, AND PIN, I1, I, n2193 PIN, I2, I, n2592 PIN, I3, I, bs_addr<13> PIN, O, O, n2103 END SYM, fan_interface/pwm/clock_reg<8>, DFF, BLKNM=U1748 PIN, D, I, n3628 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/clock<8> END SYM, U2835, NAND PIN, I1, I, n1889 PIN, I2, I, n2165 PIN, I3, I, bs_addr<12> PIN, O, O, n2593 END SYM, U2836, AND PIN, I1, I, bs_addr<13>, , INV PIN, I2, I, n2593 PIN, O, O, n2104 END SYM, U2838, NAND PIN, I1, I, bs_addr<8>, , INV PIN, I2, I, n2165 PIN, O, O, n2596 END SYM, U2839, AND PIN, I1, I, n1845 PIN, I2, I, n2596 PIN, I3, I, bs_addr<9> PIN, O, O, n2105 END SYM, audio_interface/aud/cycle_reg<0>, DFF, BLKNM=U1531 PIN, D, I, n2292 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n394<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/cycle<0> END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<6>, DFF, BLKNM=U1878 PIN, D, I, n3739 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<6> END SYM, U3370, NAND PIN, I1, I, tod_receiver/tod_receiver/shift_reg211<12> PIN, I2, I, n303, , INV PIN, O, O, n3054 END SYM, U3371, NAND PIN, I1, I, bootstrap/wr_source/r_hih<11> PIN, I2, I, n1874 PIN, O, O, n3053 END SYM, U3372, NAND PIN, I1, I, n3054 PIN, I2, I, n3053 PIN, O, O, n3058 END SYM, U3373, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<11> PIN, O, O, n3056 END SYM, U3374, NAND PIN, I1, I, bootstrap/wr_source/r_mid<11> PIN, I2, I, n2089 PIN, O, O, n3055 END SYM, U3375, NAND PIN, I1, I, n3056 PIN, I2, I, n3055 PIN, O, O, n3057 END SYM, U3376, OR PIN, I1, I, n3064 PIN, I2, I, n3063 PIN, O, O, rcp_ad_tri/y12<10> END SYM, U3377, OR PIN, I1, I, n303 PIN, I2, I, n2110 PIN, O, O, n3060 END SYM, U3378, NAND PIN, I1, I, bootstrap/wr_source/r_hih<10> PIN, I2, I, n1874 PIN, O, O, n3059 END SYM, U3379, NAND PIN, I1, I, n3060 PIN, I2, I, n3059 PIN, O, O, n3064 END SYM, tod_receiver/tod_en_reg, DFF, BLKNM=U1645 PIN, D, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/n88 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/active174 END SYM, U3530, AND PIN, I1, I, bootstrap/decode/address<4> PIN, I2, I, bootstrap/decode/address<5> PIN, I3, I, n1940 PIN, I4, I, n1941 PIN, O, O, n1866 END SYM, U3532, NAND PIN, I1, I, bootstrap/rx/sreg274<5> PIN, I2, I, n2213 PIN, O, O, n3197 END SYM, U3533, NAND PIN, I1, I, n3197 PIN, I2, I, n3204, , INV PIN, O, O, n3205 END SYM, U3536, NAND PIN, I1, I, n2208 PIN, I2, I, n2165 PIN, I3, I, bs_addr<6>, , INV PIN, O, O, n3203 END SYM, U3537, OR PIN, I1, I, bs_addr<6>, , INV PIN, I2, I, n3199 PIN, O, O, n3202 END SYM, U3538, AND PIN, I1, I, n1867 PIN, I2, I, n3201 PIN, O, O, n3199 END SYM, U3539, NAND PIN, I1, I, n2165 PIN, I2, I, n2208, , INV PIN, O, O, n3201 END SYM, receiver_interface/dac/ser_dato_reg, DFF, BLKNM=U1689 PIN, D, I, receiver_interface/dac/ser_dato267 PIN, C, I, n278, , INV, TS0 PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, n1371 END SYM, bootstrap/tx/cycle_reg<2>, DFF, BLKNM=U1766 PIN, D, I, n3294 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n133<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/cycle<2> END SYM, bootstrap/rx/sreg_reg<4>, DFF, BLKNM=U1699 PIN, D, I, bootstrap/rx/sreg274<4> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n278<0> PIN, Q, O, bootstrap/incr_en48 END SYM, rtc_divide/clock_reg<3>, DFF, BLKNM=U1752 PIN, D, I, n3433 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rtc_divide/clock<3> END SYM, external_port/rcp_reg1_reg, DFF, BLKNM=U1651 PIN, D, I, address_generator/int_addr30<0>, , TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, C, I, n278, , INV, TS0 PIN, CE, I, external_port/n89 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1402 END SYM, audio_interface/aud/comm_sreg_reg<7>, DFF, BLKNM=U1758 PIN, D, I, n3422, , TS54, TS53 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n423<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud_ctl_dat62 END SYM, U4429, AND PIN, I1, I, n2055 PIN, I2, I, n1981 PIN, I3, I, n1980 PIN, O, O, bootstrap/wr_source/r00/n51<0> END SYM, U4428, AND PIN, I1, I, bootstrap/rx/sreg274<0> PIN, I2, I, bootstrap/rx_data<0>, , INV PIN, O, O, n1941 END SYM, U4426, AND PIN, I1, I, n1941 PIN, I2, I, n1981 PIN, I3, I, n1980 PIN, O, O, bootstrap/wr_source/r02/n51<0> END SYM, U4425, AND PIN, I1, I, n2034 PIN, I2, I, n3918 PIN, I3, I, bs_addr<19> PIN, O, O, n2008 END SYM, U4424, NAND PIN, I1, I, bs_addr<18>, , INV PIN, I2, I, n2165 PIN, O, O, n3918 END SYM, U4422, AND PIN, I1, I, audio_interface/aud/clock<0> PIN, I2, I, audio_interface/aud/clock<1> PIN, I3, I, audio_interface/aud/clock<2> PIN, O, O, n2247 END SYM, U4421, OR PIN, I1, I, n3916 PIN, I2, I, bootstrap/n53 PIN, O, O, bootstrap/rx/n261 END SYM, U4420, NOR PIN, I1, I, n2167, , INV PIN, I2, I, bootstrap/rx/sreg274<7>, , TS432, TS431 PIN, O, O, n3916 END SYM, U4268, NOR PIN, I1, I, rcp_rcv_rd<10>, , INV PIN, I2, I, receiver_interface/dac/ser_clk258 PIN, I3, I, receiver_interface/dac/clock<0> PIN, O, O, receiver_interface/dac/clock314<0> END SYM, U4266, NAND PIN, I1, I, n3808 PIN, I2, I, n3807 PIN, O, O, rcp_addr_tri/y12<9> END SYM, U4265, NAND PIN, I1, I, bs_addr<9> PIN, I2, I, n303 PIN, O, O, n3807 END SYM, U4264, NAND PIN, I1, I, address_generator/int_addr<9> PIN, I2, I, n303, , INV PIN, O, O, n3808 END SYM, U4262, AND PIN, I1, I, bootstrap/n53 PIN, I2, I, n2113 PIN, I3, I, n1981 PIN, I4, I, n1954, , INV PIN, O, O, bootstrap/decode/int_active686 END SYM, U4260, OR PIN, I1, I, n3804 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, antenna_interface/ant/n278<10> END SYM, antenna_interface/ant/clock_reg<1>, DFF, BLKNM=U1830 PIN, D, I, n2470 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/clock<1> END SYM, U3981, NAND PIN, I1, I, address_generator/int_addr<16> PIN, I2, I, n303, , INV PIN, O, O, n3581 END SYM, U3982, NAND PIN, I1, I, bs_addr<16> PIN, I2, I, n303 PIN, O, O, n3580 END SYM, U3983, NAND PIN, I1, I, n3581 PIN, I2, I, n3580 PIN, O, O, rcp_addr_tri/y12<16> END SYM, U3985, NAND PIN, I1, I, address_generator/int_addr<17> PIN, I2, I, n303, , INV PIN, O, O, n3584 END SYM, U3986, NAND PIN, I1, I, bs_addr<17> PIN, I2, I, n303 PIN, O, O, n3583 END SYM, U2530, NAND PIN, I1, I, n2346 PIN, I2, I, n2345 PIN, O, O, n2351 END SYM, U3987, NAND PIN, I1, I, n3584 PIN, I2, I, n3583 PIN, O, O, rcp_addr_tri/y12<17> END SYM, U2532, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<5> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2349 END SYM, iic_bus_interface/iic/sda_oe_n_reg, DFF, BLKNM=U1764 PIN, D, I, n3299 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n451 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/doe_n END SYM, U2533, NAND PIN, I1, I, address_generator/int_addr30<6>, , TS191 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2348 END SYM, U2534, NAND PIN, I1, I, n2349 PIN, I2, I, n2348 PIN, O, O, n2350 END SYM, U2536, NAND PIN, I1, I, antenna_interface/ant/shift_reg<0> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2354 END SYM, U2537, NAND PIN, I1, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2353 END SYM, U2538, NAND PIN, I1, I, n2354 PIN, I2, I, n2353 PIN, O, O, n2359 END SYM, fill_output/sync/wr_n_latch_reg, DFF, BLKNM=U1723 PIN, D, I, antenna_interface/sync/wr_n_latch76, , TS439, TS416, TS389, TS285, TS227, TS203, TS169, TS59, TS52, TS51, TS30 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fill_output/sync/wr_n_latch END SYM, antenna_interface/ant/ser_clk_reg, DFF, BLKNM=U1509 PIN, D, I, antenna_interface/ant/ser_clk234 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n239 PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, n1404 END SYM, iic_bus_interface/iic/clock_reg<7>, DFF, BLKNM=U1922 PIN, D, I, n3278 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/clock<7> END SYM, bootstrap/tx/baud_reg<5>, DFF, BLKNM=U1870 PIN, D, I, n3765 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/baud<5> END SYM, U3071, NAND PIN, I1, I, rcp_iic_rd<1> PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2792 END SYM, U3072, NAND PIN, I1, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, n2791 END SYM, U3073, NAND PIN, I1, I, n2792 PIN, I2, I, n2791 PIN, O, O, n2798 END SYM, U3075, NAND PIN, I1, I, rcp_iic_rd<0> PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2795 END SYM, U3076, NAND PIN, I1, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, n2794 END SYM, U3077, NAND PIN, I1, I, n2795 PIN, I2, I, n2794 PIN, O, O, n2797 END SYM, U3230, NAND PIN, I1, I, rcp_iic_rd<4> PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2933 END SYM, U3231, NAND PIN, I1, I, address_generator/int_addr30<5>, , TS134, TS26, TS25 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, n2932 END SYM, U3232, NAND PIN, I1, I, n2933 PIN, I2, I, n2932 PIN, O, O, n2935 END SYM, U3234, NAND PIN, I1, I, rcp_audio_rd<1> PIN, I2, I, n2181 PIN, O, O, n2938 END SYM, U3235, NAND PIN, I1, I, n2180 PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<2> PIN, O, O, n2937 END SYM, U3236, NAND PIN, I1, I, n2938 PIN, I2, I, n2937 PIN, O, O, n1984 END SYM, U3237, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<1> PIN, O, O, n2940 END SYM, U3238, NAND PIN, I1, I, bootstrap/wr_source/r_mid<1> PIN, I2, I, n2089 PIN, O, O, n2939 END SYM, U3239, NAND PIN, I1, I, n2940 PIN, I2, I, n2939 PIN, O, O, n1909 END SYM, tod_receiver/sync/wr_n_latch_reg, DFF, BLKNM=U1727 PIN, D, I, antenna_interface/sync/wr_n_latch76, , TS439, TS416, TS389, TS285, TS227, TS203, TS169, TS59, TS52, TS51, TS30 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/sync/wr_n_latch END SYM, synthesizer_interface/synth/shift_reg_reg<6>, DFF, BLKNM=U1906 PIN, D, I, n3600, , TS50, TS49 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<6> END SYM, synthesizer_interface/synth/shift_reg_reg<17>, DFF, BLKNM=U1898 PIN, D, I, n3492, , TS48, TS47 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<16> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<17> END SYM, U2980, NAND PIN, I1, I, rcp_rcv_rd<1> PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, n2713 END SYM, U2981, NAND PIN, I1, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I2, I, receiver_interface/dac/busy285 PIN, O, O, n2712 END SYM, U2982, NAND PIN, I1, I, n2713 PIN, I2, I, n2712 PIN, O, O, n2719 END SYM, U2984, NAND PIN, I1, I, rcp_rcv_rd<4> PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, n2716 END SYM, U2985, NAND PIN, I1, I, address_generator/int_addr30<5>, , TS134, TS26, TS25 PIN, I2, I, receiver_interface/dac/busy285 PIN, O, O, n2715 END SYM, U2986, NAND PIN, I1, I, n2716 PIN, I2, I, n2715 PIN, O, O, n2718 END SYM, U2989, NAND PIN, I1, I, receiver_interface/dac/shift_reg<1> PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, n2722 END SYM, fan_interface/pwm/clock_reg<10>, DFF, BLKNM=U1748 PIN, D, I, n3627 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/clock<10> END SYM, U4565, IBUF PIN, I, I, ready_dsci PIN, O, O, n1361 END SYM, U4564, IBUF PIN, I, I, low_batt PIN, O, O, rcp_sts2_rd END SYM, U4563, IBUF PIN, I, I, fan_sense PIN, O, O, rcp_sts2_rd END SYM, synthesizer_interface/sync_low/wren_reg, DFF, BLKNM=U1968 PIN, D, I, n2613, , TS45 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/n348<0> END SYM, U4562, IBUF PIN, I, I, band_lo_1 PIN, O, O, rcp_sts2_rd END SYM, U4561, IBUF PIN, I, I, band_lo_0 PIN, O, O, rcp_sts2_rd END SYM, antenna_interface/ant/cycle_reg<4>, DFF, BLKNM=U2164 PIN, D, I, n3213 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/ant/n268<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/cycle<4> END SYM, external_port/sync/ale_select_reg, DFF, BLKNM=U1944 PIN, D, I, n2964, , TS44, TS43, TS42, TS41, TS40, TS39, TS38, TS37, TS36, TS35, TS34, TS33 PIN, C, I, n278, , INV, TS0 PIN, CE, I, external_port/sync/n72 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, external_port/sync/ale_select END SYM, bootstrap/wr_source/r12/q_reg<3>, DFF, BLKNM=U1511 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r12/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<11> END SYM, U3680, OR PIN, I1, I, n3329 PIN, I2, I, n3328 PIN, O, O, n3330 END SYM, U3681, XOR PIN, I1, I, bs_addr<16> PIN, I2, I, n3323 PIN, O, O, n3324 END SYM, U3682, AND PIN, I1, I, bs_addr<15> PIN, I2, I, n2154 PIN, O, O, n3323 END SYM, U3683, AND PIN, I1, I, n2165 PIN, I2, I, n3324 PIN, O, O, n3329 END SYM, U3685, NAND PIN, I1, I, bs_addr<16> PIN, I2, I, n1870, , INV PIN, O, O, n3327 END SYM, U3686, NAND PIN, I1, I, bootstrap/incr_en48 PIN, I2, I, n2212 PIN, O, O, n3326 END SYM, U3687, NAND PIN, I1, I, n3327 PIN, I2, I, n3326 PIN, O, O, n3328 END SYM, U3689, NAND PIN, I1, I, bootstrap/rd_control/cyc_rst_n PIN, I2, I, n2084 PIN, O, O, n3332 END SYM, iic_bus_interface/iic/shift_reg_reg<2>, DFF, BLKNM=U1794 PIN, D, I, n2806, , TS32, TS31 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n461<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, rcp_iic_rd<9> END SYM, bootstrap/dma_cnt/iq_reg<5>, DFF, BLKNM=U2162 PIN, D, I, n3223 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<5> END SYM, U3841, NAND PIN, I1, I, address_generator/int_addr<6> PIN, I2, I, n303, , INV PIN, O, O, n3461 END SYM, U3842, NAND PIN, I1, I, bs_addr<6> PIN, I2, I, n303 PIN, O, O, n3460 END SYM, U3843, NAND PIN, I1, I, n3461 PIN, I2, I, n3460 PIN, O, O, rcp_addr_tri/y12<6> END SYM, bootstrap/wr_source/r11/q_reg<3>, DFF, BLKNM=U1689 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r11/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<7> END SYM, U3845, NAND PIN, I1, I, address_generator/int_addr<7> PIN, I2, I, n303, , INV PIN, O, O, n3464 END SYM, U3846, NAND PIN, I1, I, bs_addr<7> PIN, I2, I, n303 PIN, O, O, n3463 END SYM, U3847, NAND PIN, I1, I, n3464 PIN, I2, I, n3463 PIN, O, O, rcp_addr_tri/y12<7> END SYM, U3849, NAND PIN, I1, I, address_generator/int_addr<8> PIN, I2, I, n303, , INV PIN, O, O, n3467 END SYM, synthesizer_interface/sync_low/wr_n_latch_reg, DFF, BLKNM=U1729 PIN, D, I, antenna_interface/sync/wr_n_latch76, , TS439, TS416, TS389, TS285, TS227, TS203, TS169, TS59, TS52, TS51, TS30 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/sync_low/wr_n_latch END SYM, bootstrap/dma_cnt/iq_reg<18>, DFF, BLKNM=U2150 PIN, D, I, n3366 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<16> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<18> END SYM, interrupt_source/q_reg<1>, DFF, BLKNM=U1707 PIN, D, I, interrupt_source/q130<1> PIN, C, I, n278, , INV, TS0 PIN, CE, I, interrupt_source/n131<0> PIN, Q, O, interrupt_source/q<1> END SYM, bootstrap/wr_source/r10/q_reg<3>, DFF, BLKNM=U1659 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r10/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<3> END SYM, tod_receiver/tod_receiver/shift_reg_reg<12>, DFF, BLKNM=U1513 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<12> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<13> END SYM, bootstrap/rx/cycle_reg<0>, DFF, BLKNM=U1515 PIN, D, I, bootstrap/rx/cycle246<0> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n252<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rx/cycle<0> END SYM, U4119, NAND PIN, I1, I, bootstrap/rx/sreg274<5> PIN, I2, I, n2130 PIN, O, O, n3704 END SYM, U4118, AND PIN, I1, I, n1825 PIN, I2, I, n1826 PIN, I3, I, audio_interface/aud/cycle<3> PIN, O, O, audio_interface/aud/ser_stb342 END SYM, U4117, AND PIN, I1, I, audio_interface/aud/cycle<1> PIN, I2, I, n1877 PIN, I3, I, audio_interface/aud/cycle<0>, , INV PIN, I4, I, audio_interface/aud/cycle<2>, , INV PIN, O, O, n3703 END SYM, U4114, OR PIN, I1, I, n3703 PIN, I2, I, audio_interface/aud/ser_stb342 PIN, O, O, audio_interface/aud/n384 END SYM, bootstrap/wr_source/r13/q_reg<3>, DFF, BLKNM=U1517 PIN, D, I, bootstrap/rx/sreg274<6> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r13/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<15> END SYM, U4113, AND PIN, I1, I, bootstrap/rx/cycle<1> PIN, I2, I, bootstrap/rx/cycle<2> PIN, I3, I, n2258 PIN, I4, I, bootstrap/rx/cycle<3>, , INV PIN, O, O, n3698 END SYM, U4111, AND PIN, I1, I, bootstrap/rx/cycle<3> PIN, I2, I, n3696 PIN, O, O, n3699 END SYM, U4110, NOR PIN, I1, I, bootstrap/rx/busy, , INV PIN, I2, I, bootstrap/rx/cycle<2> PIN, O, O, n3695 END SYM, U2680, AND PIN, I1, I, n2467 PIN, I2, I, n1871, , INV PIN, I3, I, antenna_interface/ant/int_busy PIN, O, O, n2470 END SYM, U2682, NOR PIN, I1, I, antenna_interface/ant/int_busy, , INV PIN, I2, I, n1871 PIN, I3, I, antenna_interface/ant/clock<0> PIN, O, O, n2469 END SYM, U2684, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<2>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2473 END SYM, U2685, NAND PIN, I1, I, address_generator/int_addr30<3>, , TS458, TS457, TS124, TS123, TS81 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2472 END SYM, U2686, NAND PIN, I1, I, n2473 PIN, I2, I, n2472 PIN, O, O, n2126 END SYM, U2688, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<5>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2476 END SYM, U2689, NAND PIN, I1, I, address_generator/int_addr30<6>, , TS191 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2475 END SYM, U2841, NAND PIN, I1, I, bs_addr<8> PIN, I2, I, n2165 PIN, I3, I, n2054 PIN, O, O, n2597 END SYM, U2842, AND PIN, I1, I, bs_addr<9>, , INV PIN, I2, I, n2597 PIN, O, O, n2106 END SYM, U2843, NAND PIN, I1, I, iic_bus_interface/iic/cycle<2> PIN, I2, I, n2599 PIN, O, O, n2600 END SYM, fan_interface/pwm/clock_reg<9>, DFF, BLKNM=U1884 PIN, D, I, n3674 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/clock<9> END SYM, U2844, NAND PIN, I1, I, iic_bus_interface/iic/cycle<1> PIN, I2, I, n1983 PIN, O, O, n2599 END SYM, U2845, NAND PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, n2600 PIN, O, O, n2248 END SYM, U2847, AND PIN, I1, I, iic_bus_interface/iic/cycle<0> PIN, I2, I, iic_bus_interface/iic/cycle<3>, , INV PIN, O, O, n1983 END SYM, U2849, NAND PIN, I1, I, bs_addr<4> PIN, I2, I, n2603 PIN, O, O, n2605 END SYM, tod_receiver/tod_receiver/stb_reg, DFF, BLKNM=U1993 PIN, D, I, tod_receiver/tod_receiver/stb192 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1410 END SYM, bootstrap/rd_control/cyc_rst_n_reg, DFF, BLKNM=U1978 PIN, D, I, n2499 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rd_control/n106 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/rd_control/cyc_rst_n END SYM, audio_interface/aud/cycle_reg<1>, DFF, BLKNM=U1790 PIN, D, I, n2814 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n394<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/cycle<1> END SYM, external_port/rcp_reg1_reg, DFF, BLKNM=U1695 PIN, D, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, C, I, n278, , INV, TS0 PIN, CE, I, external_port/n89 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1398 END SYM, tod_receiver/tod_receiver/manchester_decoder/timeout_reg<5>, DFF, BLKNM=U2014 PIN, D, I, n3314 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/manchester_decoder/timeout<5> END SYM, bootstrap/tx/baud_reg<10>, DFF, BLKNM=U1872 PIN, D, I, n3759 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/baud<10> END SYM, U3380, NAND PIN, I1, I, n2210 PIN, I2, I, bootstrap/wr_source/r_low<10> PIN, O, O, n3062 END SYM, U3381, NAND PIN, I1, I, bootstrap/wr_source/r_mid<10> PIN, I2, I, n2089 PIN, O, O, n3061 END SYM, U3382, NAND PIN, I1, I, n3062 PIN, I2, I, n3061 PIN, O, O, n3063 END SYM, U3383, XOR PIN, I1, I, iic_bus_interface/iic/clock<5> PIN, I2, I, n3068 PIN, O, O, n3065 END SYM, U3384, AND PIN, I1, I, n2070 PIN, I2, I, n3065 PIN, O, O, n3069 END SYM, U3385, AND PIN, I1, I, iic_bus_interface/iic/clock<4> PIN, I2, I, n2087 PIN, I3, I, iic_bus_interface/iic/clock<3> PIN, O, O, n3068 END SYM, U3387, NAND PIN, I1, I, n2234 PIN, I2, I, n2072, , INV PIN, O, O, n3067 END SYM, U3388, AND PIN, I1, I, rcp_iic_rd<8> PIN, I2, I, n3067 PIN, O, O, n2070 END SYM, U3389, NAND PIN, I1, I, rcp_iic_rd<3> PIN, I2, I, n1921 PIN, O, O, n3071 END SYM, U3540, NAND PIN, I1, I, n3203 PIN, I2, I, n3202 PIN, O, O, n3204 END SYM, internal_port/sync/ale_latch_reg, DFF, BLKNM=U1695 PIN, D, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, internal_port/sync/n72 END SYM, U3541, AND PIN, I1, I, bootstrap/decode/address<4> PIN, I2, I, bootstrap/decode/address<5> PIN, I3, I, n1940 PIN, I4, I, n2113 PIN, O, O, n2213 END SYM, U3543, NOR PIN, I1, I, antenna_interface/ant/cycle<4>, , INV PIN, I2, I, n1843 PIN, O, O, n3207 END SYM, U3544, OR PIN, I1, I, n3207 PIN, I2, I, n3212 PIN, O, O, n3213 END SYM, U3546, OR PIN, I1, I, n3209 PIN, I2, I, n2079 PIN, O, O, n3210 END SYM, U3547, NOR PIN, I1, I, antenna_interface/ant/cycle<4>, , INV PIN, I2, I, antenna_interface/ant/cycle<3> PIN, O, O, n3209 END SYM, U3548, AND PIN, I1, I, antenna_interface/ant/int_busy PIN, I2, I, n3210 PIN, O, O, n3212 END SYM, U3549, NAND PIN, I1, I, antenna_interface/ant/cycle<1> PIN, I2, I, antenna_interface/ant/cycle<2> PIN, I3, I, antenna_interface/ant/cycle<0> PIN, O, O, n3211 END SYM, U3702, NAND PIN, I1, I, n2051 PIN, I2, I, n2165 PIN, I3, I, bs_addr<14>, , INV PIN, O, O, n3346 END SYM, U3703, OR PIN, I1, I, bs_addr<14>, , INV PIN, I2, I, n3342 PIN, O, O, n3345 END SYM, U3704, AND PIN, I1, I, n2194 PIN, I2, I, n3344 PIN, O, O, n3342 END SYM, U3705, NAND PIN, I1, I, n2165 PIN, I2, I, n2051, , INV PIN, O, O, n3344 END SYM, U3706, NAND PIN, I1, I, n3346 PIN, I2, I, n3345 PIN, O, O, n3347 END SYM, U3707, AND PIN, I1, I, bootstrap/decode/address<4> PIN, I2, I, bootstrap/decode/address<5> PIN, I3, I, n1940 PIN, I4, I, n2129 PIN, O, O, n2211 END SYM, U3709, NOR PIN, I1, I, bs_addr<7>, , INV PIN, I2, I, n3356 PIN, O, O, n3350 END SYM, bootstrap/tx/cycle_reg<3>, DFF, BLKNM=U2142 PIN, D, I, n3547 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/tx/n133<3> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/cycle<3> END SYM, bootstrap/rx/sreg_reg<5>, DFF, BLKNM=U1699 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/rx/n278<0> PIN, Q, O, bootstrap/rx/sreg274<4> END SYM, rtc_divide/clock_reg<4>, DFF, BLKNM=U1924 PIN, D, I, n3273 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, rtc_divide/clock<4> END SYM, external_port/rcp_reg1_reg, DFF, BLKNM=U1697 PIN, D, I, address_generator/int_addr30<5>, , TS134, TS26, TS25 PIN, C, I, n278, , INV, TS0 PIN, CE, I, external_port/n89 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1397 END SYM, audio_interface/aud/comm_sreg_reg<6>, DFF, BLKNM=U1854 PIN, D, I, n3880, , TS24, TS23 PIN, C, I, n278, , INV, TS0 PIN, CE, I, audio_interface/aud/n423<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/comm_sreg_Q421<6> END SYM, U4418, NAND PIN, I1, I, n2167, , INV PIN, I2, I, bootstrap/rx/busy PIN, O, O, bootstrap/rx/n242<3> END SYM, U4416, NAND PIN, I1, I, n3913 PIN, I2, I, n2213, , INV PIN, O, O, bootstrap/dma_cnt/n93<4> END SYM, U4415, NAND PIN, I1, I, bootstrap/incr_addr PIN, I2, I, n2165 PIN, O, O, n3913 END SYM, U4413, NAND PIN, I1, I, n3911 PIN, I2, I, n2212, , INV PIN, O, O, bootstrap/dma_cnt/n93<16> END SYM, U4412, NAND PIN, I1, I, bootstrap/incr_addr PIN, I2, I, n2165 PIN, O, O, n3911 END SYM, U4410, NAND PIN, I1, I, n3909 PIN, I2, I, n2211, , INV PIN, O, O, bootstrap/dma_cnt/n93<12> END SYM, U4259, AND PIN, I1, I, n1806 PIN, I2, I, n3803 PIN, O, O, n3804 END SYM, U4258, OR PIN, I1, I, n1805 PIN, I2, I, antenna_interface/ant/cycle<4> PIN, O, O, n3803 END SYM, U4257, AND PIN, I1, I, bootstrap/tx/n133<3>, , INV PIN, I2, I, n3799 PIN, O, O, n3801 END SYM, U4255, NAND PIN, I1, I, bootstrap/tx/baud<0> PIN, I2, I, bootstrap/tx/baud<1> PIN, O, O, n3798 END SYM, U4253, AND PIN, I1, I, synthesizer_interface/synth/n338<4>, , INV PIN, I2, I, n3796 PIN, O, O, n3802 END SYM, U4251, NAND PIN, I1, I, synthesizer_interface/synth/clock<3> PIN, I2, I, n2120 PIN, O, O, n3795 END SYM, antenna_interface/ant/clock_reg<0>, DFF, BLKNM=U1830 PIN, D, I, n2469 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/ant/clock<0> END SYM, U4099, AND PIN, I1, I, n2246 PIN, I2, I, n3684 PIN, O, O, n3685 END SYM, U4098, AND PIN, I1, I, n2013 PIN, I2, I, tod_receiver/tod_receiver/manchester_decoder/timeout<9> PIN, O, O, n3683 END SYM, U4097, XOR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<10> PIN, I2, I, n3683 PIN, O, O, n3684 END SYM, U4096, AND PIN, I1, I, n2246 PIN, I2, I, n3682 PIN, O, O, n3686 END SYM, U4095, XOR PIN, I1, I, tod_receiver/tod_receiver/manchester_decoder/timeout<7> PIN, I2, I, n2178 PIN, O, O, n3682 END SYM, U4094, AND PIN, I1, I, n2100, , INV PIN, I2, I, n3678 PIN, O, O, n3680 END SYM, U4092, NAND PIN, I1, I, fan_interface/pwm/clock<5> PIN, I2, I, n2151 PIN, O, O, n3677 END SYM, U4090, AND PIN, I1, I, n2246 PIN, I2, I, n3676 PIN, O, O, n3681 END SYM, U3990, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<2>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3587 END SYM, U3991, OR PIN, I1, I, n3587 PIN, I2, I, n2266 PIN, O, O, n3592 END SYM, U3994, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<8>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3590 END SYM, U3995, OR PIN, I1, I, n3590 PIN, I2, I, n1929 PIN, O, O, n3591 END SYM, U2540, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<3> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2357 END SYM, U2541, NAND PIN, I1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2356 END SYM, U3998, NOR PIN, I1, I, synthesizer_interface/synth/shift_reg<6>, , INV PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, I3, I, synthesizer_interface/synth/int_busy303, , INV PIN, O, O, n3595 END SYM, U2542, NAND PIN, I1, I, n2357 PIN, I2, I, n2356 PIN, O, O, n2358 END SYM, U3999, OR PIN, I1, I, n3595 PIN, I2, I, n2127 PIN, O, O, n3600 END SYM, U2544, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<13> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2362 END SYM, tod_receiver/tod_receiver/shift_reg_reg<9>, DFF, BLKNM=U1539 PIN, D, I, tod_receiver/tod_receiver/shift_reg211<9> PIN, C, I, n278, , INV, TS0 PIN, CE, I, tod_receiver/tod_receiver/n217<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, tod_receiver/tod_receiver/shift_reg211<10> END SYM, U2545, NAND PIN, I1, I, address_generator/int_addr30<14>, , TS312 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2361 END SYM, U2546, NAND PIN, I1, I, n2362 PIN, I2, I, n2361 PIN, O, O, n2367 END SYM, U2548, NAND PIN, I1, I, antenna_interface/ant/shift_reg_Q276<1> PIN, I2, I, antenna_interface/ant/int_busy243, , INV PIN, O, O, n2365 END SYM, U2549, NAND PIN, I1, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, I2, I, antenna_interface/ant/int_busy243 PIN, O, O, n2364 END SYM, U2700, NAND PIN, I1, I, bs_addr<2>, , INV PIN, I2, I, n2165 PIN, O, O, n2484 END SYM, U2701, AND PIN, I1, I, n1841 PIN, I2, I, n2484 PIN, I3, I, bs_addr<3> PIN, O, O, n2268 END SYM, U2702, OR PIN, I1, I, n2485 PIN, I2, I, bs_addr<7> PIN, O, O, n2487 END SYM, U2703, NAND PIN, I1, I, bs_addr<7> PIN, I2, I, bs_addr<6> PIN, O, O, n2486 END SYM, U2704, AND PIN, I1, I, n2208 PIN, I2, I, bs_addr<6> PIN, O, O, n2485 END SYM, U2705, NAND PIN, I1, I, n2487 PIN, I2, I, n2486 PIN, O, O, n2269 END SYM, U2707, OR PIN, I1, I, synthesizer_interface/synth/int_busy303 PIN, I2, I, synthesizer_interface/synth/shift_reg<7>, , INV PIN, I3, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2490 END SYM, U2708, NAND PIN, I1, I, address_generator/int_addr30<8>, , TS261 PIN, I2, I, synthesizer_interface/synth/n348<0> PIN, O, O, n2489 END SYM, U2709, NAND PIN, I1, I, n2490 PIN, I2, I, n2489 PIN, O, O, n1929 END SYM, antenna_interface/sync/ale_select_reg, DFF, BLKNM=U1950 PIN, D, I, n2780, , TS22, TS21, TS20, TS19, TS18, TS17, TS16, TS15, TS14, TS13, TS12, TS11 PIN, C, I, n278, , INV, TS0 PIN, CE, I, antenna_interface/sync/n72 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, antenna_interface/sync/ale_select END SYM, iic_bus_interface/iic/clock_reg<6>, DFF, BLKNM=U2052 PIN, D, I, n2653 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/clock<6> END SYM, U3080, NAND PIN, I1, I, rcp_iic_rd<9> PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2801 END SYM, bootstrap/tx/baud_reg<6>, DFF, BLKNM=U2004 PIN, D, I, n3477 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/tx/baud<6> END SYM, U3081, NAND PIN, I1, I, address_generator/int_addr30<0>, , TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, n2800 END SYM, U3082, NAND PIN, I1, I, n2801 PIN, I2, I, n2800 PIN, O, O, n2807 END SYM, U3084, NAND PIN, I1, I, iic_bus_interface/iic/shift_reg_Q459<1> PIN, I2, I, iic_bus_interface/iic/busy427, , INV PIN, O, O, n2804 END SYM, U3085, NAND PIN, I1, I, address_generator/int_addr30<10>, , TS131 PIN, I2, I, iic_bus_interface/iic/busy427 PIN, O, O, n2803 END SYM, U3086, NAND PIN, I1, I, n2804 PIN, I2, I, n2803 PIN, O, O, n2806 END SYM, U3089, AND PIN, I1, I, rcp_audio_rd<8> PIN, I2, I, audio_interface/aud/cycle<0>, , INV PIN, O, O, n2292 END SYM, U3240, AND PIN, I1, I, rcp_rcv_rd<2> PIN, I2, I, n2111 PIN, O, O, n2941 END SYM, U3241, OR PIN, I1, I, n1985 PIN, I2, I, n2941 PIN, I3, I, n1986 PIN, O, O, n2062 END SYM, U3242, NAND PIN, I1, I, rcp_audio_rd<2> PIN, I2, I, n2181 PIN, O, O, n2943 END SYM, audio_interface/aud/clock_reg<0>, DFF, BLKNM=U1713 PIN, D, I, n2296 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, audio_interface/aud/clock<0> END SYM, U3243, NAND PIN, I1, I, n2180 PIN, I2, I, tod_receiver/tod_receiver/shift_reg211<3> PIN, O, O, n2942 END SYM, U3244, NAND PIN, I1, I, n2943 PIN, I2, I, n2942 PIN, O, O, n2063 END SYM, U3245, NAND PIN, I1, I, rcp_sts1_rd PIN, I2, I, n1875 PIN, O, O, n2945 END SYM, U3246, NAND PIN, I1, I, rcp_iic_rd<2> PIN, I2, I, n1921 PIN, O, O, n2944 END SYM, U3247, NAND PIN, I1, I, n2945 PIN, I2, I, n2944 PIN, O, O, n1985 END SYM, U3248, NAND PIN, I1, I, n1799 PIN, I2, I, rcp_sts2_rd PIN, O, O, n2947 END SYM, U3249, NAND PIN, I1, I, n1833 PIN, I2, I, rcp_fill_rd PIN, O, O, n2946 END SYM, U3400, NAND PIN, I1, I, n3077 PIN, I2, I, n3076 PIN, O, O, n2066 END SYM, U3402, OR PIN, I1, I, n1801 PIN, I2, I, n1802 PIN, I3, I, n1800 PIN, O, O, n3078 END SYM, U3403, AND PIN, I1, I, n303, , INV PIN, I2, I, n3078 PIN, O, O, n2067 END SYM, U3404, NAND PIN, I1, I, n1833 PIN, I2, I, rcp_fill_rd PIN, O, O, n3081 END SYM, U3405, NAND PIN, I1, I, rcp_iic_rd<4> PIN, I2, I, n1921 PIN, O, O, n3080 END SYM, U3406, NAND PIN, I1, I, n3081 PIN, I2, I, n3080 PIN, O, O, n1800 END SYM, U3407, NAND PIN, I1, I, n1799 PIN, I2, I, rcp_sts2_rd PIN, O, O, n3083 END SYM, U3408, NAND PIN, I1, I, rcp_rcv_rd<4> PIN, I2, I, n2111 PIN, O, O, n3082 END SYM, U3409, NAND PIN, I1, I, n3083 PIN, I2, I, n3082 PIN, O, O, n1801 END SYM, synthesizer_interface/synth/shift_reg_reg<5>, DFF, BLKNM=U1906 PIN, D, I, n3599, , TS9, TS8 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<10> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<5> END SYM, synthesizer_interface/synth/shift_reg_reg<18>, DFF, BLKNM=U1900 PIN, D, I, n3623, , TS7, TS6 PIN, C, I, n278, , INV, TS0 PIN, CE, I, synthesizer_interface/synth/n348<16> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/shift_reg<18> END SYM, U2990, NAND PIN, I1, I, address_generator/int_addr30<0>, , TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, I2, I, receiver_interface/dac/busy285 PIN, O, O, n2721 END SYM, U2991, NAND PIN, I1, I, n2722 PIN, I2, I, n2721 PIN, O, O, n2728 END SYM, U2993, NAND PIN, I1, I, rcp_rcv_rd<2> PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, n2725 END SYM, U2994, NAND PIN, I1, I, address_generator/int_addr30<3>, , TS458, TS457, TS124, TS123, TS81 PIN, I2, I, receiver_interface/dac/busy285 PIN, O, O, n2724 END SYM, U2995, NAND PIN, I1, I, n2725 PIN, I2, I, n2724 PIN, O, O, n2727 END SYM, U2998, NAND PIN, I1, I, rcp_rcv_rd<7> PIN, I2, I, receiver_interface/dac/busy285, , INV PIN, O, O, n2731 END SYM, U2999, NAND PIN, I1, I, address_generator/int_addr30<8>, , TS261 PIN, I2, I, receiver_interface/dac/busy285 PIN, O, O, n2730 END SYM, fill_output/sync/ale_latch_reg, DFF, BLKNM=U1715 PIN, D, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fill_output/sync/n72 END SYM, fan_interface/pwm/clock_reg<11>, DFF, BLKNM=U1886 PIN, D, I, n3669 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, fan_interface/pwm/clock<11> END SYM, U4552, IBUF PIN, I, I, rcv_tune_lb PIN, O, O, n332 END SYM, synthesizer_interface/synth/clock_reg<4>, DFF, BLKNM=U1866 PIN, D, I, n3802 PIN, C, I, n278, , INV, TS0 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, synthesizer_interface/synth/clock<4> END SYM, bootstrap/wr_source/r12/q_reg<2>, DFF, BLKNM=U1665 PIN, D, I, bootstrap/rx/sreg274<5> PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/wr_source/r12/n51<0> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bootstrap/wr_source/r_mid<10> END SYM, U4399, AND PIN, I1, I, n1825 PIN, I2, I, audio_interface/aud/read_cycle, , INV PIN, I3, I, n1826, , INV PIN, O, O, n3902 END SYM, U4396, NAND PIN, I1, I, n3897 PIN, I2, I, n3896 PIN, O, O, n3898 END SYM, U4395, OR PIN, I1, I, rtc_divide/clock<0> PIN, I2, I, rtc_divide/clk111 PIN, O, O, n3895 END SYM, U4394, AND PIN, I1, I, rtc_divide/clock<1> PIN, I2, I, n3895 PIN, O, O, n3894 END SYM, U4393, OR PIN, I1, I, rtc_divide/clock<2>, , INV PIN, I2, I, n3894 PIN, O, O, n3896 END SYM, U4392, NAND PIN, I1, I, rtc_divide/clock<0> PIN, I2, I, rtc_divide/clock<1> PIN, I3, I, rtc_divide/clock<2>, , INV PIN, O, O, n3897 END SYM, U4390, NAND PIN, I1, I, n3892 PIN, I2, I, n3891 PIN, O, O, n3899 END SYM, U3690, NAND PIN, I1, I, n3332 PIN, I2, I, n3337, , INV PIN, O, O, n3338 END SYM, U3692, NAND PIN, I1, I, n2195 PIN, I2, I, n3334 PIN, O, O, n3335 END SYM, U3693, NAND PIN, I1, I, bootstrap/rd_control/cyc_rst_n PIN, I2, I, bootstrap/rd_control/cycle<2>, , INV PIN, O, O, n3334 END SYM, U3694, AND PIN, I1, I, bootstrap/rd_sel PIN, I2, I, n3335 PIN, O, O, n3337 END SYM, U3696, AND PIN, I1, I, bootstrap/rd_control/cycle<0> PIN, I2, I, bootstrap/rd_control/cycle<1> PIN, I3, I, bootstrap/rd_control/cycle<2> PIN, I4, I, bootstrap/rd_sel, , INV PIN, O, O, n2084 END SYM, U3698, NAND PIN, I1, I, bootstrap/rx/sreg274<5> PIN, I2, I, n2211 PIN, O, O, n3340 END SYM, U3699, NAND PIN, I1, I, n3340 PIN, I2, I, n3347, , INV PIN, O, O, n3348 END SYM, iic_bus_interface/iic/shift_reg_reg<1>, DFF, BLKNM=U1609 PIN, D, I, n2286 PIN, C, I, n278, , INV, TS0 PIN, CE, I, iic_bus_interface/iic/n461<0> PIN, SD, I, antenna_interface/ant/n388 PIN, Q, O, iic_bus_interface/iic/shift_reg_Q459<1> END SYM, bootstrap/dma_cnt/iq_reg<4>, DFF, BLKNM=U2044 PIN, D, I, n2836 PIN, C, I, n278, , INV, TS0 PIN, CE, I, bootstrap/dma_cnt/n93<4> PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, bs_addr<4> END SYM, U3850, NAND PIN, I1, I, bs_addr<8> PIN, I2, I, n303 PIN, O, O, n3466 END SYM, U3851, NAND PIN, I1, I, n3467 PIN, I2, I, n3466 PIN, O, O, rcp_addr_tri/y12<8> END SYM, U3853, XOR PIN, I1, I, audio_interface/aud/clock<3> PIN, I2, I, n2247 PIN, O, O, n3468 END SYM, U3854, AND PIN, I1, I, n1880, , INV PIN, I2, I, n3468 PIN, O, O, n3471 END SYM, U3856, AND PIN, I1, I, n2021 PIN, I2, I, audio_interface/aud/clock<2>, , INV PIN, I3, I, audio_interface/aud/clock<4> PIN, O, O, n1880 END SYM, U3858, XOR PIN, I1, I, bootstrap/tx/baud<9> PIN, I2, I, n1838 PIN, O, O, n3472 END SYM, U3859, AND PIN, I1, I, bootstrap/tx/n133<3>, , INV PIN, I2, I, n3472 PIN, O, O, n3474 END SYM, external_port/rcp_reg1_reg, DFF, BLKNM=U1697 PIN, D, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, C, I, n278, , INV, TS0 PIN, CE, I, external_port/n89 PIN, RD, I, antenna_interface/ant/n388 PIN, Q, O, n1400 END SYM, U4248/SYM1, XNOR PIN, 1, I, n3790 PIN, 2, I, bootstrap/tx/baud<4> PIN, O, O, n3791 END SYM, address_generator/int_addr_reg<18>/SYM4, AND PIN, 1, I, address_generator/int_addr30<18>, , TS453 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<18>/SET END SYM, address_generator/int_addr_reg<18>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<18>, , INV, TS453 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<18>/RESET END SYM, address_generator/int_addr_reg<18>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<18>/SET PIN, 2, I, address_generator/int_addr_reg<18>/LQ PIN, O, O, address_generator/int_addr<18> END SYM, address_generator/int_addr_reg<18>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<18>/RESET PIN, 2, I, address_generator/int_addr<18> PIN, O, O, address_generator/int_addr_reg<18>/LQ END SYM, address_generator/int_addr_reg<0>/SYM4, AND PIN, 1, I, address_generator/int_addr30<0>, , TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<0>/SET END SYM, address_generator/int_addr_reg<0>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<0>, , INV, TS462, TS461, TS448, TS415, TS414, TS311, TS310, TS91, TS90, TS56, TS55 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<0>/RESET END SYM, address_generator/int_addr_reg<0>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<0>/SET PIN, 2, I, address_generator/int_addr_reg<0>/LQ PIN, O, O, address_generator/int_addr<0> END SYM, address_generator/int_addr_reg<0>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<0>/RESET PIN, 2, I, address_generator/int_addr<0> PIN, O, O, address_generator/int_addr_reg<0>/LQ END SYM, U4549/SYM1, OBUF, FAST PIN, I, I, n1377 PIN, O, O, fan_phase_a END SYM, U4548/SYM1, OBUF, FAST PIN, I, I, n1378 PIN, O, O, syn_ctl_en3 END SYM, U4547/SYM1, OBUF, FAST PIN, I, I, n1379 PIN, O, O, syn_ctl_en2 END SYM, U4546/SYM1, OBUF, FAST PIN, I, I, n1380 PIN, O, O, syn_ctl_en1 END SYM, U4545/SYM1, OBUF, FAST PIN, I, I, n1381 PIN, O, O, syn_ctl_dat END SYM, U4544/SYM1, OBUF, FAST PIN, I, I, n1382 PIN, O, O, syn_ctl_clk END SYM, U4543/SYM1, OBUF, FAST PIN, I, I, n1383 PIN, O, O, aud_ctl_stb END SYM, U4541/I, IBUF PIN, I, I, aud_ctl_dat PIN, O, O, n322 END SYM, U4541/B, OBUFT, FAST PIN, I, I, audio_interface/aud_ctl_dat62 PIN, T, I, audio_interface/doe_n, , INV PIN, O, O, aud_ctl_dat END SYM, U4540/SYM1, OBUF, FAST PIN, I, I, n1385 PIN, O, O, aud_ctl_clk END SYM, U4078/SYM1, XNOR PIN, 1, I, n3663 PIN, 2, I, fan_interface/pwm/clock<11> PIN, O, O, n3664 END SYM, U4074/SYM1, XNOR PIN, 1, I, n3658 PIN, 2, I, audio_interface/aud/clock<4> PIN, O, O, n3659 END SYM, address_generator/int_addr_reg<17>/SYM4, AND PIN, 1, I, address_generator/int_addr30<17>, , TS413 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<17>/SET END SYM, address_generator/int_addr_reg<17>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<17>, , INV, TS413 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<17>/RESET END SYM, address_generator/int_addr_reg<17>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<17>/SET PIN, 2, I, address_generator/int_addr_reg<17>/LQ PIN, O, O, address_generator/int_addr<17> END SYM, address_generator/int_addr_reg<17>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<17>/RESET PIN, 2, I, address_generator/int_addr<17> PIN, O, O, address_generator/int_addr_reg<17>/LQ END SYM, U4539/SYM1, OBUF, FAST PIN, I, I, n1386 PIN, O, O, rcp_ptt_int END SYM, address_generator/int_addr_reg<16>/SYM4, AND PIN, 1, I, address_generator/int_addr30<16>, , TS378 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<16>/SET END SYM, address_generator/int_addr_reg<16>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<16>, , INV, TS378 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<16>/RESET END SYM, address_generator/int_addr_reg<16>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<16>/SET PIN, 2, I, address_generator/int_addr_reg<16>/LQ PIN, O, O, address_generator/int_addr<16> END SYM, address_generator/int_addr_reg<16>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<16>/RESET PIN, 2, I, address_generator/int_addr<16> PIN, O, O, address_generator/int_addr_reg<16>/LQ END SYM, U4528/SYM1, OBUF, FAST PIN, I, I, n1397 PIN, O, O, squelch_ind END SYM, U4527/SYM1, OBUF, FAST PIN, I, I, n1398 PIN, O, O, sc_fh_ind END SYM, U4526/SYM1, OBUF, FAST PIN, I, I, n1399 PIN, O, O, fm_hi_band END SYM, U4525/SYM1, OBUF, FAST PIN, I, I, n1400 PIN, O, O, bit_fault_dsc END SYM, U4524/SYM1, OBUF, FAST PIN, I, I, n1401 PIN, O, O, am_mode_ind END SYM, U4523/SYM1, OBUF, FAST PIN, I, I, n1402 PIN, O, O, adf_home_en END SYM, U4522/SYM1, OBUF, FAST PIN, I, I, n1403 PIN, O, O, ant_tune_dat END SYM, U4521/SYM1, OBUF, FAST PIN, I, I, n1404 PIN, O, O, ant_tune_clk END SYM, U3909/SYM1, XNOR PIN, 1, I, n3517 PIN, 2, I, antenna_interface/ant/ser_clk234 PIN, O, O, n3518 END SYM, address_generator/int_addr_reg<15>/SYM4, AND PIN, 1, I, address_generator/int_addr30<15>, , TS353, TS95, TS94 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<15>/SET END SYM, address_generator/int_addr_reg<15>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<15>, , INV, TS353, TS95, TS94 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<15>/RESET END SYM, address_generator/int_addr_reg<15>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<15>/SET PIN, 2, I, address_generator/int_addr_reg<15>/LQ PIN, O, O, address_generator/int_addr<15> END SYM, address_generator/int_addr_reg<15>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<15>/RESET PIN, 2, I, address_generator/int_addr<15> PIN, O, O, address_generator/int_addr_reg<15>/LQ END SYM, U3609/SYM1, XNOR PIN, 1, I, n3259 PIN, 2, I, bootstrap/rx/baud16<6> PIN, O, O, n3260 END SYM, U4518/SYM1, OBUF, FAST PIN, I, I, n1407 PIN, O, O, fill_req END SYM, U4517/SYM1, OBUF, FAST PIN, I, I, n1408 PIN, O, O, fill_cc_dat END SYM, U4516/SYM1, OBUF, FAST PIN, I, I, n1409 PIN, O, O, fill_clk END SYM, U4515/SYM1, OBUF, FAST PIN, I, I, n1410 PIN, O, O, rcp_tod_int END SYM, U4513/SYM1, OBUF, FAST PIN, I, I, n1412 PIN, O, O, ext_bs_dato END SYM, U4511/SYM1, OBUF, FAST PIN, I, I, n1414 PIN, O, O, rcp_eep_cs_n END SYM, U4510/SYM1, OBUF, FAST PIN, I, I, n1415 PIN, O, O, rcp_1553_cs_n END SYM, U4499/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<7> PIN, O, O, rcp_addr_bus<7> PIN, T, I, antenna_interface/ant/n388 END SYM, U4498/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<8> PIN, O, O, rcp_addr_bus<8> PIN, T, I, antenna_interface/ant/n388 END SYM, U4497/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<9> PIN, O, O, rcp_addr_bus<9> PIN, T, I, antenna_interface/ant/n388 END SYM, U4496/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<10> PIN, O, O, rcp_addr_bus<10> PIN, T, I, antenna_interface/ant/n388 END SYM, U4495/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<11> PIN, O, O, rcp_addr_bus<11> PIN, T, I, antenna_interface/ant/n388 END SYM, U4494/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<12> PIN, O, O, rcp_addr_bus<12> PIN, T, I, antenna_interface/ant/n388 END SYM, U4493/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<13> PIN, O, O, rcp_addr_bus<13> PIN, T, I, antenna_interface/ant/n388 END SYM, U4492/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<14> PIN, O, O, rcp_addr_bus<14> PIN, T, I, antenna_interface/ant/n388 END SYM, U4491/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<15> PIN, O, O, rcp_addr_bus<15> PIN, T, I, antenna_interface/ant/n388 END SYM, U4490/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<16> PIN, O, O, rcp_addr_bus<16> PIN, T, I, antenna_interface/ant/n388 END SYM, U3913/SYM1, XNOR PIN, 1, I, n3520 PIN, 2, I, rtc_divide/clock<9> PIN, O, O, n3521 END SYM, address_generator/int_addr_reg<9>/SYM4, AND PIN, 1, I, address_generator/int_addr30<9>, , TS336, TS335, TS325 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<9>/SET END SYM, address_generator/int_addr_reg<9>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<9>, , INV, TS336, TS335, TS325 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<9>/RESET END SYM, address_generator/int_addr_reg<9>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<9>/SET PIN, 2, I, address_generator/int_addr_reg<9>/LQ PIN, O, O, address_generator/int_addr<9> END SYM, address_generator/int_addr_reg<9>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<9>/RESET PIN, 2, I, address_generator/int_addr<9> PIN, O, O, address_generator/int_addr_reg<9>/LQ END SYM, address_generator/int_addr_reg<14>/SYM4, AND PIN, 1, I, address_generator/int_addr30<14>, , TS312 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<14>/SET END SYM, address_generator/int_addr_reg<14>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<14>, , INV, TS312 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<14>/RESET END SYM, address_generator/int_addr_reg<14>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<14>/SET PIN, 2, I, address_generator/int_addr_reg<14>/LQ PIN, O, O, address_generator/int_addr<14> END SYM, address_generator/int_addr_reg<14>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<14>/RESET PIN, 2, I, address_generator/int_addr<14> PIN, O, O, address_generator/int_addr_reg<14>/LQ END SYM, U3613/SYM1, XNOR PIN, 1, I, n3262 PIN, 2, I, synthesizer_interface/synth/clock<2> PIN, O, O, n3263 END SYM, U4508/SYM1, OBUF, FAST PIN, I, I, n1417 PIN, O, O, rcp_hold END SYM, U4506/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<0> PIN, O, O, rcp_addr_bus<0> PIN, T, I, antenna_interface/ant/n388 END SYM, U4505/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<1> PIN, O, O, rcp_addr_bus<1> PIN, T, I, antenna_interface/ant/n388 END SYM, U4504/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<2> PIN, O, O, rcp_addr_bus<2> PIN, T, I, antenna_interface/ant/n388 END SYM, U4503/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<3> PIN, O, O, rcp_addr_bus<3> PIN, T, I, antenna_interface/ant/n388 END SYM, U4502/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<4> PIN, O, O, rcp_addr_bus<4> PIN, T, I, antenna_interface/ant/n388 END SYM, U4501/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<5> PIN, O, O, rcp_addr_bus<5> PIN, T, I, antenna_interface/ant/n388 END SYM, U4500/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<6> PIN, O, O, rcp_addr_bus<6> PIN, T, I, antenna_interface/ant/n388 END SYM, U4187/SYM1, XNOR PIN, 1, I, n3756 PIN, 2, I, bootstrap/tx/baud<10> PIN, O, O, n3757 END SYM, U4183/SYM1, XNOR PIN, 1, I, n3753 PIN, 2, I, bootstrap/tx/baud<7> PIN, O, O, n3754 END SYM, U4489/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<17> PIN, O, O, rcp_addr_bus<17> PIN, T, I, antenna_interface/ant/n388 END SYM, U4488/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<18> PIN, O, O, rcp_addr_bus<18> PIN, T, I, antenna_interface/ant/n388 END SYM, U4487/SYM1, OBUFT, FAST PIN, I, I, rcp_addr_tri/y12<19> PIN, O, O, rcp_addr_bus<19> PIN, T, I, antenna_interface/ant/n388 END SYM, U4486/I, IBUF PIN, I, I, rcp_ad_bus<0> PIN, O, O, address_generator/int_addr30<0> END SYM, U4486/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<0> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<0> END SYM, U4485/I, IBUF PIN, I, I, rcp_ad_bus<1> PIN, O, O, address_generator/int_addr30<1> END SYM, U4485/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<1> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<1> END SYM, U4484/I, IBUF PIN, I, I, rcp_ad_bus<2> PIN, O, O, address_generator/int_addr30<2> END SYM, U4484/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<2> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<2> END SYM, U4483/I, IBUF PIN, I, I, rcp_ad_bus<3> PIN, O, O, address_generator/int_addr30<3> END SYM, U4483/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<3> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<3> END SYM, U4482/I, IBUF PIN, I, I, rcp_ad_bus<4> PIN, O, O, address_generator/int_addr30<4> END SYM, U4482/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<4> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<4> END SYM, U4481/I, IBUF PIN, I, I, rcp_ad_bus<5> PIN, O, O, address_generator/int_addr30<5> END SYM, U4481/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<5> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<5> END SYM, U4480/I, IBUF PIN, I, I, rcp_ad_bus<6> PIN, O, O, address_generator/int_addr30<6> END SYM, U4480/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<6> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<6> END SYM, U3768/SYM1, XNOR PIN, 1, I, n3394 PIN, 2, I, antenna_interface/ant/clock<6> PIN, O, O, n3395 END SYM, address_generator/int_addr_reg<8>/SYM4, AND PIN, 1, I, address_generator/int_addr30<8>, , TS261 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<8>/SET END SYM, address_generator/int_addr_reg<8>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<8>, , INV, TS261 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<8>/RESET END SYM, address_generator/int_addr_reg<8>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<8>/SET PIN, 2, I, address_generator/int_addr_reg<8>/LQ PIN, O, O, address_generator/int_addr<8> END SYM, address_generator/int_addr_reg<8>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<8>/RESET PIN, 2, I, address_generator/int_addr<8> PIN, O, O, address_generator/int_addr_reg<8>/LQ END SYM, address_generator/int_addr_reg<13>/SYM4, AND PIN, 1, I, address_generator/int_addr30<13>, , TS246 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<13>/SET END SYM, address_generator/int_addr_reg<13>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<13>, , INV, TS246 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<13>/RESET END SYM, address_generator/int_addr_reg<13>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<13>/SET PIN, 2, I, address_generator/int_addr_reg<13>/LQ PIN, O, O, address_generator/int_addr<13> END SYM, address_generator/int_addr_reg<13>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<13>/RESET PIN, 2, I, address_generator/int_addr<13> PIN, O, O, address_generator/int_addr_reg<13>/LQ END SYM, U3620/SYM1, XNOR PIN, 1, I, n3269 PIN, 2, I, rtc_divide/clock<5> PIN, O, O, n3270 END SYM, U4179/SYM1, XNOR PIN, 1, I, n3748 PIN, 2, I, fan_interface/pwm/clock<4> PIN, O, O, n3749 END SYM, U4479/I, IBUF PIN, I, I, rcp_ad_bus<7> PIN, O, O, address_generator/int_addr30<7> END SYM, U4479/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<7> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<7> END SYM, U4478/I, IBUF PIN, I, I, rcp_ad_bus<8> PIN, O, O, address_generator/int_addr30<8> END SYM, U4478/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<8> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<8> END SYM, U4477/I, IBUF PIN, I, I, rcp_ad_bus<9> PIN, O, O, address_generator/int_addr30<9> END SYM, U4477/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<9> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<9> END SYM, U4476/I, IBUF PIN, I, I, rcp_ad_bus<10> PIN, O, O, address_generator/int_addr30<10> END SYM, U4476/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<10> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<10> END SYM, U4475/I, IBUF PIN, I, I, rcp_ad_bus<11> PIN, O, O, address_generator/int_addr30<11> END SYM, U4475/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<11> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<11> END SYM, U4474/I, IBUF PIN, I, I, rcp_ad_bus<12> PIN, O, O, address_generator/int_addr30<12> END SYM, U4474/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<12> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<12> END SYM, U4473/I, IBUF PIN, I, I, rcp_ad_bus<13> PIN, O, O, address_generator/int_addr30<13> END SYM, U4473/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<13> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<13> END SYM, U4472/I, IBUF PIN, I, I, rcp_ad_bus<14> PIN, O, O, address_generator/int_addr30<14> END SYM, U4472/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<14> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<14> END SYM, U4471/I, IBUF PIN, I, I, rcp_ad_bus<15> PIN, O, O, address_generator/int_addr30<15> END SYM, U4471/B, OBUFT, FAST PIN, I, I, rcp_ad_tri/y12<15> PIN, T, I, rcp_ad_tri/y_tri_enable<0> PIN, O, O, rcp_ad_bus<15> END SYM, U3777/SYM1, XNOR PIN, 1, I, n3403 PIN, 2, I, antenna_interface/ant/clock<2> PIN, O, O, n3404 END SYM, address_generator/int_addr_reg<7>/SYM4, AND PIN, 1, I, address_generator/int_addr30<7>, , TS224 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<7>/SET END SYM, address_generator/int_addr_reg<7>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<7>, , INV, TS224 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<7>/RESET END SYM, address_generator/int_addr_reg<7>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<7>/SET PIN, 2, I, address_generator/int_addr_reg<7>/LQ PIN, O, O, address_generator/int_addr<7> END SYM, address_generator/int_addr_reg<7>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<7>/RESET PIN, 2, I, address_generator/int_addr<7> PIN, O, O, address_generator/int_addr_reg<7>/LQ END SYM, address_generator/int_addr_reg<12>/SYM4, AND PIN, 1, I, address_generator/int_addr30<12>, , TS219 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<12>/SET END SYM, address_generator/int_addr_reg<12>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<12>, , INV, TS219 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<12>/RESET END SYM, address_generator/int_addr_reg<12>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<12>/SET PIN, 2, I, address_generator/int_addr_reg<12>/LQ PIN, O, O, address_generator/int_addr<12> END SYM, address_generator/int_addr_reg<12>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<12>/RESET PIN, 2, I, address_generator/int_addr<12> PIN, O, O, address_generator/int_addr_reg<12>/LQ END SYM, U4463/I, IBUF PIN, I, I, rcp_rd_n PIN, O, O, n281 END SYM, U4463/B, OBUFT, FAST PIN, I, I, bootstrap/rd_control/cyc_rst_n, , INV PIN, T, I, n303, , INV PIN, O, O, rcp_rd_n END SYM, U4461/I, IBUF PIN, I, I, rcp_wr_n PIN, O, O, n280 END SYM, U4461/B, OBUFT, FAST PIN, I, I, rcp_wr_tri/y12 PIN, T, I, n303, , INV PIN, O, O, rcp_wr_n END SYM, address_generator/int_addr_reg<6>/SYM4, AND PIN, 1, I, address_generator/int_addr30<6>, , TS191 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<6>/SET END SYM, address_generator/int_addr_reg<6>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<6>, , INV, TS191 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<6>/RESET END SYM, address_generator/int_addr_reg<6>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<6>/SET PIN, 2, I, address_generator/int_addr_reg<6>/LQ PIN, O, O, address_generator/int_addr<6> END SYM, address_generator/int_addr_reg<6>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<6>/RESET PIN, 2, I, address_generator/int_addr<6> PIN, O, O, address_generator/int_addr_reg<6>/LQ END SYM, address_generator/int_addr_reg<11>/SYM4, AND PIN, 1, I, address_generator/int_addr30<11>, , TS185, TS89, TS88 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<11>/SET END SYM, address_generator/int_addr_reg<11>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<11>, , INV, TS185, TS89, TS88 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<11>/RESET END SYM, address_generator/int_addr_reg<11>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<11>/SET PIN, 2, I, address_generator/int_addr_reg<11>/LQ PIN, O, O, address_generator/int_addr<11> END SYM, address_generator/int_addr_reg<11>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<11>/RESET PIN, 2, I, address_generator/int_addr<11> PIN, O, O, address_generator/int_addr_reg<11>/LQ END SYM, U3809/SYM1, XNOR PIN, 1, I, bootstrap/wr_control/cycle<1> PIN, 2, I, bootstrap/wr_control/cycle<2> PIN, O, O, n3437 END SYM, address_generator/int_addr_reg<5>/SYM4, AND PIN, 1, I, address_generator/int_addr30<5>, , TS134, TS26, TS25 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<5>/SET END SYM, address_generator/int_addr_reg<5>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<5>, , INV, TS134, TS26, TS25 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<5>/RESET END SYM, address_generator/int_addr_reg<5>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<5>/SET PIN, 2, I, address_generator/int_addr_reg<5>/LQ PIN, O, O, address_generator/int_addr<5> END SYM, address_generator/int_addr_reg<5>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<5>/RESET PIN, 2, I, address_generator/int_addr<5> PIN, O, O, address_generator/int_addr_reg<5>/LQ END SYM, address_generator/int_addr_reg<10>/SYM4, AND PIN, 1, I, address_generator/int_addr30<10>, , TS131 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<10>/SET END SYM, address_generator/int_addr_reg<10>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<10>, , INV, TS131 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<10>/RESET END SYM, address_generator/int_addr_reg<10>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<10>/SET PIN, 2, I, address_generator/int_addr_reg<10>/LQ PIN, O, O, address_generator/int_addr<10> END SYM, address_generator/int_addr_reg<10>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<10>/RESET PIN, 2, I, address_generator/int_addr<10> PIN, O, O, address_generator/int_addr_reg<10>/LQ END SYM, U3810/SYM1, XNOR PIN, 1, I, tod_receiver/tod_receiver/manchester_decoder/sdai_2247 PIN, 2, I, tod_receiver/tod_receiver/manchester_decoder/sdai_2 PIN, O, O, n3436 END SYM, address_generator/int_addr_reg<4>/SYM4, AND PIN, 1, I, address_generator/int_addr30<4>, , TS98, TS29, TS28 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<4>/SET END SYM, address_generator/int_addr_reg<4>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<4>, , INV, TS98, TS29, TS28 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<4>/RESET END SYM, address_generator/int_addr_reg<4>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<4>/SET PIN, 2, I, address_generator/int_addr_reg<4>/LQ PIN, O, O, address_generator/int_addr<4> END SYM, address_generator/int_addr_reg<4>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<4>/RESET PIN, 2, I, address_generator/int_addr<4> PIN, O, O, address_generator/int_addr_reg<4>/LQ END SYM, address_generator/int_addr_reg<3>/SYM4, AND PIN, 1, I, address_generator/int_addr30<3>, , TS458, TS457, TS124, TS123, TS81 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<3>/SET END SYM, address_generator/int_addr_reg<3>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<3>, , INV, TS458, TS457, TS124, TS123, TS81 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<3>/RESET END SYM, address_generator/int_addr_reg<3>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<3>/SET PIN, 2, I, address_generator/int_addr_reg<3>/LQ PIN, O, O, address_generator/int_addr<3> END SYM, address_generator/int_addr_reg<3>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<3>/RESET PIN, 2, I, address_generator/int_addr<3> PIN, O, O, address_generator/int_addr_reg<3>/LQ END SYM, U3675/SYM1, XNOR PIN, 1, I, interrupt_source/q130<5> PIN, 2, I, interrupt_source/q<5> PIN, O, O, n3317 END SYM, U3677/SYM1, XNOR PIN, 1, I, interrupt_source/q130<1> PIN, 2, I, interrupt_source/q<1> PIN, O, O, n3320 END SYM, U3678/SYM1, XNOR PIN, 1, I, interrupt_source/q130<3> PIN, 2, I, interrupt_source/q<3> PIN, O, O, n3319 END SYM, address_generator/int_addr_reg<2>/SYM4, AND PIN, 1, I, address_generator/int_addr30<2>, , TS58, TS57, TS46, TS3, TS2 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<2>/SET END SYM, address_generator/int_addr_reg<2>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<2>, , INV, TS58, TS57, TS46, TS3, TS2 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<2>/RESET END SYM, address_generator/int_addr_reg<2>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<2>/SET PIN, 2, I, address_generator/int_addr_reg<2>/LQ PIN, O, O, address_generator/int_addr<2> END SYM, address_generator/int_addr_reg<2>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<2>/RESET PIN, 2, I, address_generator/int_addr<2> PIN, O, O, address_generator/int_addr_reg<2>/LQ END SYM, U4567/SYM1, OBUF, FAST PIN, I, I, n1360 PIN, O, O, ck32khz END SYM, U4566/SYM1, OBUF, FAST PIN, I, I, n1361 PIN, O, O, ready_dsco END SYM, U4560/SYM1, OBUF, FAST PIN, I, I, n1367 PIN, O, O, band_sel_1 END SYM, U4256/SYM1, XNOR PIN, 1, I, n3798 PIN, 2, I, bootstrap/tx/baud<2> PIN, O, O, n3799 END SYM, U4252/SYM1, XNOR PIN, 1, I, n3795 PIN, 2, I, synthesizer_interface/synth/clock<4> PIN, O, O, n3796 END SYM, U4093/SYM1, XNOR PIN, 1, I, n3677 PIN, 2, I, fan_interface/pwm/clock<6> PIN, O, O, n3678 END SYM, address_generator/int_addr_reg<19>/SYM4, AND PIN, 1, I, address_generator/int_addr30<19>, , TS10 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<19>/SET END SYM, address_generator/int_addr_reg<19>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<19>, , INV, TS10 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<19>/RESET END SYM, address_generator/int_addr_reg<19>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<19>/SET PIN, 2, I, address_generator/int_addr_reg<19>/LQ PIN, O, O, address_generator/int_addr<19> END SYM, address_generator/int_addr_reg<19>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<19>/RESET PIN, 2, I, address_generator/int_addr<19> PIN, O, O, address_generator/int_addr_reg<19>/LQ END SYM, address_generator/int_addr_reg<1>/SYM4, AND PIN, 1, I, address_generator/int_addr30<1>, , TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<1>/SET END SYM, address_generator/int_addr_reg<1>/SYM3, NAND PIN, 1, I, address_generator/int_addr30<1>, , INV, TS213, TS212, TS202, TS201, TS126, TS125, TS5 PIN, 2, I, address_generator/n31<0>, , TS405, TS328, TS291, TS286, TS266, TS233, TS142, TS140, TS87, TS27, TS4, TS1 PIN, O, O, address_generator/int_addr_reg<1>/RESET END SYM, address_generator/int_addr_reg<1>/SYM2, OR PIN, 1, I, address_generator/int_addr_reg<1>/SET PIN, 2, I, address_generator/int_addr_reg<1>/LQ PIN, O, O, address_generator/int_addr<1> END SYM, address_generator/int_addr_reg<1>/SYM1, AND PIN, 1, I, address_generator/int_addr_reg<1>/RESET PIN, 2, I, address_generator/int_addr<1> PIN, O, O, address_generator/int_addr_reg<1>/LQ END SYM, U4559/SYM1, OBUF, FAST PIN, I, I, n1368 PIN, O, O, band_sel_0 END SYM, U4557/I, IBUF PIN, I, I, iic_sda PIN, O, O, n337 END SYM, U4557/B, OBUFT, FAST PIN, I, I, iic_bus_interface/iic_sda62 PIN, T, I, iic_bus_interface/doe_n, , INV PIN, O, O, iic_sda END SYM, U4556/SYM1, OBUF, FAST PIN, I, I, n1370 PIN, O, O, iic_scl END SYM, U4555/SYM1, OBUF, FAST PIN, I, I, n1371 PIN, O, O, rcv_tune_dat END SYM, U4554/SYM1, OBUF, FAST PIN, I, I, n1372 PIN, O, O, rcv_tune_ld_n END SYM, U4553/SYM1, OBUF, FAST PIN, I, I, n1373 PIN, O, O, rcv_tune_clk END SYM, U4551/SYM1, OBUF, FAST PIN, I, I, n1375 PIN, O, O, fan_phase_c END SYM, U4550/SYM1, OBUF, FAST PIN, I, I, n1376 PIN, O, O, fan_phase_b END EXT, xmod_ctl, I EXT, tone_key, I EXT, take_ctl, I EXT, syn_ctl_en3, O EXT, syn_ctl_en2, O EXT, syn_ctl_en1, O EXT, syn_ctl_dat, O EXT, syn_ctl_clk, O EXT, squelch_ind, O EXT, sqlch_tn_dis, I EXT, sc_fh_ind, O EXT, ready_dsco, O EXT, ready_dsci, I EXT, rcv_tune_ld_n, O EXT, rcv_tune_lb, I EXT, rcv_tune_dat, O EXT, rcv_tune_clk, O EXT, rcp_1553_csi_n, I EXT, rcp_1553_cs_n, O EXT, rcp_wr_n, B EXT, rcp_tod_int, O EXT, rcp_rd_n, B EXT, rcp_ptt_int, O EXT, rcp_hold, O EXT, rcp_hlda, I EXT, rcp_eep_cs_n, O EXT, rcp_ale, I EXT, rcp_addr_bus<19>, T EXT, rcp_addr_bus<18>, T EXT, rcp_addr_bus<17>, T EXT, rcp_addr_bus<16>, T EXT, rcp_addr_bus<15>, T EXT, rcp_addr_bus<14>, T EXT, rcp_addr_bus<13>, T EXT, rcp_addr_bus<12>, T EXT, rcp_addr_bus<11>, T EXT, rcp_addr_bus<10>, T EXT, rcp_addr_bus<9>, T EXT, rcp_addr_bus<8>, T EXT, rcp_addr_bus<7>, T EXT, rcp_addr_bus<6>, T EXT, rcp_addr_bus<5>, T EXT, rcp_addr_bus<4>, T EXT, rcp_addr_bus<3>, T EXT, rcp_addr_bus<2>, T EXT, rcp_addr_bus<1>, T EXT, rcp_addr_bus<0>, T EXT, rcp_ad_bus<15>, B EXT, rcp_ad_bus<14>, B EXT, rcp_ad_bus<13>, B EXT, rcp_ad_bus<12>, B EXT, rcp_ad_bus<11>, B EXT, rcp_ad_bus<10>, B EXT, rcp_ad_bus<9>, B EXT, rcp_ad_bus<8>, B EXT, rcp_ad_bus<7>, B EXT, rcp_ad_bus<6>, B EXT, rcp_ad_bus<5>, B EXT, rcp_ad_bus<4>, B EXT, rcp_ad_bus<3>, B EXT, rcp_ad_bus<2>, B EXT, rcp_ad_bus<1>, B EXT, rcp_ad_bus<0>, B EXT, rcp_a_bus<19>, I EXT, rcp_a_bus<18>, I EXT, rcp_a_bus<17>, I EXT, rcp_a_bus<16>, I EXT, radio_rly_ky, I EXT, ptt, I EXT, power_on, I EXT, low_batt, I EXT, iic_sda, B EXT, iic_scl, O EXT, fnc_cs_n, I EXT, fm_hi_band, O EXT, fill_req, O EXT, fill_mode, I EXT, fill_data, I EXT, fill_clk, O EXT, fill_cc_dat, O EXT, fan_sense, I EXT, fan_phase_c, O EXT, fan_phase_b, O EXT, fan_phase_a, O EXT, fan_enable, I EXT, ext_tod_in, I EXT, ext_bs_dato, O EXT, ext_bs_dati, I EXT, dig_dat_sel, I EXT, cp_n, I EXT, ck32khz, O EXT, cd_n, I EXT, bit_fault_dsc, O EXT, band_sel_1, O EXT, band_sel_0, O EXT, band_lo_1, I EXT, band_lo_0, I EXT, aud_ctl_stb, O EXT, aud_ctl_dat, B EXT, aud_ctl_clk, O EXT, ant_tune_dat, O EXT, ant_tune_clk, O EXT, ant_sel, I EXT, am_mode_ind, O EXT, adf_home_en, O EOF