bdes6Kxc4000xlx4010xlpq208-1~0address_generator/int_addr_reg<18>/SYM2G=(G2*G3)+(~(~G2*G3)*G1)1address_generator/int_addr_reg<17>/SYM2F=(F2*F3)+(~(~F2*F3)*F1)0address_generator/int_addr_reg<1>/SYM2G=(G2*G3)+(~(~G2*G3)*G1)1address_generator/int_addr_reg<19>/SYM2F=(F2*F3)+(~(~F2*F3)*F1)0address_generator/int_addr_reg<4>/SYM2G=(G2*G3)+(~(~G2*G3)*G1)1address_generator/int_addr_reg<3>/SYM2F=(F2*F3)+(~(~F2*F3)*F1)0address_generator/int_addr_reg<6>/SYM2G=(G2*G3)+(~(~G2*G3)*G1)1address_generator/int_addr_reg<5>/SYM2F=(F2*F3)+(~(~F2*F3)*F1)0address_generator/int_addr_reg<8>/SYM2G=(G2*G3)+(~(~G2*G3)*G1)1address_generator/int_addr_reg<7>/SYM2F=(F2*F3)+(~(~F2*F3)*F1) U4523/SYM1 adf_home_en.PAD U4524/SYM1 am_mode_ind.PAD U4529  ant_sel.PAD  U4521/SYM1  ant_tune_clk.PAD  U4522/SYM1  ant_tune_dat.PAD 0U2680/n2470 G=(G3*~G4)*(G1@G2)1U2682/n2469 F=~((F2+F3)+~F1)4antenna_interface/ant/clock_reg<0> 6antenna_interface/ant/clock_reg<1> 0U3774 G=~((~G4+G3)*~(G1*~(G2*G3)))1U3778 F=~F1*~(~(F3*F4)@F2)4antenna_interface/ant/clock_reg<2> 6iic_bus_interface/iic/cycle_reg<3> 0U3769G=~G1*~(~(G3*G4)@G2)1U3765F=~F1*(F2@F3)4antenna_interface/ant/clock_reg<3>6antenna_interface/ant/clock_reg<6>*U3327H=~H1*(G@F)0BEL_U2036.GG=G11U3328/n2216F=(F3*F4)*F1*F24antenna_interface/ant/clock_reg<4>*U3322H=~F*(H1@G)0BEL_U2038.GG=G11U3324F=~(~F1*F2)4antenna_interface/ant/clock_reg<5>*U3131H=~H1*(G@F)0BEL_U2040.GG=G11U3132/n1907F=(F3*F4)*F1*F24antenna_interface/ant/clock_reg<7>0U3914G=~G1*~(~(G3*G4)@G2)1U3910F=~F1*~(~(F3*F4)@F2)4antenna_interface/ant/clock_reg<8>6rtc_divide/clock_reg<9>0U2672G=~(G1+G2)1U2671F=F1*~F24antenna_interface/ant/cycle_reg<0>0U2677G=G1*(G2@(G3*G4))1U2674F=F1*(F2@F3)4antenna_interface/ant/cycle_reg<1>6antenna_interface/ant/cycle_reg<2>*U4444H=~(~H1+G)+F0BEL_U1995.GG=G11U4446/n3928F=(~F3*F4)*F1*F24antenna_interface/ant/cycle_reg<3>*U3544H=~(~H1+G)+F0U3550G=~(G1*~((G3*G4)*G2))1U3548F=F1*(~(~F3+F4)+F2)4antenna_interface/ant/cycle_reg<4>0U2791/n1867G=~((G3+G4)+G1+G2)1U2790/n1868F=(~F3*~F4)*F1*F24antenna_interface/ant/shift_reg_reg<0>0U2669G=~(~(G3*~G2)*~(G1*G2))1U2665F=~(~(F3*~F2)*~(F1*F2))4antenna_interface/ant/shift_reg_reg<10>6antenna_interface/ant/shift_reg_reg<13>0U3570G=~(~G1*G2)1U3574F=~(~(F3*~F2)*~(F1*F2))4antenna_interface/ant/shift_reg_reg<11>6antenna_interface/ant/shift_reg_reg<7>0U2661G=~(~(G3*~G2)*~(G1*G2))1U2657F=~(~(F3*~F2)*~(F1*F2))4antenna_interface/ant/shift_reg_reg<12>6antenna_interface/ant/shift_reg_reg<15>0U2550G=~(~(G3*~G2)*~(G1*G2))1U2546F=~(~(F3*~F2)*~(F1*F2))4antenna_interface/ant/shift_reg_reg<14>6antenna_interface/ant/shift_reg_reg<2>0U2542G=~(~(G3*~G2)*~(G1*G2))1U2538F=~(~(F3*~F2)*~(F1*F2))4antenna_interface/ant/shift_reg_reg<1>6antenna_interface/ant/shift_reg_reg<4>0U2534G=~(~(G3*~G2)*~(G1*G2))1U2530F=~(~(F3*~F2)*~(F1*F2))4antenna_interface/ant/shift_reg_reg<3>6antenna_interface/ant/shift_reg_reg<6>0U2526G=~(~(G3*~G2)*~(G1*G2))1U2522F=~(~(F3*~F2)*~(F1*F2))4antenna_interface/ant/shift_reg_reg<5>6antenna_interface/ant/shift_reg_reg<8>0U3797G=G1@G21U3801F=~(~(F3*~F2)*~(F1*F2))4antenna_interface/ant/shift_reg_reg<9>6bootstrap/rx/baud16_reg<4>0U3023 G=~(~(G3*G4)*~(G1*G2))1U3020 F=~(~(F3*F4)*~(F1*F2))4antenna_interface/sync/ale_latch_reg 6external_port/sync/ale_latch_reg 0U3057/bootstrap/wr_source/r12/n51<0>!G=(~G3*G4)*G1*G21U3060/n2780!F=(~F3*~F4)*F1*F24antenna_interface/sync/ale_select_reg!1U4127"F=~(F1)4antenna_interface/sync/wr_n_latch_reg"6synthesizer_interface/sync_high/wr_n_latch_reg"0U3039/n2762#G=(G2*~G3)*G11U3037/n2763#F=(F2*~F3)*F14antenna_interface/sync/wren_reg#6fan_interface/sync/wren_reg# U4540/SYM1$ aud_ctl_clk.PAD$ U4541/B/X_TRI% U4541/I% aud_ctl_dat.PAD% U4543/SYM1& aud_ctl_stb.PAD&0U4221'G=G1*G21U4220'F=F1*F24audio_interface/aud/busy_reg'*BEL_U1713.H(H=H10U4324/n1933(G=(G3+G4)+G1+G21U4323/n2072(F=~((F3*F4)*~F1*F2)4audio_interface/aud/clock_reg<0>(6synthesizer_interface/sync_high/ale_latch_reg(0U4037)G=G1@(G2*G3)1U4036)F=F1@F24audio_interface/aud/clock_reg<1>)6audio_interface/aud/clock_reg<2>)*U3854*H=~F*(H1@G)0BEL_U2008.G*G=G11U3856/n1880*F=(F2*~F3)*F14audio_interface/aud/clock_reg<3>*0U4071+G=G1*(G2@(G3*G4))1U4075+F=~F1*~(~(F3*F4)@F2)4audio_interface/aud/clock_reg<4>+6tod_receiver/tod_receiver/manchester_decoder/timeout_reg<13>+0U3257/n2120,G=(G2*G3)*G11U3261,F=~(~(F3*~F2)*~(F1*F2))4audio_interface/aud/comm_sreg_reg<0>,6audio_interface/aud/comm_sreg_reg<5>,0U4396-G=~(~((~G1*G2)*G3)*(~G1+(G2*(G3+G4))))1U4390-F=~(~(F3*~F2)*~(F1*F2))4audio_interface/aud/comm_sreg_reg<1>-6rtc_divide/clock_reg<2>-0U2514.G=~(~(G3*~G2)*~(G1*G2))1U2518.F=~(~(F3*~F2)*~(F1*F2))4audio_interface/aud/comm_sreg_reg<2>.0U4378/G=~(~(G3*~G2)*~(G1*G2))1U4374/F=~(~(F3*~F2)*~(F1*F2))4audio_interface/aud/comm_sreg_reg<3>/6audio_interface/aud/comm_sreg_reg<6>/0U43820G=~(((~G2+G3)+G1)*~(G1*~G2))1U43860F=~(~(F3*~F2)*~(F1*F2))4audio_interface/aud/comm_sreg_reg<4>06rtc_divide/clock_reg<1>00U37961G=G1+G21U37951F=~(~(F3*~F2)*~(F1*F2))4audio_interface/aud/comm_sreg_reg<7>10U26492G=~G1*~((G3*G4)*G2)1U26532F=~(~((~F2*F4)*F3)*(F1+~F2))4audio_interface/aud/cycle_reg<0>26audio_interface/aud/cycle_reg<3>20U30943G=G1*(G2@(G3*G4))1U30963F=F1*(F2@F3)4audio_interface/aud/cycle_reg<1>36audio_interface/aud/cycle_reg<2>3*U39224H=~(~(H1*G)*~F)0U39274G=G1*~G21U39254F=~F1*~(F2*F3)4audio_interface/aud/cycle_reg<4>40U31595G=~(~(G3*~G2)*~(G1*G2))1U31635F=~(~(F3*~F2)*~(F1*F2))4audio_interface/aud/data_sreg_reg<0>56audio_interface/aud/data_sreg_reg<7>50U43666G=~(~(G3*~G2)*~(G1*G2))1U43706F=~(~(F3*~F2)*~(F1*F2))4audio_interface/aud/data_sreg_reg<1>66audio_interface/aud/data_sreg_reg<2>60U43587G=~(~(G3*~G2)*~(G1*G2))1U43627F=~(~(F3*~F2)*~(F1*F2))4audio_interface/aud/data_sreg_reg<3>76audio_interface/aud/data_sreg_reg<4>70U34718G=~(~(G3*~G2)*~(G1*G2))1U34758F=~(~(F3*~F2)*~(F1*F2))4audio_interface/aud/data_sreg_reg<5>86audio_interface/aud/data_sreg_reg<6>81U40409F=~(F1)4audio_interface/aud/free_clk_reg9*BEL_U1719.H:H=H10U4314/n2102:G=~((~G3*G4)*G1*G2)1U4312/n2101:F=~((F3*F4)*F1*F2)4audio_interface/aud/read_cycle_reg:6synthesizer_interface/sync_low/ale_latch_reg:0U2734/n2181;G=(~G3*~G4)*G1*G21U2731;F=F1*F24audio_interface/aud/ser_doe_n_reg;*U4114<H=F+G0U4118/audio_interface/aud/ser_stb342<G=(G2*G3)*G11U4117/n3703<F=(~F3*~F4)*F1*F24audio_interface/aud/ser_stb_reg<*BEL_U1687.H=H=H10U2566=G=~(((G2+~G4)+G3)*~(G1*G2))1U2562=F=~(((F2+~F4)+F3)*~(F1*F2))4audio_interface/sync/ale_latch_reg=6bootstrap/wr_source/r11/q_reg<2>=0U2868/n2616>G=(G2*~G3)*G11U2866/n2617>F=(~F3*F4)*F1*F24audio_interface/sync/ale_select_reg>6iic_bus_interface/sync/wren_reg>0U3017?G=~G1*((G3+G4)+G2)1U3014?F=~(~(F3*F4)*~(F1*F2))4audio_interface/sync/wr_n_latch_reg?6fan_interface/sync/wr_n_latch_reg?0U2875/n2622@G=~((G2+G3)+~G1)1U2873/n2623@F=(F2*~F3)*F14audio_interface/sync/wren_reg@6bootstrap/rd_control/tx_strt_reg@ U4561A band_lo_0.PADA U4562B band_lo_1.PADB U4559/SYM1C band_sel_0.PADC U4560/SYM1D band_sel_1.PADD U4525/SYM1E bit_fault_dsc.PADE*U4120FH=H1*~(G*F)0BEL_U2132.GFG=G11U4121/n2130FF=(F3*F4)*F1*F24bootstrap/decode/ext_reg<0>F0U3265/bootstrap/wr_source/r23/n51<0>GG=(~G3*G4)*G1*G21U3263GF=F1*~(F2*F3)4bootstrap/decode/ext_reg<1>G0U4260HG=(G2*(G3+G4))+G11U4262/bootstrap/decode/int_active686HF=(~F3*F4)*F1*F24bootstrap/decode/int_active_regH*U3496IH=~(~(H1*G)*~F)0BEL_U2026.GIG=G11U3500IF=~(~(F3*~F2)*(F1+~F2))4bootstrap/dma_cnt/iq_reg<0>I*U3338JH=~(~(H1*G)*~F)0BEL_U2032.GJG=G11U3345JF=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4))))4bootstrap/dma_cnt/iq_reg<10>J0U3788KG=~((~G3+G4)+~G2)+G11U3791KF=~(~(F3*F4)*(F1+F2))4bootstrap/dma_cnt/iq_reg<11>K*U3331LH=~(~(H1*G)*~F)0BEL_U2034.GLG=G11U3335LF=~(~((~F2*F4)*F3)*(F1+~F2))4bootstrap/dma_cnt/iq_reg<12>L0U4044MG=~(~G1*G2)1U4042MF=~(~F1*F2)4bootstrap/dma_cnt/iq_reg<13>M*U3699NH=~(~(H1*G)*~F)0U3707/n2211NG=(G3*G4)*G1*G21U3706NF=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4))))4bootstrap/dma_cnt/iq_reg<14>N*U3486OH=~(~(H1*G)*~F)0BEL_U2028.GOG=G11U3493OF=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4))))4bootstrap/dma_cnt/iq_reg<15>O*U3680PH=F+G0U3687PG=~(~(G3*~G4)*~(G1*G2))1U3683PF=F1*(F2@(F3*F4))4bootstrap/dma_cnt/iq_reg<16>P*U3503QH=~(~(H1*G)*~F)0BEL_U2024.GQG=G11U3510QF=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4))))4bootstrap/dma_cnt/iq_reg<17>Q*U3720RH=~(~(H1*G)*~F)0U3726/n2212RG=(~G3*G4)*G1*G21U3724RF=~((F3+~F2)*~(F1*~F2))4bootstrap/dma_cnt/iq_reg<18>R*U3513SH=~(~(H1*G)*~F)0BEL_U2022.GSG=G11U3516SF=~(F1+~((F3*F4)+F2))4bootstrap/dma_cnt/iq_reg<19>S*U3121TH=~(~(H1*G)*~F)0BEL_U2042.GTG=G11U3128TF=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4))))4bootstrap/dma_cnt/iq_reg<1>T*U3563UH=~(~(H1*G)*~F)0U3568/n1864UG=(G3*G4)*G1*G21U3567UF=~((F3+~F2)*~(F1*~F2))4bootstrap/dma_cnt/iq_reg<2>U*U3348VH=~(~(H1*G)*~F)0BEL_U2030.GVG=G11U3351VF=~(F1+~((F3*F4)+F2))4bootstrap/dma_cnt/iq_reg<3>V*U3111WH=~(~(H1*G)*~F)0BEL_U2044.GWG=G11U3118WF=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4))))4bootstrap/dma_cnt/iq_reg<4>W*U3553XH=~(~H1+G)+F0U3560XG=G1*~(~G2*G3)1U3557XF=~(~(F3*F4)*~(F1*~F2))4bootstrap/dma_cnt/iq_reg<5>X*U3533YH=~(~(H1*G)*~F)0U3541/n2213YG=(G3*G4)*G1*G21U3540YF=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4))))4bootstrap/dma_cnt/iq_reg<6>Y*U3710ZH=~(~H1+G)+F0U3717ZG=G1*~(~G2*G3)1U3714ZF=~(~(F3*F4)*~(F1*~F2))4bootstrap/dma_cnt/iq_reg<7>Z*U3522[H=~(~(H1*G)*~F)0U3530/n1866[G=(G3*G4)*G1*G21U3529[F=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4))))4bootstrap/dma_cnt/iq_reg<8>[0U3781\G=~(~(G3*G4)*(G1+G2))1U3784\F=~(~(F3*F4)*(F1+F2))4bootstrap/dma_cnt/iq_reg<9>\*U4436]H=H1*(G+F)0BEL_U2100.G]G=G11U4437/n1944]F=(F3*F4)*F1*F24bootstrap/incr_addr_reg]0U4231^G=((~G3*~G4)*G2)+G11U4227^F=~((~F3+F4)+~F2)+F14bootstrap/incr_en_reg^*U2720_H=H1+F1U2722/n2499_F=(~F3*F4)*F1*F24bootstrap/rd_control/cyc_rst_n_reg_0U4342`G=~(~(G3*~G2)*~(G1*G2))1U4345`F=F1*(F2@(F3*F4))4bootstrap/rd_control/cycle_reg<0>`6bootstrap/rd_control/cycle_reg<2>`*U3690aH=~(~(H1*G)*~F)0U3696/n2084aG=(~G3*G4)*G1*G21U3694aF=F1*~(F2*~(F3*~F4))4bootstrap/rd_control/cycle_reg<3>a0U3430/n2250bG=(G3*G4)*G1*G21U3429bF=~(F1+F2)4bootstrap/rx/baud16_reg<0>b0U4275cG=(G2*~(G3*G4))+G11U4272cF=~(((~F2+F3)+F1)*~(F1*~F2))4bootstrap/rx/baud16_reg<1>c6bootstrap/rx/baud16_reg<3>c0U3029/n1937dG=(~G3*G4)*G1*G21U3035dF=~(~((~F1*F2)*F3)*(~F1+(F2*(F3+F4))))4bootstrap/rx/baud16_reg<2>d6external_port/rcp_reg1_regd*U2925eH=H1@(F*G)0U2927/n1890eG=(G3*G4)*G1*G21BEL_U1513.FeF=F14bootstrap/rx/baud16_reg<5>e6tod_receiver/tod_receiver/shift_reg_reg<12>e0U3614fG=~G1*~(~(G3*G4)@G2)1U3610fF=~F1*~(~(F3*F4)@F2)4bootstrap/rx/baud16_reg<6>f6synthesizer_interface/synth/clock_reg<2>f0U3662gG=~(((G3+G4)+G2)*~G1)1U3659gF=F1*~F24bootstrap/rx/busy_regg0U2921hG=~(((G2+~G4)+G3)*~(G1*G2))1U2924hF=F1*(F2@(F3*F4))4bootstrap/rx/cycle_reg<0>h6bootstrap/rx/cycle_reg<2>h*U2603iH=~(~(G*H1)*~(F*~H1))0BEL_U1984.GiG=G11U2604iF=F1*F24bootstrap/rx/cycle_reg<1>i*U4107jH=F+G0U4113/n3698jG=(~G3*G4)*G1*G21U4111jF=F1*(~(~F3+F4)+F2)4bootstrap/rx/cycle_reg<3>j0U3025kG=G1*(G2@G3)1U3027kF=F1*~F24bootstrap/rx/div16_reg<0>k6bootstrap/rx/div16_reg<3>k0U3759lG=~((~G3+G4)+~G2)+G11U3762/n3391lF=(F3*~F4)*(F1@F2)4bootstrap/rx/div16_reg<1>l*U3107mH=~H1*(G@F)0BEL_U2046.GmG=G11U3108mF=F1*F24bootstrap/rx/div16_reg<2>m*U2916nH=H1*F1U2917/n2149nF=(F3*F4)*F1*F24bootstrap/rx/int_stb_regn6bootstrap/wr_source/r13/q_reg<3>n*BEL_U1705.HoH=H10U2485/n2232oG=~((G3*G4)*G1*G2)1U2484/n2231oF=(F3+F4)+F1+F24bootstrap/rx/sreg_reg<0>o6bootstrap/rx/sreg_reg<6>o*BEL_U1703.HpH=H10U2489/n1882pG=(G3+G4)+G1+G21U2488/n2233pF=(~F3+F4)+F1+F24bootstrap/rx/sreg_reg<1>p6bootstrap/rx/sreg_reg<7>p*BEL_U1701.HqH=H10U2496qG=~(~((G3*G4)*G2)*~G1)1U2493qF=~(F1*~((F3*~F4)*F2))4bootstrap/rx/sreg_reg<2>q6bootstrap/rx/sreg_reg<3>q*BEL_U1699.HrH=H10U4403rG=~(~(G2*G3)*~G1)1U4400rF=((~F3*~F4)*F2)+F14bootstrap/rx/sreg_reg<4>r6bootstrap/rx/sreg_reg<5>r0U3419/n3093sG=(G2*~G3)*G11U3422/n3092sF=(F3*~F4)*(F1+F2)4bootstrap/tx/baud_reg<0>s6synthesizer_interface/sync_high/wren_regs0U4184tG=~G1*~(~(G3*G4)@G2)1U4188tF=~F1*~(~(F3*F4)@F2)4bootstrap/tx/baud_reg<10>t6bootstrap/tx/baud_reg<7>t0U4249uG=~G1*~(~(G3*G4)@G2)1U4245uF=~F1*(F2@F3)4bootstrap/tx/baud_reg<1>u6bootstrap/tx/baud_reg<4>u0U4253vG=~G1*~(~(G3*G4)@G2)1U4257vF=~F1*~(~(F3*F4)@F2)4bootstrap/tx/baud_reg<2>v6synthesizer_interface/synth/clock_reg<4>v0U4194wG=~G1*(G2@G3)1U4191wF=~F1*(F2@F3)4bootstrap/tx/baud_reg<3>w6bootstrap/tx/baud_reg<5>w*U3863xH=~H1*(G@F)0BEL_U2004.GxG=G11U3864/n1839xF=(F3*F4)*F1*F24bootstrap/tx/baud_reg<6>x*U3930yH=~F*(H1@G)0U3931/n3539yG=(G3*G4)*G1*G21U3933yF=~(F1*(F2+F3))4bootstrap/tx/baud_reg<8>y*U3859zH=~H1*(G@F)0BEL_U2006.GzG=G11U3860/n1838zF=(F3*F4)*F1*F24bootstrap/tx/baud_reg<9>z0U2817{G=~(((G2+~G4)+G3)*~(G1*G2))1U2813{F=F1*~F24bootstrap/tx/cycle_reg<0>{*U2594|H=~(~(G*H1)*~(F*~H1))0BEL_U1989.G|G=G11U2595|F=F1*F24bootstrap/tx/cycle_reg<1>|0U3640}G=~((~(G3*G4)@G2)*G1)1U3643}F=F1*(F2@(F3*F4))4bootstrap/tx/cycle_reg<2>}*U3934~H=F+G0U3940/n3545~G=(~G3*G4)*G1*G21U3938~F=F1*~(F2*~(F3*~F4))4bootstrap/tx/cycle_reg<3>~0U3755/n2089G=(G2*~G3)*G11U3753/n1921F=(~F3*~F4)*F1*F24bootstrap/tx/int_busy_reg0U4236G=~(G1*~((G3*G4)*G2))1U4234F=~(~((F3*F4)*F2)*~F1)4bootstrap/tx/sreg_reg<0>*U3099H=~(~H1+F)+G0U3103/n2822G=(G3*(G4+G2))*(G1+~G2)1address_generator/int_addr_reg<0>/SYM2F=(F2*F3)+(~(~F2*F3)*F1)4bootstrap/tx/sreg_reg<1>*U2898H=~(~H1+F)+G0U2902/n2650G=(G3*(G4+G2))*(G1+~G2)1address_generator/int_addr_reg<9>/SYM2F=(F2*F3)+(~(~F2*F3)*F1)4bootstrap/tx/sreg_reg<2>*U2890H=~(~H1+F)+G0U2894/n2642G=(G3*(G4+G2))*(G1+~G2)1address_generator/int_addr_reg<10>/SYM2F=(F2*F3)+(~(~F2*F3)*F1)4bootstrap/tx/sreg_reg<3>*U2882H=~(~H1+F)+G0U2886/n2634G=(G3*(G4+G2))*(G1+~G2)1address_generator/int_addr_reg<11>/SYM2F=(F2*F3)+(~(~F2*F3)*F1)4bootstrap/tx/sreg_reg<4>*U2771H=~(~H1+F)+G0U2775/n2549G=(G3*(G4+G2))*(G1+~G2)1address_generator/int_addr_reg<12>/SYM2F=(F2*F3)+(~(~F2*F3)*F1)4bootstrap/tx/sreg_reg<5>*U2763H=~(~H1+F)+G0U2767/n2541G=(G3*~(~G4*G1))*(G1+G2)1address_generator/int_addr_reg<13>/SYM2F=(F2*F3)+(~(~F2*F3)*F1)4bootstrap/tx/sreg_reg<6>*U2749H=~(~H1+F)+G0U2753/n2528G=(G3*~(~G4*G1))*(G1+G2)1address_generator/int_addr_reg<14>/SYM2F=(F2*F3)+(~(~F2*F3)*F1)4bootstrap/tx/sreg_reg<7>*U2741H=~H1+F0address_generator/int_addr_reg<15>/SYM2G=(G2*G3)+(~(~G2*G3)*G1)1U2745/n2520F=(F3*~(~F4*F1))*(F1+F2)4bootstrap/tx/sreg_reg<8>0U3635G=G1*(G2@G3)1U3637F=F1*~F24bootstrap/wr_control/cycle_reg<0>6bootstrap/wr_control/cycle_reg<1>0U4134/n1414G=~(((~G2+G1)*~((G3+G4)*~G2))*(~G1+G3+G4))1U4137F=F1*(F2@(F3*F4))4bootstrap/wr_control/cycle_reg<2>6bootstrap/wr_source/r02/q_reg<1>*U4280/bootstrap/wr_control/cycle_rst_n92H=(H1*~G)*F0BEL_U2116.GG=G11U4283/n1980F=(~F3*~F4)*F1*F24bootstrap/wr_control/cycle_rst_n_reg0U3810/SYM1G=~(G1@G2)1U3809/SYM1F=~(F1@F2)4bootstrap/wr_control/wr_n_reg6tod_receiver/tod_receiver/manchester_decoder/edge_n_reg0U4350G=G1*~(G2*~(G3*G4))1U4347F=~(F1*~(F2*F3))4bootstrap/wr_source/r00/q_reg<0>0U4145/rcp_ad_tri/y12<6>G=(G2+(G3*G4))+G11U4143/rcp_ad_tri/y12<4>F=(F2+(F3*F4))+F14bootstrap/wr_source/r00/q_reg<1>*BEL_U1727.HH=H11U4212F=~(F1)4bootstrap/wr_source/r00/q_reg<2>6tod_receiver/sync/wr_n_latch_reg*BEL_U1729.HH=H14bootstrap/wr_source/r00/q_reg<3>6synthesizer_interface/sync_low/wr_n_latch_reg*BEL_U1721.HH=H10U4219/n1994G=(G3+G4)+G1+G21U4218/n2159F=(F3+F4)+F1+F24bootstrap/wr_source/r01/q_reg<0>6bootstrap/wr_source/r01/q_reg<1>0U4153G=~((~G3+G4)+~G2)+G11U4149F=~((((F1+F4)+F2)@F3)*~(F1*F2))4bootstrap/wr_source/r01/q_reg<2>0U2503/n2081G=(G2*G3)*G11U2502/n2079F=(~F3*F4)*F1*F24bootstrap/wr_source/r01/q_reg<3>0U4338G=~(G1*~(G2*G3))1U4336F=F1*~(~F2*F3)4bootstrap/wr_source/r02/q_reg<0>0U3971G=~(~(G3*~G2)*~(G1*G2))1U3967F=~(~(F3*~F2)*~(F1*F2))4bootstrap/wr_source/r02/q_reg<2>0U3417/n1951G=~((G3+G4)+(G1*G2))1U3415F=~(~(F3*F4)*~(F1*F2))4bootstrap/wr_source/r02/q_reg<3>0U3827G=~(~(G3*~G2)*~(G1*G2))1U3823F=~(~(F3*~F2)*~(F1*F2))4bootstrap/wr_source/r03/q_reg<0>0U4058G=~(~G1*G2)1U4056F=~(((F2+~F4)+F3)*~(F1*F2))4bootstrap/wr_source/r03/q_reg<1>0U4223G=G1*G21U4222/n2076F=(F2*F3)*F14bootstrap/wr_source/r03/q_reg<2>0U2787G=G1*(G2+G3)1U2785/n2180F=~((~F3+F4)+F1+F2)4bootstrap/wr_source/r03/q_reg<3>*BEL_U1667.HH=H10U2842G=~G1*~((G3*G4)*G2)1U2839/n2105F=(F2*~(~F3*F4))*F14bootstrap/wr_source/r10/q_reg<0>6bootstrap/wr_source/r10/q_reg<1>*BEL_U1659.HH=H10U3011G=~(~(G3*G4)*~(G1*G2))1U3008F=~(~(F3*F4)*~(F1*F2))4bootstrap/wr_source/r10/q_reg<2>6bootstrap/wr_source/r10/q_reg<3>0U3851G=~(~(G3*~G2)*~(G1*G2))1U3847F=~(~(F3*~F2)*~(F1*F2))4bootstrap/wr_source/r11/q_reg<0>0U3819G=~(~(G3*~G2)*~(G1*G2))1U3815F=~(~(F3*~F2)*~(F1*F2))4bootstrap/wr_source/r11/q_reg<1>*BEL_U1689.HH=H10U2558G=~(((G2+~G4)+G3)*~(G1*G2))1U2554F=~(((F2+~F4)+F3)*~(F1*F2))4bootstrap/wr_source/r11/q_reg<3>6receiver_interface/dac/ser_dato_reg0U4141/rcp_ad_tri/y12<3>G=(G2+(G3*G4))+G11U4139/rcp_ad_tri/y12<1>F=(F2+(F3*F4))+F14bootstrap/wr_source/r12/q_reg<0>*BEL_U1665.HH=H10U2847G=G1*~G21U2845F=~(F1*~(F2*~(F3*F4)))4bootstrap/wr_source/r12/q_reg<1>6bootstrap/wr_source/r12/q_reg<2>0U3835G=~(~(G3*~G2)*~(G1*G2))1U3831F=~(~(F3*~F2)*~(F1*F2))4bootstrap/wr_source/r13/q_reg<0>0U3750G=~(~(G3*G4)*~(G1*G2))1U3747/n2111F=~((~F3+F4)+F1+F2)4bootstrap/wr_source/r13/q_reg<1>0U3400G=~(~(G3*G4)*~(G1*G2))1U3397F=~(~(F3*F4)*~(F1*F2))4bootstrap/wr_source/r13/q_reg<2>0U3592G=~(~(G3*G4)*~(G1*G2))1U3589F=~(~(F3*F4)*~(F1*F2))4bootstrap/wr_source/r20/q_reg<0>0U3239G=~(~(G3*G4)*~(G1*G2))1U3236F=~(~(F3*F4)*~(F1*F2))4bootstrap/wr_source/r20/q_reg<1>*BEL_U1661.HH=H10U2861G=~(~(G3*G4)*~(G1*G2))1U2858/n2107F=(F2+(F3*F4))+F14bootstrap/wr_source/r20/q_reg<2>6bootstrap/wr_source/r20/q_reg<3>0U4354/n1989G=(G2*~G3)*G11U4352F=~(F1*~(F2*F3))4bootstrap/wr_source/r21/q_reg<0>0U2638/bootstrap/wr_source/r21/n51<0>G=(~G3*G4)*G1*G21U2636/bootstrap/wr_source/r10/n51<0>F=(~F3*F4)*F1*F24bootstrap/wr_source/r21/q_reg<1>0U3580G=~(~(G3*G4)*~(G1*G2))1U3577F=~(~(F3*F4)*~(F1*F2))4bootstrap/wr_source/r21/q_reg<3>0U3586G=~(~(G3*G4)*~(G1*G2))1U3583F=~F1*((F3+F4)+F2)4bootstrap/wr_source/r22/q_reg<0>*BEL_U1691.HH=H10U4425/n2008G=(G2*~(~G3*G4))*G11U4422/n2247F=(F2*F3)*F14bootstrap/wr_source/r22/q_reg<1>6tod_receiver/sync/ale_latch_reg*BEL_U1693.HH=H10U4421G=~(~G2+G3)+G11U4418F=~(~F1*F2)4bootstrap/wr_source/r22/q_reg<2>6tod_receiver/tod_receiver/manchester_decoder/sdai_2_reg0U2500/n2171G=(G2*G3)*G11U2499/n1991F=(F2*F3)*F14bootstrap/wr_source/r22/q_reg<3>0U2510/n1833G=~((~G3+G4)+G1+G2)1U2508/bootstrap/wr_source/r20/n51<0>F=(~F3*F4)*F1*F24bootstrap/wr_source/r23/q_reg<0>0U2643/n1940G=(~G3*~G4)*G1*G21U2640/bootstrap/wr_source/r13/n51<0>F=(~F3*F4)*F1*F24bootstrap/wr_source/r23/q_reg<1>*BEL_U1685.HH=H10U2574G=~(((G2+~G4)+G3)*~(G1*G2))1U2570F=~(((F2+~F4)+F3)*~(F1*F2))4bootstrap/wr_source/r23/q_reg<2>6bootstrap/wr_source/r23/q_reg<3> U4458 cd_n.PAD U4567/SYM1 ck32khz.PADcp_n.PAD U4530 dig_dat_sel.PAD U4512 ext_bs_dati.PAD U4513/SYM1 ext_bs_dato.PAD U4514 ext_tod_in.PAD*BEL_U1663.HH=H10U2856G=~(((G2+~G4)+G3)*~(G1*G2))1U2852F=~(~(F1*(~F3+F2))*(F1+F2))4external_port/rcp_reg1_reg6external_port/rcp_reg1_reg*BEL_U1697.HH=H10U4410G=~(~(G2*G3)*~G1)1U4407F=~(~(F2*F3)*~F1)4external_port/rcp_reg1_reg6external_port/rcp_reg1_reg*BEL_U1695.HH=H10U4416G=~(~(G2*G3)*~G1)1U4413F=~(~(F2*F3)*~F1)4external_port/rcp_reg1_reg6internal_port/sync/ale_latch_reg0U3273/bootstrap/wr_source/r03/n51<0>G=(G2*~G3)*G11U3271/n2964F=~((~F3+F4)+F1+F2)4external_port/sync/ale_select_reg*BEL_U1725.HH=H10address_generator/int_addr_reg<16>/SYM2G=(G2*G3)+(~(~G2*G3)*G1)1U4213/n1805F=(F3+F4)+F1+F24external_port/sync/wr_n_latch_reg6iic_bus_interface/sync/ale_latch_reg0U2644/n1869G=~((G3+G4)+G1+G2)1U2646/n2436F=(F2*~F3)*F14external_port/sync/wren_reg6tod_receiver/tod_receiver/shift_reg_reg<3> U4531 fan_enable.PAD1U4039F=~(F1)4fan_interface/pwm/clock_reg<0>0U4028G=G1@(G2*G3)1U4030F=F1@(F2*F3)4fan_interface/pwm/clock_reg<10>6fan_interface/pwm/clock_reg<8>0U4082/n3668G=(G3*~G4)*(G1@G2)1U4079F=~F1*~(~(F3*F4)@F2)4fan_interface/pwm/clock_reg<11>6tod_receiver/tod_receiver/manchester_decoder/timeout_reg<1>0U4180G=~G1*~(~(G3*G4)@G2)1U4176F=~F1*(F2@F3)4fan_interface/pwm/clock_reg<1>6fan_interface/pwm/clock_reg<4>0U4034G=G1@((G3*G4)*G2)1U4032F=F1@(F2*F3)4fan_interface/pwm/clock_reg<2>6fan_interface/pwm/clock_reg<5>0U4173G=G1*(G2@(G3*G4))1U4170F=~F1*(F2@F3)4fan_interface/pwm/clock_reg<3>6tod_receiver/tod_receiver/manchester_decoder/timeout_reg<4>0U4090G=G1*(G2@G3)1U4094F=~F1*~(~(F3*F4)@F2)4fan_interface/pwm/clock_reg<6>6tod_receiver/tod_receiver/manchester_decoder/timeout_reg<9>0U4088G=~G1*(G2@G3)1U4085F=~F1*(F2@F3)4fan_interface/pwm/clock_reg<7>6fan_interface/pwm/clock_reg<9>0U3284G=~(~(G3*~G2)*~(G1*G2))1U3288F=~(~(F3*~F2)*~(F1*F2))4fan_interface/pwm/shift_reg_reg<0>0U3479G=~(~(G3*~G2)*~(G1*G2))1U3483F=~(~(F3*~F2)*~(F1*F2))4fan_interface/pwm/shift_reg_reg<10>6fan_interface/pwm/shift_reg_reg<11>0U3463G=~(~(G3*~G2)*~(G1*G2))1U3467F=~(~(F3*~F2)*~(F1*F2))4fan_interface/pwm/shift_reg_reg<12>6fan_interface/pwm/shift_reg_reg<13>0U3455G=~(~(G3*~G2)*~(G1*G2))1U3459F=~(~(F3*~F2)*~(F1*F2))4fan_interface/pwm/shift_reg_reg<14>6fan_interface/pwm/shift_reg_reg<15>0U3280G=G1*~G21U3278F=F1*~F24fan_interface/pwm/shift_reg_reg<16>6fan_interface/pwm/shift_reg_reg<17>0U3447G=~(~(G3*~G2)*~(G1*G2))1U3451F=~(~(F3*~F2)*~(F1*F2))4fan_interface/pwm/shift_reg_reg<1>6fan_interface/pwm/shift_reg_reg<2>0U3315G=~(~(G3*~G2)*~(G1*G2))1U3319F=~(~(F3*~F2)*~(F1*F2))4fan_interface/pwm/shift_reg_reg<3>6fan_interface/pwm/shift_reg_reg<4>0U3307G=~(~(G3*~G2)*~(G1*G2))1U3311F=~(~(F3*~F2)*~(F1*F2))4fan_interface/pwm/shift_reg_reg<5>6fan_interface/pwm/shift_reg_reg<6>0U2911G=G1*~G21U2915F=~(~(F3*~F2)*~(F1*F2))4fan_interface/pwm/shift_reg_reg<7>6fan_interface/pwm/shift_reg_reg<8>0U3657G=((~G3*~G4)*G2)+G11U3653F=~(~(F3*~F2)*~(F1*F2))4fan_interface/pwm/shift_reg_reg<9>*BEL_U1717.HH=H10U4318/n1904G=~((G3*G4)*~G1*~G2)1U4315/n1903F=~((F3*F4)*F1*F2)4fan_interface/sync/ale_latch_reg6iic_bus_interface/sync/wr_n_latch_reg0U3275G=G1*~G21U3276/n2966F=(F3*F4)*F1*F24fan_interface/sync/ale_select_reg U4549/SYM1 fan_phase_a.PAD U4550/SYM1 fan_phase_b.PAD U4551/SYM1 fan_phase_c.PAD U4563 fan_sense.PAD U4517/SYM1 fill_cc_dat.PAD U4516/SYM1 fill_clk.PAD U4519 fill_data.PAD U4520 fill_mode.PAD*BEL_U1669.HH=H10U2836G=~G1*~((G3*G4)*G2)1U2833/n2103F=(F2*~(~F3*F4))*F14fill_output/fill_cc_dat_reg6fill_output/fill_clk_reg0U2506G=G1*G21U2505/iic_bus_interface/iic/n451F=~((~F3+F4)+F1+F2)4fill_output/fill_req_reg*BEL_U1715.HH=H10U4321/n2222G=~((G3*G4)*~G1*G2)1U4319/n1905F=(F3+F4)+F1+F24fill_output/sync/ale_latch_reg6tod_receiver/tod_receiver/manchester_decoder/sdai_1_reg0U3043G=~(~G3*G4)*(G1+G2)1U3046/n2769F=(~F3*~F4)*F1*F24fill_output/sync/ale_select_reg*BEL_U1723.HH=H10U4217/n2160G=~((~G3*G4)*~G1*G2)1U4214/n1954F=(F3+F4)+F1+F24fill_output/sync/wr_n_latch_reg6receiver_interface/sync/ale_latch_reg0U2877/n2627G=(~G3*G4)*G1*G21U2879/n2626F=(F2*~F3)*F14fill_output/sync/wren_reg6synthesizer_interface/sync_low/ale_select_reg U4518/SYM1 fill_req.PAD U4526/SYM1 fm_hi_band.PAD U4460 fnc_cs_n.PAD1U2498F=~(F1)4iic_bus_interface/iic/busy_reg6interrupt_source/divide_reg<0>*U4439/n3924H=~((F+G)+~H1)0BEL_U1997.GG=G11U4441F=F1*~F24iic_bus_interface/iic/clock_reg<0>0U3630G=G1*(G2@(G3*G4))1U3633/n3284F=(F3*~F4)*(F1@F2)4iic_bus_interface/iic/clock_reg<1>6iic_bus_interface/iic/clock_reg<2>*U2908H=H1*(G@F)0BEL_U2050.GG=G11U2909/n2087F=(F2*F3)*F14iic_bus_interface/iic/clock_reg<3>0U3627G=G1*(G2@(G3*G4))1U3624F=F1*(F2@(F3*F4))4iic_bus_interface/iic/clock_reg<4>6iic_bus_interface/iic/clock_reg<7>*U3384H=F*(H1@G)0U3385/n3068G=(G2*G3)*G11U3388F=F1*~(F2*~F3)4iic_bus_interface/iic/clock_reg<5>*U2905H=H1*(G@F)0BEL_U2052.GG=G11U2906/n2073F=(F3*F4)*F1*F24iic_bus_interface/iic/clock_reg<6>0U2809G=G1*~G21U2811F=F1*~F24iic_bus_interface/iic/cycle_reg<0>0U3301G=~(~(G3*~G2)*~(G1*G2))1U3303F=F1*(F2@F3)4iic_bus_interface/iic/cycle_reg<1>0U3425G=G1*~(G2*~(G3*G4))1U3428F=F1*(F2@(F3*F4))4iic_bus_interface/iic/cycle_reg<2>0U3745G=~(~(G3*G4)*~(G1*G2))1U3742F=~(~(F3*F4)*~(F1*F2))4iic_bus_interface/iic/read_cycle_reg*U4452H=~(~(H1*G)*~F)0BEL_U1991.GG=G11U4456/n3938F=~(((~F4*F2)+~(F2+F3))+F1)4iic_bus_interface/iic/scl_reg0U3649G=~(~G1*G2)1U3647F=~(((~F2+F1)+F3)*~(F1*~F2))4iic_bus_interface/iic/sda_oe_n_reg0U3296G=~(~(G3*~G2)*(G1+~G2))1U3292F=~(~(F3*~F2)*~(F1*F2))4iic_bus_interface/iic/shift_reg_reg<0>6iic_bus_interface/iic/shift_reg_reg<11>0U3954G=~(~(G3*~G2)*~(G1*G2))1U3950F=~(~(F3*F4)*~(F1*F2))4iic_bus_interface/iic/shift_reg_reg<1>0U3082G=~(~(G3*~G2)*~(G1*G2))1U3086F=~(~(F3*~F2)*~(F1*F2))4iic_bus_interface/iic/shift_reg_reg<2>6iic_bus_interface/iic/shift_reg_reg<3>0U3073G=~(~(G3*~G2)*~(G1*G2))1U3077F=~(~(F3*~F2)*~(F1*F2))4iic_bus_interface/iic/shift_reg_reg<4>6iic_bus_interface/iic/shift_reg_reg<5>0U3064G=~(~(G3*~G2)*~(G1*G2))1U3068F=~(~(F3*~F2)*~(F1*F2))4iic_bus_interface/iic/shift_reg_reg<6>6iic_bus_interface/iic/shift_reg_reg<7>0U3228G=~(~(G3*~G2)*~(G1*G2))1U3232F=~(~(F3*~F2)*~(F1*F2))4iic_bus_interface/iic/shift_reg_reg<8>6iic_bus_interface/iic/shift_reg_reg<9>0U3412G=~(~(G3*G4)*~(G1*G2))1U3409F=~(~(F3*F4)*~(F1*F2))4iic_bus_interface/iic/stop_cycle_reg0U3269/n1799G=~((~G3+G4)+G1+G2)1U3267/n2961F=(F2*~F3)*F14iic_bus_interface/sync/ale_select_reg U4556/SYM1 iic_scl.PAD U4557/B/X_TRI U4557/I iic_sda.PAD0U3987G=~(~(G3*~G2)*~(G1*G2))1U3983F=~(~(F3*~F2)*~(F1*F2))4internal_port/rcp_reg2_reg0U3843G=~(~(G3*~G2)*~(G1*G2))1U3839F=~(~(F3*~F2)*~(F1*F2))4internal_port/rcp_reg2_reg0U4161G=~(G1+~(~(~G3+G4)+G2))1U4157F=((~F3*~F4)*F2)+F14internal_port/sync/ale_select_reg*BEL_U1671.HH=H10U2719G=~G1*~((G3*G4)*G2)1U2716/n1931F=(F2*~(~F3*F4))*F14internal_port/sync/wr_n_latch_reg6tod_receiver/tod_receiver/shift_reg_reg<1>0U3048G=G1*~G21U3050/n2772F=(F2*~F3)*F14internal_port/sync/wren_reg0U3807G=G1@((G3*G4)*G2)1U3806F=F1@F24interrupt_source/divide_reg<1>6rtc_divide/clock_reg<3>*U3676H=~(~F*~(H1@G))0BEL_U2010.GG=G11U3679F=~(~(F3@F4)*~(F1@F2))4interrupt_source/intr_reg*BEL_U1707.HH=H10U2482/n2230G=(G3+G4)+G1+G21U2481/n1808F=~((~F3*F4)*F1*F2)4interrupt_source/q_reg<0>6interrupt_source/q_reg<1>*BEL_U1711.HH=H10U4328/n2023G=(G3+G4)+G1+G21U4327/n1876F=~((~F3*F4)*~F1*F2)4interrupt_source/q_reg<2>6interrupt_source/q_reg<3>*BEL_U1709.HH=H10U2478/n2027G=~((~G3*~G4)*G1*G2)1U2475/n2024F=~((F3*F4)*~F1*F2)4interrupt_source/q_reg<4>6interrupt_source/q_reg<5> U4564 low_batt.PAD*BEL_U1673.HH=H10U2713G=~(((G2+~G4)+G3)*~(G1*G2))1U2709F=~(((F2+~F4)+F3)*~(F1*F2))4memory_interface/dff_reg6tod_receiver/tod_receiver/shift_reg_reg<7>*BEL_U1677.HH=H10U2698G=~(((G2+~G4)+G3)*~(G1*G2))1U2694F=~(((F2+~F4)+F3)*~(F1*F2))4memory_interface/rcp_1553_cs_n_reg6tod_receiver/tod_receiver/shift_reg_reg<8> U4535  power_on.PAD  U4536  ptt.PAD  U4538  radio_rly_ky.PAD  U4510/SYM1  rcp_1553_cs_n.PAD  U4509  rcp_1553_csi_n.PAD  U4470 rcp_a_bus<16>.PAD U4469 rcp_a_bus<17>.PAD U4468 rcp_a_bus<18>.PAD U4467 rcp_a_bus<19>.PAD U4486/B U4486/I rcp_ad_bus<0>.PAD U4476/B U4476/I rcp_ad_bus<10>.PAD U4475/B U4475/I rcp_ad_bus<11>.PAD U4474/B U4474/I rcp_ad_bus<12>.PAD U4473/B U4473/I rcp_ad_bus<13>.PAD U4472/B U4472/I rcp_ad_bus<14>.PAD U4471/B U4471/I rcp_ad_bus<15>.PAD U4485/B U4485/I rcp_ad_bus<1>.PAD U4484/B U4484/I rcp_ad_bus<2>.PAD U4483/B U4483/I rcp_ad_bus<3>.PAD U4482/B U4482/I rcp_ad_bus<4>.PAD U4481/B U4481/I rcp_ad_bus<5>.PAD U4480/B U4480/I rcp_ad_bus<6>.PAD U4479/B U4479/I rcp_ad_bus<7>.PAD U4478/B  U4478/I  rcp_ad_bus<8>.PAD  U4477/B! U4477/I! rcp_ad_bus<9>.PAD! U4506/SYM1" rcp_addr_bus<0>.PAD" U4496/SYM1# rcp_addr_bus<10>.PAD# U4495/SYM1$ rcp_addr_bus<11>.PAD$ U4494/SYM1% rcp_addr_bus<12>.PAD% U4493/SYM1& rcp_addr_bus<13>.PAD& U4492/SYM1' rcp_addr_bus<14>.PAD' U4491/SYM1( rcp_addr_bus<15>.PAD( U4490/SYM1) rcp_addr_bus<16>.PAD) U4489/SYM1* rcp_addr_bus<17>.PAD* U4488/SYM1+ rcp_addr_bus<18>.PAD+ U4487/SYM1, rcp_addr_bus<19>.PAD, U4505/SYM1- rcp_addr_bus<1>.PAD- U4504/SYM1. rcp_addr_bus<2>.PAD. U4503/SYM1/ rcp_addr_bus<3>.PAD/ U4502/SYM10 rcp_addr_bus<4>.PAD0 U4501/SYM11 rcp_addr_bus<5>.PAD1 U4500/SYM12 rcp_addr_bus<6>.PAD2 U4499/SYM13 rcp_addr_bus<7>.PAD3 U4498/SYM14 rcp_addr_bus<8>.PAD4 U4497/SYM15 rcp_addr_bus<9>.PAD5rcp_ale.PAD6 U4511/SYM17 rcp_eep_cs_n.PAD7 U45078 rcp_hlda.PAD8 U4508/SYM19 rcp_hold.PAD9 U4539/SYM1: rcp_ptt_int.PAD: U4463/B/X_TRI; U4463/I; rcp_rd_n.PAD; U4515/SYM1< rcp_tod_int.PAD< U4461/B/X_TRI= U4461/I= rcp_wr_n.PAD= U4553/SYM1> rcv_tune_clk.PAD> U4555/SYM1? rcv_tune_dat.PAD? U4552@ rcv_tune_lb.PAD@ U4554/SYM1A rcv_tune_ld_n.PADA U4565B ready_dsci.PADB U4566/SYM1C ready_dsco.PADC0U4063DG=~(((G3+G4)+G2)*~G1)1U4060/bootstrap/rd_control/n125<0>DF=~((F2*~F3)*F1)4receiver_interface/dac/busy_regD0U4266EG=~(~(G3*~G2)*~(G1*G2))1U4268/receiver_interface/dac/clock314<0>EF=~((F2+F3)+~F1)4receiver_interface/dac/clock_reg<0>E0U3224FG=~(~((~G2*G4)*G3)*(G1+~G2))1U3220/n2927FF=(F3*~F4)*(F1@F2)4receiver_interface/dac/clock_reg<1>F6synthesizer_interface/synth/cycle_reg<3>F*U3149GH=~((F+~H1)*~(G*~H1))0U3151/n2169GG=(~G3*G4)*G1*G21BEL_U1505.FGF=F14receiver_interface/dac/clock_reg<2>G6bootstrap/wr_source/r21/q_reg<2>G0U2807HG=G1*~(G2*~(G3*~G4))1U2803HF=~((~F3+F4)+~F2)+F14receiver_interface/dac/clock_reg<3>H0U2823IG=~(((G2+~G4)+G3)*~(G1*G2))1U2819IF=F1*~F24receiver_interface/dac/cycle_reg<0>I0U3212JG=G1*(G2@(G3*G4))1U3209JF=F1*(F2@F3)4receiver_interface/dac/cycle_reg<1>J6receiver_interface/dac/cycle_reg<2>J*U3941KH=F+G0U3947/n3552KG=(~G3*G4)*G1*G21U3945KF=F1*~(F2*~(F3*~F4))4receiver_interface/dac/cycle_reg<3>K*U2956LH=F+G0U2961/receiver_interface/dac/ser_clk258LG=(~G3*G4)*G1*G21U2959LF=F1*~(F2*(F3+F4))4receiver_interface/dac/ser_clk_regL1U4125MF=~(F1)4receiver_interface/dac/ser_ld_n_regM0U3206NG=~(~(G3*~G2)*~(G1*G2))1U3202NF=F1+F24receiver_interface/dac/shift_reg_reg<0>N6receiver_interface/dac/shift_reg_reg<11>N0U3004OG=~(~(G3*~G2)*~(G1*G2))1U3000OF=~(~(F3*~F2)*~(F1*F2))4receiver_interface/dac/shift_reg_reg<10>O6receiver_interface/dac/shift_reg_reg<3>O0U2780PG=~(G1+~((~G3+G4)+~G2))1U2782PF=F1*~F24receiver_interface/dac/shift_reg_reg<12>P6receiver_interface/dac/shift_reg_reg<1>P0U2995QG=~(~(G3*~G2)*~(G1*G2))1U2991QF=~(~(F3*~F2)*~(F1*F2))4receiver_interface/dac/shift_reg_reg<2>Q6receiver_interface/dac/shift_reg_reg<5>Q0U2986RG=~(~(G3*~G2)*~(G1*G2))1U2982RF=~(~(F3*~F2)*~(F1*F2))4receiver_interface/dac/shift_reg_reg<4>R6receiver_interface/dac/shift_reg_reg<7>R0U2977SG=~(~(G3*~G2)*~(G1*G2))1U2973SF=~(~(F3*~F2)*~(F1*F2))4receiver_interface/dac/shift_reg_reg<6>S6receiver_interface/dac/shift_reg_reg<9>S0U4241TG=~(G1*~(G2*G3))1U4239TF=~(F1*~((F3*F4)*F2))4receiver_interface/dac/shift_reg_reg<8>T*U4277/n3818UH=~((G+F)+~H1)0U4278/n1979UG=(G3+G4)+G1+G21address_generator/int_addr_reg<2>/SYM2UF=(F2*F3)+(~(~F2*F3)*F1)4receiver_interface/sync/ale_select_regU*BEL_U1679.HVH=H10U2690VG=~(((G2+~G4)+G3)*~(G1*G2))1U2686VF=~(((F2+~F4)+F3)*~(F1*F2))4receiver_interface/sync/wr_n_latch_regV6tod_receiver/tod_receiver/shift_reg_reg<15>V0U2736WG=G1*~G21U2738/n2513WF=(F2*~F3)*F14receiver_interface/sync/wren_regW0U3434XG=~((~G3+G4)+~G2)+G11U3435XF=~(F1+F2)4rtc_divide/clock_reg<0>X0U3621YG=~G1*~(~(G3*G4)@G2)1U3617YF=~F1*(F2@F3)4rtc_divide/clock_reg<4>Y6rtc_divide/clock_reg<5>Y*U2757ZH=~F*(H1@G)0BEL_U2064.GZG=G11U2760/rtc_divide/clk111ZF=(~F3*~F4)*F1*F24rtc_divide/clock_reg<6>Z6rtc_divide/clk_regZ0U3802[G=G1@((G3*G4)*G2)1U3804[F=F1@(F2*F3)4rtc_divide/clock_reg<7>[6rtc_divide/clock_reg<8>[ U4527/SYM1\ sc_fh_ind.PAD\ U4532] sqlch_tn_dis.PAD] U4528/SYM1^ squelch_ind.PAD^ U4544/SYM1_ syn_ctl_clk.PAD_ U4545/SYM1` syn_ctl_dat.PAD` U4546/SYM1a syn_ctl_en1.PADa U4547/SYM1b syn_ctl_en2.PADb U4548/SYM1c syn_ctl_en3.PADc0U2871/n2185dG=~((G2+G3)+G1)1U2870/n2619dF=(~F3*F4)*F1*F24synthesizer_interface/sync_high/ale_select_regd0U2864/n1870eG=~((G3+G4)+G1+G2)1U2863/n2613eF=(F2*~F3)*F14synthesizer_interface/sync_low/wren_rege0U2724/n2503fG=(G2*~G3)*G11U2726fF=F1*~F24synthesizer_interface/synth/clock_reg<0>f6synthesizer_interface/synth/ser_enbl_reg<2>f0U3606gG=~(G3*G4)*~(G1*G2)1U3603/n3258gF=(F4*(F1+F3))*~(F1*(~F2+F3))4synthesizer_interface/synth/clock_reg<1>g*U3867hH=~F*(H1@G)0BEL_U2002.GhG=G11U3870hF=~(F1*~(F2*~F3))4synthesizer_interface/synth/clock_reg<3>h0U3215iG=G1*(G2@(G3*G4))1U3217iF=F1*~F24synthesizer_interface/synth/cycle_reg<0>i6synthesizer_interface/synth/cycle_reg<2>i0U3089jG=G1*~G21U3091jF=F1*(F2@F3)4synthesizer_interface/synth/cycle_reg<1>j*U4100kH=F+G0U4106/n3691kG=(~G3*G4)*G1*G21U4104kF=F1*~(F2*~(F3*~F4))4synthesizer_interface/synth/cycle_reg<4>k0U3979lG=~(~(G3*~G2)*~(G1*G2))1U3975lF=~(~(F3*~F2)*~(F1*F2))4synthesizer_interface/synth/int_busy_regl1U4124mF=~(F1)4synthesizer_interface/synth/ser_clk_regm0U2730/n2506nG=(G2*~G3)*G11U2728/n2507nF=~((F2+F3)+~F1)4synthesizer_interface/synth/ser_enbl_reg<0>n6synthesizer_interface/synth/ser_enbl_reg<1>n0U3244oG=~(~(G3*G4)*~(G1*G2))1U3241/n2062oF=(F2+(F3*F4))+F14synthesizer_interface/synth/shift_reg_reg<0>o0U3902pG=~((~G3+G4)+~G2)+G11U3906pF=~((~F3+F4)+~F2)+F14synthesizer_interface/synth/shift_reg_reg<10>p6synthesizer_interface/synth/shift_reg_reg<11>p0U3894qG=~((~G3+G4)+~G2)+G11U3898qF=~((~F3+F4)+~F2)+F14synthesizer_interface/synth/shift_reg_reg<12>q6synthesizer_interface/synth/shift_reg_reg<13>q0U3886rG=~((~G3+G4)+~G2)+G11U3890rF=~((~F3+F4)+~F2)+F14synthesizer_interface/synth/shift_reg_reg<14>r6synthesizer_interface/synth/shift_reg_reg<15>r0U3878sG=~((~G3+G4)+~G2)+G11U3882sF=~((~F3+F4)+~F2)+F14synthesizer_interface/synth/shift_reg_reg<16>s6synthesizer_interface/synth/shift_reg_reg<17>s0U4023tG=~((~G3+G4)+~G2)+G11U4027tF=~((~F3+F4)+~F2)+F14synthesizer_interface/synth/shift_reg_reg<18>t6synthesizer_interface/synth/shift_reg_reg<19>t0U3732uG=~(~(G3*G4)*~(G1*G2))1U3729uF=~(~(F3*F4)*~(F1*F2))4synthesizer_interface/synth/shift_reg_reg<1>u0U3963vG=~(~(G3*~G2)*~(G1*G2))1U3959vF=~(~(F3*~F2)*~(F1*F2))4synthesizer_interface/synth/shift_reg_reg<20>v0U4015wG=~((~G3+G4)+~G2)+G11U4019wF=~((~F3+F4)+~F2)+F14synthesizer_interface/synth/shift_reg_reg<21>w6synthesizer_interface/synth/shift_reg_reg<22>w0U3439xG=~((~G3+G4)+~G2)+G11U3443xF=~((~F3+F4)+~F2)+F14synthesizer_interface/synth/shift_reg_reg<23>x0U3995yG=~((~G3+G4)+~G2)+G11U3991yF=~((~F3+F4)+~F2)+F14synthesizer_interface/synth/shift_reg_reg<2>y6synthesizer_interface/synth/shift_reg_reg<8>y0U4007zG=~((~G3+G4)+~G2)+G11U4011zF=~((~F3+F4)+~F2)+F14synthesizer_interface/synth/shift_reg_reg<3>z6synthesizer_interface/synth/shift_reg_reg<4>z0U3999{G=~((~G3+G4)+~G2)+G11U4003{F=~((~F3+F4)+~F2)+F14synthesizer_interface/synth/shift_reg_reg<5>{6synthesizer_interface/synth/shift_reg_reg<6>{0U4052|G=~(((G2+~G4)+G3)*~(G1*G2))1U4048|F=~(((F2+~F4)+F3)*~(F1*F2))4synthesizer_interface/synth/shift_reg_reg<7>|0U4068}G=G1*~G21U4066}F=~(F2+~(F3+F4))+F14synthesizer_interface/synth/shift_reg_reg<9>} U4533~ take_ctl.PAD~0U3052/n2776G=(G2*~G3)*G11U3055/internal_port/sync/ale_select67F=(~F3*~F4)*F1*F24tod_receiver/sync/ale_select_reg6tod_receiver/sync/wren_reg0U3250G=~(~(G3*G4)*~(G1*G2))1U3247F=~(~(F3*F4)*~(F1*F2))4tod_receiver/tod_en_reg0U3406G=~(~(G3*G4)*~(G1*G2))1U3403F=~F1*((F3+F4)+F2)4tod_receiver/tod_receiver/active_reg*U4448/n3931H=~((F+G)+~H1)0BEL_U1993.GG=G11U4449/tod_receiver/tod_receiver/stb192F=(F3*F4)*F1*F24tod_receiver/tod_receiver/cycle_reg<0>6tod_receiver/tod_receiver/stb_reg0U2966G=~(~(G3*~G2)*~(G1*G2))1U2969/n2701F=(F3*~F4)*(F1@F2)4tod_receiver/tod_receiver/cycle_reg<1>0U2827G=~(((~G2+G1)+G3)*~((~G2*G3)*G1))1U2830F=F1*(F2@(F3*F4))4tod_receiver/tod_receiver/cycle_reg<2>6tod_receiver/tod_receiver/manchester_decoder/stb_reg*U2934H=F*(H1+G)0U2935/n2675G=(G2*G3)*G11U2937F=F1*~F24tod_receiver/tod_receiver/cycle_reg<3>0U3598G=~(~(G3*G4)*~(G1*G2))1U3595F=~(~(F3*F4)*~(F1*F2))4tod_receiver/tod_receiver/dinv_reg0U3256G=~G1*((G3+G4)+G2)1U3253F=~(~(F3*F4)*~(F1*F2))4tod_receiver/tod_receiver/manchester_decoder/sel_fall_reg*U2597/n2404H=~((F+G)+~H1)0BEL_U1987.GG=G11U2599/n2290F=~((~F3+F4)+F1+F2)4tod_receiver/tod_receiver/manchester_decoder/timeout_reg<0>6tod_receiver/tod_receiver/manchester_decoder/to_dff_reg0U4096G=G1*(G2@G3)1U4099F=F1*(F2@(F3*F4))4tod_receiver/tod_receiver/manchester_decoder/timeout_reg<10>6tod_receiver/tod_receiver/manchester_decoder/timeout_reg<7>*U3916H=F*(G@H1)0U3917/n3527G=(G2*G3)*G11U3919F=F1*~F24tod_receiver/tod_receiver/manchester_decoder/timeout_reg<11>*U3666H=H1*(G@F)0BEL_U2016.GG=G11U3667/n2252F=(F3*F4)*F1*F24tod_receiver/tod_receiver/manchester_decoder/timeout_reg<12>*U3518H=H1*(G@F)0BEL_U2020.GG=G11U3519F=F1*F24tod_receiver/tod_receiver/manchester_decoder/timeout_reg<2>*U3672H=H1*(G@F)0BEL_U2012.GG=G11U3673/n2253F=(F2*F3)*F14tod_receiver/tod_receiver/manchester_decoder/timeout_reg<3>*U3669H=H1*(G@F)0BEL_U2014.GG=G11U3670/n1949F=(F3*F4)*F1*F24tod_receiver/tod_receiver/manchester_decoder/timeout_reg<5>0U4167G=G1*(G2@(G3*G4))1U4164F=F1*(F2@(F3*F4))4tod_receiver/tod_receiver/manchester_decoder/timeout_reg<6>6tod_receiver/tod_receiver/manchester_decoder/timeout_reg<8>*BEL_U1675.HH=H10U2705G=~(((G3*G2)+G1)*~(G1*G2))1U2701/n2268F=(F2*~(~F3*F4))*F14tod_receiver/tod_receiver/shift_reg_reg<0>6tod_receiver/tod_receiver/shift_reg_reg<2>0U4333G=~(G1*~(G2*G3))1U4331F=F1*~(F2*F3)4tod_receiver/tod_receiver/shift_reg_reg<10>*BEL_U1683.HH=H10U2582G=~(((G2+~G4)+G3)*~(G1*G2))1U2578F=~(((F2+~F4)+F3)*~(F1*F2))4tod_receiver/tod_receiver/shift_reg_reg<13>6tod_receiver/tod_receiver/shift_reg_reg<5>*BEL_U1681.HH=H10U2590G=~(((G2+~G4)+G3)*~(G1*G2))1U2586F=~(((F2+~F4)+F3)*~(F1*F2))4tod_receiver/tod_receiver/shift_reg_reg<14>6tod_receiver/tod_receiver/shift_reg_reg<6>0U3394G=~(~(G3*G4)*~(G1*G2))1U3391F=~(~(F3*F4)*~(F1*F2))4tod_receiver/tod_receiver/shift_reg_reg<4>0U2634/bootstrap/wr_source/r11/n51<0>G=(~G3*G4)*G1*G21U2632/bootstrap/wr_source/r22/n51<0>F=(~F3*F4)*F1*F24tod_receiver/tod_receiver/shift_reg_reg<9> U4537 tone_key.PAD*U2455H=F*~(~H1*G)1U2456/n2194F=~((F3+F4)+F1+F2)*U2459H=~(~(G*F)*~H1)1U2460F=F1*F2*U2463H=~(~(F*G)*~H1)1U2466/n2170F=(~F3*~F4)*F1*F2*U2469H=~(~(F*G)*~H1)1U2471/n1871F=(~F3*F4)*F1*F2*U2472/n2225H=(G*F)*H11U2473/n2226F=(F3*F4)*F1*F2*U2605/n1913H=(G*F)*H11U2606/n1916F=(F2*F3)*F1*U2609H=~(~F+G)+H11U2612/n1959F=(~F3*~F4)*F1*F2*U2615H=~(~(H1*G)*~F)1U2618F=~(F2+~(F3+F4))+F1*U2621H=~(~(H1*G)*~F)1U2624F=~(F2+~(F3+F4))+F1*U2627H=~(~(H1*G)*~F)1U2630F=~(F2+~(F3+F4))+F1*U2792H=F+H11U2793/n1945F=(F2*F3)*F14tod_receiver/tod_receiver/shift_reg_reg<11>*U2795H=H1*~F1U2798/n1807F=~((~F3*~F4)*F1*F2)4iic_bus_interface/iic/shift_reg_reg<10>*U2930H=~(~G+F)+H10U2932/n2215G=~((G2+G3)+~G1)1BEL_U1511.FF=F14bootstrap/wr_source/r12/q_reg<3>*U2939H=~(H1*(F+G))0U2941/n2680G=(~G3+G4)+G1+G21U2942/n2679F=~((F3*F4)*F1*F2)*U2945H=~((F+G)*~H1)0U2947/n2685G=(~G3+G4)+G1+G21U2948/n2684F=~((F3*F4)*F1*F2)*U2951H=~(~H1+G)+F0U2953/n2690G=(~G3+G4)+G1+G21U2955F=F1*~F2*U3135H=~(~F+G)+H10U3138/n1958G=~((~G3*G4)*~G1*G2)1BEL_U1509.FF=F14antenna_interface/ant/ser_clk_reg*U3142H=~(H1*~(G*~F))0U3145/n2234G=(~G3*~G4)*G1*G21BEL_U1507.FF=F14antenna_interface/ant/int_busy_reg*U3153H=H1*(G+F)0U3155/n2167G=~((~G3+G4)+G1+G2)1BEL_U1503.FF=F14bootstrap/rd_control/cycle_reg<1>*U3166H=~(~(H1*G)*~F)0U3171/n1874G=(G2*~G3)*G11U3169F=~(F2+~(F3+F4))+F1*U3172H=F+G0U3178G=~(~(G3*G4)*~(G1*G2))1U3175F=~(~(F3*F4)*(F1+F2))*U3179H=F+G0U3185G=~(~(G3*G4)*~(G1*G2))1U3182F=~(~(F3*F4)*(F1+F2))*U3186H=F+G0U3193G=~(~(G3*G4)*~(G1*G2))1U3190F=~(~(F3*~F4)*~(F1*F2))*U3194H=F+G0U3201G=~(~(G3*G4)*~(G1*G2))1U3198F=~(~(F3*~F4)*~(F1*F2))*U3352H=F+G0U3359G=~(~(G3*G4)*~(G1*G2))1U3356F=~(~(F3*~F4)*~(F1*F2))*U3360H=F+G0U3367G=~(~(G3*G4)*~(G1*G2))1U3364F=~(~(F3*~F4)*~(F1*F2))*U3368H=F+G0U3375G=~(~(G3*G4)*~(G1*G2))1U3372F=~(~(F3*~F4)*~(F1*F2))*U3376H=F+G0U3382G=~(~(G3*G4)*~(G1*G2))1U3379F=~((F3+F4)*~(F1*F2))*U3663/n2100H=~((G+F)+H1)1U3664/n2245F=(F3+F4)+F1+F20U3737G=~(~(G3*G4)*~(G1*G2))1U3734/n2263F=~((F3+F4)+(F1*F2))*U3873H=~(~G+F)+H11U3874/n1826F=~((F3+F4)+F1+F2)*U4122/n2051H=(F*G)*H11U4123/n1889F=(F2*F3)*F1*U4195/n2052H=(G*F)*H11U4196/n2054F=(F2*F3)*F1*U4197/n2013H=(G*F)*H11U4198/n2178F=(F2*F3)*F1*U4200H=H1*(G+F)1U4201F=F1*F2*U4203/bootstrap/rx/n278<0>H=(G*~F)*H11U4206/n2148F=(~F3*~F4)*F1*F2*U4208/n1825H=(H1*~G)*F1U4210/n2021F=~((F2+F3)+~F1)*U4284/n2151H=(F*G)*H11U4285/n2010F=(F2*F3)*F1*U4286/n2282H=(F*G)*H11U4287/n2153F=(F2*F3)*F1*U4288/bootstrap/wr_source/r01/n51<0>H=(H1*G)*F1U4290F=F1*~F2*U4291/n1919H=(F*G)*H11U4292/n2184F=(F2*F3)*F1*U4293/n1993H=(G*F)*H11U4296F=~F1*~((F3*F4)*F2)*U4299H=~(~(F*G)*~H1)1U4302/n1934F=(~F3*~F4)*F1*F2*U4305H=F*~(~H1*G)1U4306/n1865F=~((F3+F4)+F1+F2)*U4309H=~(H1+~(~F+G))1U4311F=F1*~F2*U4426/bootstrap/wr_source/r02/n51<0>H=(H1*G)*F1U4428F=F1*~F2*U4429/bootstrap/wr_source/r00/n51<0>H=(H1*G)*F1U4430F=~(F1+F2)*U4431/n2155H=(G*F)*H11U4432/n2154F=(F3*F4)*F1*F2*U4433/n2208H=(G*F)*H11U4434/n2156F=(F3*F4)*F1*F2 U4534 xmod_ctl.PADU4459U4466address_generator/int_addr<17>CLBaXMUX:F YMUX:G G3MUX:G3I G2MUX:G2I G:#LUT:G=(G2*G3)+(~(~G2*G3)*G1) F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1)01address_generator/int_addr<19>CLBaXMUX:F YMUX:G G3MUX:G3I G2MUX:G2I G:#LUT:G=(G2*G3)+(~(~G2*G3)*G1) F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1)01address_generator/int_addr<3>CLBaXMUX:F YMUX:G G3MUX:G3I G2MUX:G2I G:#LUT:G=(G2*G3)+(~(~G2*G3)*G1) F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1)01address_generator/int_addr<5>CLBaXMUX:F YMUX:G G3MUX:G3I G2MUX:G2I G:#LUT:G=(G2*G3)+(~(~G2*G3)*G1) F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1)01address_generator/int_addr<7>CLBaXMUX:F YMUX:G G3MUX:G3I G2MUX:G2I G:#LUT:G=(G2*G3)+(~(~G2*G3)*G1) F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1)0 1adf_home_enIOBOUTMUX:O SLEW:FAST am_mode_indIOBOUTMUX:O SLEW:FAST ant_sel IOBI1MUX:Iant_tune_clk IOBOUTMUX:O SLEW:FASTant_tune_dat IOBOUTMUX:O SLEW:FASTU1830 CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=(G3*~G4)*(G1@G2) F:#LUT:F=~((F2+F3)+~F1) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1914 CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~((~G4+G3)*~(G1*~(G2*G3))) F:#LUT:F=~F1*~(~(F3*F4)@F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1916CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=~G1*~(~(G3*G4)@G2) F:#LUT:F=~F1*(F2@F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U2036CLBCLKX:CLKNOT XMUX:F F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=~H1*(G@F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR *!0"1#4U2038CLBCLKX:CLKNOT XMUX:F XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=~F*(H1@G) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(~F1*F2) SRX:RESET FFX:#FF SETX:SR$*%0&1'4U2040CLBCLKX:CLKNOT XMUX:F F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=~H1*(G@F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR(*)0*1+4U1890CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=~G1*~(~(G3*G4)@G2) F:#LUT:F=~F1*~(~(F3*F4)@F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR,0-1.4/6U1834CLByCLKX:CLKNOT ECX:EC YMUX:G G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~(G1+G2) F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SETX:SR001124U1832CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=G1*(G2@(G3*G4)) F:#LUT:F=F1*(F2@F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR30415466U1995CLBCLKX:CLKNOT ECX:EC F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~H1+G)+F H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(~F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR7*8091:4U2164CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~H1+G)+F H0:G H2:F G:#LUT:G=~(G1*~((G3*G4)*G2)) F:#LUT:F=F1*(~(~F3+F4)+F2) SRX:RESET FFX:#FF SETX:SR;*<0=1>4U1525CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~((G3+G4)+G1+G2) F:#LUT:F=(~F3*~F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR?0@1A4U1836CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRB0C1D4E6U1629CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:DIN YMUX:G G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~G1*G2) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRF0G1H4I6U1838CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRJ0K1L4M6U1840CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRN0O1P4Q6U1842CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRR0S1T4U6U1844CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRV0W1X4Y6U1846CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRZ0[1\4]6U1756CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 EC:C4 G:#LUT:G=G1@G2 F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR^0_1`4a6U1655 CLBCLKX:CLKNOT CLKY:CLKNOT DY:DIN XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:DIN DIN:C2 SR:C3 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRb0c1d4e6U1950!CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=(~F3*~F4)*F1*F2 SRX:RESET FFX:#FF SETX:SRf0g1h4U1734"CLBCLKX:CLKNOT CLKY:CLKNOT DY:DIN XMUX:F XQMUX:QX YQMUX:QY DX:F DIN:C2 SR:C3 F:#LUT:F=~(F1) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRi1j4k6U1958#CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=(G2*~G3)*G1 F:#LUT:F=(F2*~F3)*F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRl0m1n4o6aud_ctl_clk$IOBOUTMUX:O SLEW:FASTpqaud_ctl_dat%IOB#TRI:TNOT I1MUX:I OUTMUX:O SLEW:FASTrstaud_ctl_stb&IOBOUTMUX:O SLEW:FASTuvU1569'CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=G1*G2 F:#LUT:F=F1*F2 SRX:RESET FFX:#FF SETX:SRw0x1y4U1713(CLBCLKX:CLKNOT CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:DIN H1:C1 DIN:C2 SR:C3 H:#LUT:H=H1 G:#LUT:G=(G3+G4)+G1+G2 F:#LUT:F=~((F3*F4)*~F1*F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRz*{0|1}4~6U1744)CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1@(G2*G3) F:#LUT:F=F1@F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U2008*CLBCLKX:CLKNOT XMUX:F XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=~F*(H1@G) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F2*~F3)*F1 SRX:RESET FFX:#FF SETX:SR*014U1888+CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1*(G2@(G3*G4)) F:#LUT:F=~F1*~(~(F3*F4)@F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1641,CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:DIN YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F DIN:C2 SR:C3 EC:C4 G:#LUT:G=(G2*G3)*G1 F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1850-CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 EC:C4 G:#LUT:G=~(~((~G1*G2)*G3)*(~G1+(G2*(G3+G4)))) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1848.CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1854/CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U18520CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 EC:C4 G:#LUT:G=~(((~G2+G3)+G1)*~(G1*~G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U17581CLBCLKX:CLKNOT ECX:EC YMUX:G G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=G1+G2 F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U15312CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~G1*~((G3*G4)*G2) F:#LUT:F=~(~((~F2*F4)*F3)*(F1+~F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U17903CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=G1*(G2@(G3*G4)) F:#LUT:F=F1*(F2@F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U21464CLBCLKX:CLKNOT ECX:EC YMUX:G G2MUX:G2I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=G1*~G2 F:#LUT:F=~F1*~(F2*F3) SRX:RESET FFX:#FF SETX:SR*014U15015CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:DIN YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U18566CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U18587CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U17728CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U17409CLBUCLKX:CLKNOT ECX:EC XQMUX:QX DX:F SR:C3 EC:C4 F:#LUT:F=~(F1) SRX:RESET FFX:#FF SETX:SR14U1719:CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~((~G3*G4)*G1*G2) F:#LUT:F=~((F3*F4)*F1*F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146U1972;CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=(~G3*~G4)*G1*G2 F:#LUT:F=F1*F2 SRX:RESET FFX:#FF SETX:SR014U2134<CLBCLKX:CLKNOT ECX:EC XMUX:H YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:G SR:C3 EC:C4 H:#LUT:H=F+G H0:G H2:F G:#LUT:G=(G2*G3)*G1 F:#LUT:F=(~F3*~F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR*014U1687=CLBCLKX:CLKNOT CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=~(((F2+~F4)+F3)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146U1966>CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 EC:C4 G:#LUT:G=(G2*~G3)*G1 F:#LUT:F=(~F3*F4)*F1*F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1657?CLBCLKX:CLKNOT CLKY:CLKNOT DY:DIN XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:DIN DIN:C2 SR:C3 G:#LUT:G=~G1*((G3+G4)+G2) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1962@CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=~((G2+G3)+~G1) F:#LUT:F=(F2*~F3)*F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146band_lo_0AIOBI1MUX:Iband_lo_1BIOBI1MUX:Iband_sel_0CIOBOUTMUX:O SLEW:FASTband_sel_1DIOBOUTMUX:O SLEW:FASTbit_fault_dscEIOBOUTMUX:O SLEW:FASTU2132FCLBCLKX:CLKNOT ECX:EC XMUX:F F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=H1*~(G*F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR*014U1948GCLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=F1*~(F2*F3) SRX:RESET FFX:#FF SETX:SR014U1864HCLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=(G2*(G3+G4))+G1 F:#LUT:F=(~F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR014U2026ICLBCLKX:CLKNOT ECX:EC XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(~(F3*~F2)*(F1+~F2)) SRX:RESET FFX:#FF SETX:SR*014U2032JCLBCLKX:CLKNOT ECX:EC F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4)))) SRX:RESET FFX:#FF SETX:SR*014U1910KCLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~(~(F3*F4)*(F1+F2)) SRX:RESET FFX:#FF SETX:SR014U2034LCLBCLKX:CLKNOT ECX:EC F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(~((~F2*F4)*F3)*(F1+~F2)) SRX:RESET FFX:#FF SETX:SR*014U1589MCLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~G1*G2) F:#LUT:F=~(~F1*F2) SRX:RESET FFX:#FF SETX:SR014U2154NCLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=(G3*G4)*G1*G2 F:#LUT:F=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4)))) SRX:RESET FFX:#FF SETX:SR*014U2028OCLBCLKX:CLKNOT ECX:EC F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4)))) SRX:RESET FFX:#FF SETX:SR*01 4U2158PCLBCLKX:CLKNOT ECX:EC G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H SR:C3 EC:C4 H:#LUT:H=F+G H0:G H2:F G:#LUT:G=~(~(G3*~G4)*~(G1*G2)) F:#LUT:F=F1*(F2@(F3*F4)) SRX:RESET FFX:#FF SETX:SR * 0 1 4U2024QCLBCLKX:CLKNOT ECX:EC F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4)))) SRX:RESET FFX:#FF SETX:SR*014U2150RCLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=~((F3+~F2)*~(F1*~F2)) SRX:RESET FFX:#FF SETX:SR*014U2022SCLBCLKX:CLKNOT ECX:EC F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(F1+~((F3*F4)+F2)) SRX:RESET FFX:#FF SETX:SR*014U2042TCLBCLKX:CLKNOT ECX:EC F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4)))) SRX:RESET FFX:#FF SETX:SR*014U2160UCLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=(G3*G4)*G1*G2 F:#LUT:F=~((F3+~F2)*~(F1*~F2)) SRX:RESET FFX:#FF SETX:SR*0 1!4U2030VCLBCLKX:CLKNOT ECX:EC F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(F1+~((F3*F4)+F2)) SRX:RESET FFX:#FF SETX:SR"*#0$1%4U2044WCLBCLKX:CLKNOT ECX:EC F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4)))) SRX:RESET FFX:#FF SETX:SR&*'0(1)4U2162XCLBCLKX:CLKNOT ECX:EC G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~H1+G)+F H0:G H2:F G:#LUT:G=G1*~(~G2*G3) F:#LUT:F=~(~(F3*F4)*~(F1*~F2)) SRX:RESET FFX:#FF SETX:SR**+0,1-4U2166YCLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=(G3*G4)*G1*G2 F:#LUT:F=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4)))) SRX:RESET FFX:#FF SETX:SR.*/00114U2152ZCLBCLKX:CLKNOT ECX:EC G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~H1+G)+F H0:G H2:F G:#LUT:G=G1*~(~G2*G3) F:#LUT:F=~(~(F3*F4)*~(F1*~F2)) SRX:RESET FFX:#FF SETX:SR2*304154U2168[CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=(G3*G4)*G1*G2 F:#LUT:F=~(~((~F1*F3)*F4)*(~F1+(F2*~(F3*~F4)))) SRX:RESET FFX:#FF SETX:SR6*708194U1912\CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*(G1+G2)) F:#LUT:F=~(~(F3*F4)*(F1+F2)) SRX:RESET FFX:#FF SETX:SR:0;1<4U2100]CLBCLKX:CLKNOT XMUX:F F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=H1*(G+F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR=*>0?1@4U1565^CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=((~G3*~G4)*G2)+G1 F:#LUT:F=~((~F3+F4)+~F2)+F1 SRX:RESET FFX:#FF SETX:SRA0B1C4U1978_CLBCLKX:CLKNOT ECX:EC YMUX:H F4MUX:F4I XQMUX:QX DX:F H1:C1 SR:C3 EC:C4 H:#LUT:H=H1+F H2:F F:#LUT:F=(~F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SRD*E1F4U1555`CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=F1*(F2@(F3*F4)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRG0H1I4J6U2156aCLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=F1*~(F2*~(F3*~F4)) SRX:RESET FFX:#FF SETX:SRK*L0M1N4U1934bCLB}CLKX:CLKNOT YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 G:#LUT:G=(G3*G4)*G1*G2 F:#LUT:F=~(F1+F2) SRX:RESET FFX:#FF SETX:SRO0P1Q4U1860cCLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=(G2*~(G3*G4))+G1 F:#LUT:F=~(((~F2+F3)+F1)*~(F1*~F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRR0S1T4U6U1651dCLBCLKX:CLKNOT CLKY:CLKNOT DY:DIN YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F DIN:C2 SR:C3 EC:C4 G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=~(~((~F1*F2)*F3)*(~F1+(F2*(F3+F4)))) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRV0W1X4Y6U1513eCLBCLKX:CLKNOT CLKY:CLKNOT DY:DIN YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:H H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1@(F*G) H0:G H2:F G:#LUT:G=(G3*G4)*G1*G2 F:#LUT:F=F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRZ*[0\1]4^6U1926fCLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=~G1*~(~(G3*G4)@G2) F:#LUT:F=~F1*~(~(F3*F4)@F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR_0`1a4b6U1760gCLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~(((G3+G4)+G2)*~G1) F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SETX:SRc0d1e4U1515hCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=F1*(F2@(F3*F4)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRf0g1h4i6U1984iCLBCLKX:CLKNOT ECX:EC XMUX:F XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(G*H1)*~(F*~H1)) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=F1*F2 SRX:RESET FFX:#FF SETX:SRj*k0l1m4U2136jCLBCLKX:CLKNOT ECX:EC G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H SR:C3 EC:C4 H:#LUT:H=F+G H0:G H2:F G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=F1*(~(~F3+F4)+F2) SRX:RESET FFX:#FF SETX:SRn*o0p1q4U1653kCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:DIN YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F DIN:C2 SR:C3 EC:C4 G:#LUT:G=G1*(G2@G3) F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRr0s1t4u6U1918lCLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=(F3*~F4)*(F1@F2) SRX:RESET FFX:#FF SETX:SRv0w1x4U2046mCLBCLKX:CLKNOT ECX:EC XMUX:F XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~H1*(G@F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=F1*F2 SRX:RESET FFX:#FF SETX:SRy*z0{1|4U1517nCLBCLKX:CLKNOT CLKY:CLKNOT DY:DIN XMUX:F F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:H H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1*F H2:F F:#LUT:F=(F3*F4)*F1*F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR}*~146U1705oCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 EC:C4 H:#LUT:H=H1 G:#LUT:G=~((G3*G4)*G1*G2) F:#LUT:F=(F3+F4)+F1+F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF*0146U1703pCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 EC:C4 H:#LUT:H=H1 G:#LUT:G=(G3+G4)+G1+G2 F:#LUT:F=(~F3+F4)+F1+F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF*0146U1701qCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(~((G3*G4)*G2)*~G1) F:#LUT:F=~(F1*~((F3*~F4)*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF*0146U1699rCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(~(G2*G3)*~G1) F:#LUT:F=((~F3*~F4)*F2)+F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF*0146U1938sCLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=(G2*~G3)*G1 F:#LUT:F=(F3*~F4)*(F1+F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1872tCLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=~G1*~(~(G3*G4)@G2) F:#LUT:F=~F1*~(~(F3*F4)@F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1868uCLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=~G1*~(~(G3*G4)@G2) F:#LUT:F=~F1*(F2@F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1866vCLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=~G1*~(~(G3*G4)@G2) F:#LUT:F=~F1*~(~(F3*F4)@F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1870wCLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=~G1*(G2@G3) F:#LUT:F=~F1*(F2@F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U2004xCLBCLKX:CLKNOT XMUX:F F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=~H1*(G@F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR*014U2144yCLBCLKX:CLKNOT XMUX:F G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=~F*(H1@G) H0:G H2:F G:#LUT:G=(G3*G4)*G1*G2 F:#LUT:F=~(F1*(F2+F3)) SRX:RESET FFX:#FF SETX:SR*014U2006zCLBCLKX:CLKNOT XMUX:F F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=~H1*(G@F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR*014U1824{CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SETX:SR014U1989|CLBCLKX:CLKNOT ECX:EC XMUX:F XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(G*H1)*~(F*~H1)) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=F1*F2 SRX:RESET FFX:#FF SETX:SR*014U1766}CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~((~(G3*G4)@G2)*G1) F:#LUT:F=F1*(F2@(F3*F4)) SRX:RESET FFX:#FF SETX:SR014U2142~CLBCLKX:CLKNOT ECX:EC G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H SR:C3 EC:C4 H:#LUT:H=F+G H0:G H2:F G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=F1*~(F2*~(F3*~F4)) SRX:RESET FFX:#FF SETX:SR*014U1611CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=(G2*~G3)*G1 F:#LUT:F=(~F3*~F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR014U1563CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(G1*~((G3*G4)*G2)) F:#LUT:F=~(~((F3*F4)*F2)*~F1) SRX:SET FFX:#FF SETX:SR014U2048CLBCLKX:CLKNOT ECX:EC XMUX:F G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=~(~H1+F)+G H0:G H2:DIN G:#LUT:G=(G3*(G4+G2))*(G1+~G2) F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1) SRX:SET FFX:#FF SETX:SR*014U2054CLBCLKX:CLKNOT ECX:EC XMUX:F G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=~(~H1+F)+G H0:G H2:DIN G:#LUT:G=(G3*(G4+G2))*(G1+~G2) F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1) SRX:SET FFX:#FF SETX:SR*014U2056CLBCLKX:CLKNOT ECX:EC XMUX:F G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=~(~H1+F)+G H0:G H2:DIN G:#LUT:G=(G3*(G4+G2))*(G1+~G2) F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1) SRX:SET FFX:#FF SETX:SR*014U2058CLBCLKX:CLKNOT ECX:EC XMUX:F G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=~(~H1+F)+G H0:G H2:DIN G:#LUT:G=(G3*(G4+G2))*(G1+~G2) F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1) SRX:SET FFX:#FF SETX:SR*014U2060CLBCLKX:CLKNOT ECX:EC XMUX:F G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=~(~H1+F)+G H0:G H2:DIN G:#LUT:G=(G3*(G4+G2))*(G1+~G2) F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1) SRX:SET FFX:#FF SETX:SR*014U2062CLBCLKX:CLKNOT ECX:EC XMUX:F G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=~(~H1+F)+G H0:G H2:DIN G:#LUT:G=(G3*~(~G4*G1))*(G1+G2) F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1) SRX:SET FFX:#FF SETX:SR*014U2066CLBCLKX:CLKNOT ECX:EC XMUX:F G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=~(~H1+F)+G H0:G H2:DIN G:#LUT:G=(G3*~(~G4*G1))*(G1+G2) F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1) SRX:SET FFX:#FF SETX:SR*014U2068CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~H1+F H2:F G:#LUT:G=(G2*G3)+(~(~G2*G3)*G1) F:#LUT:F=(F3*~(~F4*F1))*(F1+F2) SRX:SET FFX:#FF SETX:SR*014U1768CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1*(G2@G3) F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1579CLBCLKX:CLKNOT CLKY:CLKNOT DY:DIN YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(((~G2+G1)*~((G3+G4)*~G2))*(~G1+G3+G4)) F:#LUT:F=F1*(F2@(F3*F4)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U2116CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:H F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=(H1*~G)*F H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(~F3*~F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR*014U1750CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 EC:C4 G:#LUT:G=~(G1@G2) F:#LUT:F=~(F1@F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETY:SR0146U1553CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=G1*~(G2*~(G3*G4)) F:#LUT:F=~(F1*~(F2*F3)) SRX:RESET FFX:#FF SETX:SR014U1575CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=(G2+(G3*G4))+G1 F:#LUT:F=(F2+(F3*F4))+F1 SRX:RESET FFX:#FF SETX:SR014U1727CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F XQMUX:QX YQMUX:QY DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 F:#LUT:F=~(F1) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*146U1729CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XQMUX:QX YQMUX:QY DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*46U1721CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=(G3+G4)+G1+G2 F:#LUT:F=(F3+F4)+F1+F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*01 4 6U1573CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~((((F1+F4)+F2)@F3)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR 0 1 4U1545CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=(G2*G3)*G1 F:#LUT:F=(~F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR014U1557CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(G1*~(G2*G3)) F:#LUT:F=F1*~(~F2*F3) SRX:RESET FFX:#FF SETX:SR014U1605CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1631CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~((G3+G4)+(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1597CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1585CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~G1*G2) F:#LUT:F=~(((F2+~F4)+F3)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1567CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=G1*G2 F:#LUT:F=(F2*F3)*F1 SRX:RESET FFX:#FF SETX:SR 0!1"4U1527CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=G1*(G2+G3) F:#LUT:F=~((~F3+F4)+F1+F2) SRX:RESET FFX:#FF SETX:SR#0$1%4U1667CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~G1*~((G3*G4)*G2) F:#LUT:F=(F2*~(~F3*F4))*F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR&*'0(1)4*6U1659CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR+*,0-1.4/6U1591CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR001124U1599CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR304154U1689CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=~(((F2+~F4)+F3)*~(F1*F2)) SRX:RESET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SR6*708194:6U1577CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=(G2+(G3*G4))+G1 F:#LUT:F=(F2+(F3*F4))+F1 SRX:RESET FFX:#FF SETX:SR;0<1=4U1665CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=G1*~G2 F:#LUT:F=~(F1*~(F2*~(F3*F4))) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR>*?0@1A4B6U1595CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SRC0D1E4U1613CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~((~F3+F4)+F1+F2) SRX:RESET FFX:#FF SETX:SRF0G1H4U1637CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SRI0J1K4U1623CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SRL0M1N4U1649CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SRO0P1Q4U1661CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=(F2+(F3*F4))+F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRR*S0T1U4V6U1551CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=(G2*~G3)*G1 F:#LUT:F=~(F1*~(F2*F3)) SRX:RESET FFX:#FF SETX:SRW0X1Y4U1537CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=(~F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SRZ0[1\4U1627CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR]0^1_4U1625CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~F1*((F3+F4)+F2) SRX:RESET FFX:#FF SETX:SR`0a1b4U1691CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=(G2*~(~G3*G4))*G1 F:#LUT:F=(F2*F3)*F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRc*d0e1f4g6U1693CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(~G2+G3)+G1 F:#LUT:F=~(~F1*F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRh*i0j1k4l6U1547CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=(G2*G3)*G1 F:#LUT:F=(F2*F3)*F1 SRX:RESET FFX:#FF SETX:SRm0n1o4U1541CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+G1+G2) F:#LUT:F=(~F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SRp0q1r4U1535CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=(~G3*~G4)*G1*G2 F:#LUT:F=(~F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SRs0t1u4U1685CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=~(((F2+~F4)+F3)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRv*w0x1y4z6cd_nIOBI1MUX:I{|ck32khzIOBOUTMUX:O SLEW:FAST}~cp_nCLKIOBCLKINMUX:CLKINdig_dat_selIOBI1MUX:Iext_bs_datiIOBI1MUX:Iext_bs_datoIOBOUTMUX:O SLEW:FASText_tod_inIOBI1MUX:IU1663CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=~(~(F1*(~F3+F2))*(F1+F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146U1697CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(~(G2*G3)*~G1) F:#LUT:F=~(~(F2*F3)*~F1) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146U1695CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(~(G2*G3)*~G1) F:#LUT:F=~(~(F2*F3)*~F1) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146U1944CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=(G2*~G3)*G1 F:#LUT:F=~((~F3+F4)+F1+F2) SRX:RESET FFX:#FF SETX:SR014U1725CLBCLKX:CLKNOT CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:DIN H1:C1 DIN:C2 SR:C3 H:#LUT:H=H1 G:#LUT:G=(G2*G3)+(~(~G2*G3)*G1) F:#LUT:F=(F3+F4)+F1+F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146U1533CLBCLKX:CLKNOT CLKY:CLKNOT DY:DIN YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F DIN:C2 SR:C3 EC:C4 G:#LUT:G=~((G3+G4)+G1+G2) F:#LUT:F=(F2*~F3)*F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146fan_enableIOBI1MUX:IU1742CLBHCLKX:CLKNOT XQMUX:QX DX:F SR:C3 F:#LUT:F=~(F1) SRX:RESET FFX:#FF SETX:SR14U1748CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1@(G2*G3) F:#LUT:F=F1@(F2*F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1886CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=(G3*~G4)*(G1@G2) F:#LUT:F=~F1*~(~(F3*F4)@F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1874CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=~G1*~(~(G3*G4)@G2) F:#LUT:F=~F1*(F2@F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1746CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1@((G3*G4)*G2) F:#LUT:F=F1@(F2*F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1876CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1*(G2@(G3*G4)) F:#LUT:F=~F1*(F2@F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1882CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1*(G2@G3) F:#LUT:F=~F1*~(~(F3*F4)@F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1884CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=~G1*(G2@G3) F:#LUT:F=~F1*(F2@F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1788CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1770CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1774CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1776CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1940CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=G1*~G2 F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1778CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1780CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1782CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1519CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:F YMUX:G G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=G1*~G2 F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1762CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=((~G3*~G4)*G2)+G1 F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1717CLBCLKX:CLKNOT CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:DIN H1:C1 DIN:C2 SR:C3 H:#LUT:H=H1 G:#LUT:G=~((G3*G4)*~G1*~G2) F:#LUT:F=~((F3*F4)*F1*F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146U1942CLBCLKX:CLKNOT ECX:EC YMUX:G G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=G1*~G2 F:#LUT:F=(F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR014fan_phase_aIOBOUTMUX:O SLEW:FASTfan_phase_bIOBOUTMUX:O SLEW:FASTfan_phase_cIOBOUTMUX:O SLEW:FASTfan_senseIOBI1MUX:Ifill_cc_datIOBOUTMUX:O SLEW:FASTfill_clkIOBOUTMUX:O SLEW:FASTfill_dataIOBI1MUX:Ifill_modeIOBI1MUX:IU1669CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~G1*~((G3*G4)*G2) F:#LUT:F=(F2*~(~F3*F4))*F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146U1543CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=G1*G2 F:#LUT:F=~((~F3+F4)+F1+F2) SRX:RESET FFX:#FF SETX:SR014U1715CLBCLKX:CLKNOT CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:DIN H1:C1 DIN:C2 SR:C3 H:#LUT:H=H1 G:#LUT:G=~((G3*G4)*~G1*G2) F:#LUT:F=(F3+F4)+F1+F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR * 0 1 4 6U1956CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~(~G3*G4)*(G1+G2) F:#LUT:F=(~F3*~F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR014U1723CLBCLKX:CLKNOT CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:DIN H1:C1 DIN:C2 SR:C3 H:#LUT:H=H1 G:#LUT:G=~((~G3*G4)*~G1*G2) F:#LUT:F=(F3+F4)+F1+F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146U1960CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=(F2*~F3)*F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146fill_reqIOBOUTMUX:O SLEW:FASTfm_hi_bandIOBOUTMUX:O SLEW:FASTfnc_cs_nIOBI1MUX:IU1549CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:F XQMUX:QX YQMUX:QY DX:DIN DIN:C2 SR:C3 EC:C4 F:#LUT:F=~(F1) SRX:RESET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SR 1!4"6U1997CLBCLKX:CLKNOT XMUX:F XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=~((F+G)+~H1) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SETX:SR#*$0%1&4U1920CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1*(G2@(G3*G4)) F:#LUT:F=(F3*~F4)*(F1@F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR'0(1)4*6U2050CLBCLKX:CLKNOT XMUX:F XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=H1*(G@F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F2*F3)*F1 SRX:RESET FFX:#FF SETX:SR+*,0-1.4U1922CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1*(G2@(G3*G4)) F:#LUT:F=F1*(F2@(F3*F4)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR/0011426U2170CLBCLKX:CLKNOT XMUX:F G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=F*(H1@G) H0:G H2:F G:#LUT:G=(G2*G3)*G1 F:#LUT:F=F1*~(F2*~F3) SRX:RESET FFX:#FF SETX:SR3*405164U2052CLBCLKX:CLKNOT XMUX:F F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=H1*(G@F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR7*8091:4U1826CLBwCLKX:CLKNOT ECX:EC YMUX:G G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=G1*~G2 F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SETX:SR;0<1=4U1784CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=F1*(F2@F3) SRX:RESET FFX:#FF SETX:SR>0?1@4U1936CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=G1*~(G2*~(G3*G4)) F:#LUT:F=F1*(F2@(F3*F4)) SRX:RESET FFX:#FF SETX:SRA0B1C4U1615CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SRD0E1F4U1991CLBCLKX:CLKNOT ECX:EC F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(((~F4*F2)+~(F2+F3))+F1) SRX:SET FFX:#FF SETX:SRG*H0I1J4U1764CLBCLKX:CLKNOT ECX:EC YMUX:G G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~(~G1*G2) F:#LUT:F=~(((~F2+F1)+F3)*~(F1*~F2)) SRX:RESET FFX:#FF SETX:SRK0L1M4U1786CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*(G1+~G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:SET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SRN0O1P4Q6U1609CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:SET FFX:#FF SETX:SRR0S1T4U1794CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:SET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SRU0V1W4X6U1796CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:SET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SRY0Z1[4\6U1798CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:SET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SR]0^1_4`6U1800CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:SET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SRa0b1c4d6U1633CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SRe0f1g4U1946CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+G1+G2) F:#LUT:F=(F2*~F3)*F1 SRX:RESET FFX:#FF SETX:SRh0i1j4iic_sclIOBOUTMUX:O SLEW:FASTkliic_sdaIOB#TRI:TNOT I1MUX:I OUTMUX:O SLEW:FASTmnoU1601CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SRp0q1r4U1593CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SRs0t1u4U1571CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(G1+~(~(~G3+G4)+G2)) F:#LUT:F=((~F3*~F4)*F2)+F1 SRX:RESET FFX:#FF SETX:SRv0w1x4U1671CLBCLKX:CLKNOT CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~G1*~((G3*G4)*G2) F:#LUT:F=(F2*~(~F3*F4))*F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRy*z0{1|4}6U1954CLBoCLKX:CLKNOT YMUX:G G2MUX:G2I XQMUX:QX DX:F SR:C3 G:#LUT:G=G1*~G2 F:#LUT:F=(F2*~F3)*F1 SRX:RESET FFX:#FF SETX:SR~014U1752CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1@((G3*G4)*G2) F:#LUT:F=F1@F2 SRX:SET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U2010CLBCLKX:CLKNOT F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=~(~F*~(H1@G)) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(~(F3@F4)*~(F1@F2)) SRX:RESET FFX:#FF SETX:SR*014U1707CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 EC:C4 H:#LUT:H=H1 G:#LUT:G=(G3+G4)+G1+G2 F:#LUT:F=~((~F3*F4)*F1*F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF*0146U1711CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 EC:C4 H:#LUT:H=H1 G:#LUT:G=(G3+G4)+G1+G2 F:#LUT:F=~((~F3*F4)*~F1*F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF*0146U1709CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 EC:C4 H:#LUT:H=H1 G:#LUT:G=~((~G3*~G4)*G1*G2) F:#LUT:F=~((F3*F4)*~F1*F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF*0146low_battIOBI1MUX:IU1673CLBCLKX:CLKNOT CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=~(((F2+~F4)+F3)*~(F1*F2)) SRX:SET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146U1677CLBCLKX:CLKNOT CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=~(((F2+~F4)+F3)*~(F1*F2)) SRX:SET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146power_on IOBI1MUX:Iptt IOBI1MUX:Iradio_rly_ky IOBI1MUX:Ircp_1553_cs_n IOBOUTMUX:O SLEW:FASTrcp_1553_csi_n IOBI1MUX:Ircp_a_bus<16>IOBI1MUX:Ircp_a_bus<17>IOBI1MUX:Ircp_a_bus<18>IOBI1MUX:Ircp_a_bus<19>IOBI1MUX:Ircp_ad_bus<0>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<10>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<11>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<12>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<13>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<14>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<15>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<1>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<2>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<3>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<4>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<5>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<6>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<7>IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<8> IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_ad_bus<9>!IOB TRI:T I1MUX:I OUTMUX:O SLEW:FASTrcp_addr_bus<0>"IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<10>#IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<11>$IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<12>%IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<13>&IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<14>'IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<15>(IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<16>)IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<17>*IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<18>+IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<19>,IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<1>-IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<2>.IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<3>/IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<4>0IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<5>1IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<6>2IOBTRI:T OUTMUX:O SLEW:FASTrcp_addr_bus<7>3IOBTRI:T OUTMUX:O SLEW:FAST rcp_addr_bus<8>4IOBTRI:T OUTMUX:O SLEW:FAST  rcp_addr_bus<9>5IOBTRI:T OUTMUX:O SLEW:FAST  rcp_ale6CLKIOBCLKINMUX:CLKINrcp_eep_cs_n7IOBOUTMUX:O SLEW:FASTrcp_hlda8IOBI1MUX:Ircp_hold9IOBOUTMUX:O SLEW:FASTrcp_ptt_int:IOBOUTMUX:O SLEW:FASTrcp_rd_n;IOB&TRI:TNOT I1MUX:I OUTMUX:ONOT SLEW:FASTrcp_tod_int<IOBOUTMUX:O SLEW:FASTrcp_wr_n=IOB#TRI:TNOT I1MUX:I OUTMUX:O SLEW:FASTrcv_tune_clk>IOBOUTMUX:O SLEW:FAST rcv_tune_dat?IOBOUTMUX:O SLEW:FAST!"rcv_tune_lb@IOBI1MUX:I#$rcv_tune_ld_nAIOBOUTMUX:O SLEW:FAST%&ready_dsciBIOBI1MUX:I'(ready_dscoCIOBOUTMUX:O SLEW:FAST)*U1583DCLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(((G3+G4)+G2)*~G1) F:#LUT:F=~((F2*~F3)*F1) SRX:RESET FFX:#FF SETX:SR+0,1-4U1862ECLBCLKX:CLKNOT XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~((F2+F3)+~F1) SRX:RESET FFX:#FF SETX:SR.0/104U1802FCLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~((~G2*G4)*G3)*(G1+~G2)) F:#LUT:F=(F3*~F4)*(F1@F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR10213446U1505GCLBCLKX:CLKNOT CLKY:CLKNOT DY:DIN YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:H H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=~((F+~H1)*~(G*~H1)) H0:G H2:F G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR5*60718496U1828HCLBCLKX:CLKNOT YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 G:#LUT:G=G1*~(G2*~(G3*~G4)) F:#LUT:F=~((~F3+F4)+~F2)+F1 SRX:RESET FFX:#FF SETX:SR:0;1<4U1822ICLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SETX:SR=0>1?4U1806JCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=G1*(G2@(G3*G4)) F:#LUT:F=F1*(F2@F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR@0A1B4C6U2140KCLBCLKX:CLKNOT ECX:EC G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H SR:C3 EC:C4 H:#LUT:H=F+G H0:G H2:F G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=F1*~(F2*~(F3*~F4)) SRX:RESET FFX:#FF SETX:SRD*E0F1G4U2190LCLBCLKX:CLKNOT ECX:EC XMUX:H YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:G SR:C3 EC:C4 H:#LUT:H=F+G H0:G H2:F G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=F1*~(F2*(F3+F4)) SRX:SET FFX:#FF SETX:SRH*I0J1K4U1736MCLBSCLKX:CLKNOT ECX:EC XQMUX:QX DX:F SR:C3 EC:C4 F:#LUT:F=~(F1) SRX:SET FFX:#FF SETX:SRL1M4U1808NCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=F1+F2 SRX:SET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SRN0O1P4Q6U1810OCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:SET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SRR0S1T4U6U1529PCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(G1+~((~G3+G4)+~G2)) F:#LUT:F=F1*~F2 SRX:SET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SRV0W1X4Y6U1812QCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:SET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SRZ0[1\4]6U1814RCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:SET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SR^0_1`4a6U1816SCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:SET FFX:#FF SRY:SET FFY:#FF SETX:SR SETY:SRb0c1d4e6U1561TCLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(G1*~(G2*G3)) F:#LUT:F=~(F1*~((F3*F4)*F2)) SRX:SET FFX:#FF SETX:SRf0g1h4U2118UCLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=~((G+F)+~H1) H0:G H2:DIN G:#LUT:G=(G3+G4)+G1+G2 F:#LUT:F=(F2*F3)+(~(~F2*F3)*F1) SRX:RESET FFX:#FF SETX:SRi*j0k1l4U1679VCLBCLKX:CLKNOT CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=~(((F2+~F4)+F3)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRm*n0o1p4q6U1970WCLBoCLKX:CLKNOT YMUX:G G2MUX:G2I XQMUX:QX DX:F SR:C3 G:#LUT:G=G1*~G2 F:#LUT:F=(F2*~F3)*F1 SRX:RESET FFX:#FF SETX:SRr0s1t4U1932XCLBCLKX:CLKNOT YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~(F1+F2) SRX:RESET FFX:#FF SETX:SRu0v1w4U1924YCLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=~G1*~(~(G3*G4)@G2) F:#LUT:F=~F1*(F2@F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SRx0y1z4{6U2064ZCLBCLKX:CLKNOT CLKY:CLKNOT DY:F XMUX:F F4MUX:F4I XQMUX:QX YQMUX:QY DX:H H1:C1 SR:C3 H:#LUT:H=~F*(H1@G) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(~F3*~F4)*F1*F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR|*}0~146U1754[CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1@((G3*G4)*G2) F:#LUT:F=F1@(F2*F3) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146sc_fh_ind\IOBOUTMUX:O SLEW:FASTsqlch_tn_dis]IOBI1MUX:Isquelch_ind^IOBOUTMUX:O SLEW:FASTsyn_ctl_clk_IOBOUTMUX:O SLEW:FASTsyn_ctl_dat`IOBOUTMUX:O SLEW:FASTsyn_ctl_en1aIOBOUTMUX:O SLEW:FASTsyn_ctl_en2bIOBOUTMUX:O SLEW:FASTsyn_ctl_en3cIOBOUTMUX:O SLEW:FASTU1964dCLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~((G2+G3)+G1) F:#LUT:F=(~F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR014U1968eCLBCLKX:CLKNOT YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:F SR:C3 G:#LUT:G=~((G3+G4)+G1+G2) F:#LUT:F=(F2*~F3)*F1 SRX:RESET FFX:#FF SETX:SR014U1976fCLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=(G2*~G3)*G1 F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1928gCLBCLKX:CLKNOT YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 G:#LUT:G=~(G3*G4)*~(G1*G2) F:#LUT:F=(F4*(F1+F3))*~(F1*(~F2+F3)) SRX:RESET FFX:#FF SETX:SR014U2002hCLBCLKX:CLKNOT XMUX:F XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=~F*(H1@G) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~(F1*~(F2*~F3)) SRX:RESET FFX:#FF SETX:SR*014U1804iCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=G1*(G2@(G3*G4)) F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1792jCLB{CLKX:CLKNOT ECX:EC YMUX:G G2MUX:G2I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=G1*~G2 F:#LUT:F=F1*(F2@F3) SRX:RESET FFX:#FF SETX:SR014U2138kCLBCLKX:CLKNOT ECX:EC G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:H SR:C3 EC:C4 H:#LUT:H=F+G H0:G H2:F G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=F1*~(F2*~(F3*~F4)) SRX:RESET FFX:#FF SETX:SR*014U1603lCLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1738mCLBUCLKX:CLKNOT ECX:EC XQMUX:QX DX:F SR:C3 EC:C4 F:#LUT:F=~(F1) SRX:RESET FFX:#FF SETX:SR14U1974nCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=(G2*~G3)*G1 F:#LUT:F=~((F2+F3)+~F1) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1647oCLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=(F2+(F3*F4))+F1 SRX:RESET FFX:#FF SETX:SR014U1892pCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~((~F3+F4)+~F2)+F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1894qCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~((~F3+F4)+~F2)+F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1896rCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~((~F3+F4)+~F2)+F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1898sCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~((~F3+F4)+~F2)+F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1900tCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~((~F3+F4)+~F2)+F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1619uCLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1607vCLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=~(~(F3*~F2)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1902wCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~((~F3+F4)+~F2)+F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1930xCLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~((~F3+F4)+~F2)+F1 SRX:RESET FFX:#FF SETX:SR014U1908yCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~((~F3+F4)+~F2)+F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1904zCLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~((~F3+F4)+~F2)+F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1906{CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:F SR:C3 EC:C4 G:#LUT:G=~((~G3+G4)+~G2)+G1 F:#LUT:F=~((~F3+F4)+~F2)+F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1587|CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=~(((F2+~F4)+F3)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1581}CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=G1*~G2 F:#LUT:F=~(F2+~(F3+F4))+F1 SRX:RESET FFX:#FF SETX:SR014take_ctl~IOBI1MUX:IU1952CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G XMUX:F G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 EC:C4 G:#LUT:G=(G2*~G3)*G1 F:#LUT:F=(~F3*~F4)*F1*F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U1645CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1635CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~F1*((F3+F4)+F2) SRX:RESET FFX:#FF SETX:SR014U1993CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:F XMUX:F F4MUX:F4I XQMUX:QX YQMUX:QY DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=~((F+G)+~H1) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F3*F4)*F1*F2 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146U1818CLBCLKX:CLKNOT ECX:EC YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:F SR:C3 EC:C4 G:#LUT:G=~(~(G3*~G2)*~(G1*G2)) F:#LUT:F=(F3*~F4)*(F1@F2) SRX:RESET FFX:#FF SETX:SR014U1820CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 EC:C4 G:#LUT:G=~(((~G2+G1)+G3)*~((~G2*G3)*G1)) F:#LUT:F=F1*(F2@(F3*F4)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U2198CLBCLKX:CLKNOT ECX:EC XMUX:F G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 SR:C3 EC:C4 H:#LUT:H=F*(H1+G) H0:G H2:F G:#LUT:G=(G2*G3)*G1 F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SETX:SR* 0 1 4U1621CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR 0 14U1643CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~G1*((G3+G4)+G2) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SR014U1987CLBCLKX:CLKNOT CLKY:CLKNOT DY:F XMUX:F F4MUX:F4I XQMUX:QX YQMUX:QY DX:H H1:C1 SR:C3 H:#LUT:H=~((F+G)+~H1) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=~((~F3+F4)+F1+F2) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR*0146U1880CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1*(G2@G3) F:#LUT:F=F1*(F2@(F3*F4)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR0146U2148CLBCLKX:CLKNOT XMUX:F G3MUX:G3I G2MUX:G2I XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=F*(G@H1) H0:G H2:F G:#LUT:G=(G2*G3)*G1 F:#LUT:F=F1*~F2 SRX:RESET FFX:#FF SETX:SR*014U2016CLBCLKX:CLKNOT XMUX:F F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=H1*(G@F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR* 0!1"4U2020CLB}CLKX:CLKNOT XMUX:F XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=H1*(G@F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=F1*F2 SRX:RESET FFX:#FF SETX:SR#*$0%1&4U2012CLBCLKX:CLKNOT XMUX:F XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=H1*(G@F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F2*F3)*F1 SRX:RESET FFX:#FF SETX:SR'*(0)1*4U2014CLBCLKX:CLKNOT XMUX:F F4MUX:F4I XQMUX:QX DX:H H1:C1 SR:C3 H:#LUT:H=H1*(G@F) H0:G H2:F G:#LUT:G=G1 F:#LUT:F=(F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SR+*,0-1.4U1878CLBCLKX:CLKNOT CLKY:CLKNOT DY:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY DX:F SR:C3 G:#LUT:G=G1*(G2@(G3*G4)) F:#LUT:F=F1*(F2@(F3*F4)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR/0011426U1675CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(((G3*G2)+G1)*~(G1*G2)) F:#LUT:F=(F2*~(~F3*F4))*F1 SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR3*40516476U1559CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(G1*~(G2*G3)) F:#LUT:F=F1*~(F2*F3) SRX:RESET FFX:#FF SETX:SR8091:4U1683CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=~(((F2+~F4)+F3)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR;*<0=1>4?6U1681CLBCLKX:CLKNOT ECX:EC CLKY:CLKNOT DY:H XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX YQMUX:QY ECY:EC DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1 G:#LUT:G=~(((G2+~G4)+G3)*~(G1*G2)) F:#LUT:F=~(((F2+~F4)+F3)*~(F1*F2)) SRX:RESET FFX:#FF SRY:RESET FFY:#FF SETX:SR SETY:SR@*A0B1C4D6U1639CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*~(F1*F2)) SRX:RESET FFX:#FF SETX:SRE0F1G4U1539CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I XQMUX:QX DX:DIN DIN:C2 SR:C3 EC:C4 G:#LUT:G=(~G3*G4)*G1*G2 F:#LUT:F=(~F3*F4)*F1*F2 SRX:RESET FFX:#FF SETX:SRH0I1J4tone_keyIOBI1MUX:IKLU2088CLB\XMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=F*~(~H1*G) H0:SR H2:F F:#LUT:F=~((F3+F4)+F1+F2)M*N1U2086CLBJXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=~(~(G*F)*~H1) H0:SR H2:F F:#LUT:F=F1*F2O*P1U2084CLB^XMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=~(~(F*G)*~H1) H0:SR H2:F F:#LUT:F=(~F3*~F4)*F1*F2Q*R1U2082CLB]XMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=~(~(F*G)*~H1) H0:SR H2:F F:#LUT:F=(~F3*F4)*F1*F2S*T1U2080CLBWXMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=(G*F)*H1 H0:SR H2:F F:#LUT:F=(F3*F4)*F1*F2U*V1U2078CLBJXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=(G*F)*H1 H0:SR H2:F F:#LUT:F=(F2*F3)*F1W*X1U2076CLB[XMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=~(~F+G)+H1 H0:SR H2:F F:#LUT:F=(~F3*~F4)*F1*F2Y*Z1U2074CLBYXMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=~(~(H1*G)*~F) H0:SR H2:F F:#LUT:F=~(F2+~(F3+F4))+F1[*\1U2072CLBYXMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=~(~(H1*G)*~F) H0:SR H2:F F:#LUT:F=~(F2+~(F3+F4))+F1]*^1U2070CLBYXMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=~(~(H1*G)*~F) H0:SR H2:F F:#LUT:F=~(F2+~(F3+F4))+F1_*`1U1523CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:H XQMUX:QX DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=F+H1 H2:F F:#LUT:F=(F2*F3)*F1 SRX:RESET FFX:#FF SETX:SRa*b1c4U1521CLBCLKX:CLKNOT ECX:EC XMUX:F YMUX:H F4MUX:F4I XQMUX:QX DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1*~F H2:F F:#LUT:F=~((~F3*~F4)*F1*F2) SRX:SET FFX:#FF SETX:SRd*e1f4U1511CLBCLKX:CLKNOT ECX:EC XMUX:H YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=~(~G+F)+H1 H0:G H2:F G:#LUT:G=~((G2+G3)+~G1) F:#LUT:F=F1 SRX:RESET FFX:#FF SETX:SRg*h0i1j4U2196CLB{XMUX:H G3MUX:G3I G2MUX:G2I F4MUX:F4I H1:C1 H:#LUT:H=~(H1*(F+G)) H0:G H2:F G:#LUT:G=(~G3+G4)+G1+G2 F:#LUT:F=~((F3*F4)*F1*F2)k*l0m1U2194CLB|XMUX:H G3MUX:G3I G2MUX:G2I F4MUX:F4I H1:C1 H:#LUT:H=~((F+G)*~H1) H0:G H2:F G:#LUT:G=(~G3+G4)+G1+G2 F:#LUT:F=~((F3*F4)*F1*F2)n*o0p1U2192CLBmXMUX:F YMUX:H G3MUX:G3I G2MUX:G2I H1:C1 H:#LUT:H=~(~H1+G)+F H0:G H2:F G:#LUT:G=(~G3+G4)+G1+G2 F:#LUT:F=F1*~F2q*r0s1U1509CLBCLKX:CLKNOT ECX:EC XMUX:H YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=~(~F+G)+H1 H0:G H2:F G:#LUT:G=~((~G3*G4)*~G1*G2) F:#LUT:F=F1 SRX:SET FFX:#FF SETX:SRt*u0v1w4U1507CLBCLKX:CLKNOT ECX:EC XMUX:H YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=~(H1*~(G*~F)) H0:G H2:F G:#LUT:G=(~G3*~G4)*G1*G2 F:#LUT:F=F1 SRX:RESET FFX:#FF SETX:SRx*y0z1{4U1503CLBCLKX:CLKNOT ECX:EC XMUX:H YMUX:G G3MUX:G3I G2MUX:G2I XQMUX:QX DX:DIN H1:C1 DIN:C2 SR:C3 EC:C4 H:#LUT:H=H1*(G+F) H0:G H2:F G:#LUT:G=~((~G3+G4)+G1+G2) F:#LUT:F=F1 SRX:RESET FFX:#FF SETX:SR|*}0~14U2188CLBXMUX:H YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I H1:C1 H:#LUT:H=~(~(H1*G)*~F) H0:G H2:F G:#LUT:G=(G2*~G3)*G1 F:#LUT:F=~(F2+~(F3+F4))+F1*01U2186CLBvXMUX:H G3MUX:G3I G2MUX:G2I F4MUX:F4I H:#LUT:H=F+G H0:G H2:F G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*(F1+F2))*01U2184CLBvXMUX:H G3MUX:G3I G2MUX:G2I F4MUX:F4I H:#LUT:H=F+G H0:G H2:F G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*F4)*(F1+F2))*01U2182CLBxXMUX:H G3MUX:G3I G2MUX:G2I F4MUX:F4I H:#LUT:H=F+G H0:G H2:F G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*~F4)*~(F1*F2))*01U2180CLBxXMUX:H G3MUX:G3I G2MUX:G2I F4MUX:F4I H:#LUT:H=F+G H0:G H2:F G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*~F4)*~(F1*F2))*01U2178CLBxXMUX:H G3MUX:G3I G2MUX:G2I F4MUX:F4I H:#LUT:H=F+G H0:G H2:F G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*~F4)*~(F1*F2))*01U2176CLBxXMUX:H G3MUX:G3I G2MUX:G2I F4MUX:F4I H:#LUT:H=F+G H0:G H2:F G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*~F4)*~(F1*F2))*01U2174CLBxXMUX:H G3MUX:G3I G2MUX:G2I F4MUX:F4I H:#LUT:H=F+G H0:G H2:F G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~(~(F3*~F4)*~(F1*F2))*01U2172CLBvXMUX:H G3MUX:G3I G2MUX:G2I F4MUX:F4I H:#LUT:H=F+G H0:G H2:F G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~((F3+F4)*~(F1*F2))*01U2018CLBZXMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=~((G+F)+H1) H0:SR H2:F F:#LUT:F=(F3+F4)+F1+F2*1U1617CLBeXMUX:F YMUX:G G3MUX:G3I G2MUX:G2I F4MUX:F4I G:#LUT:G=~(~(G3*G4)*~(G1*G2)) F:#LUT:F=~((F3+F4)+(F1*F2))01U2000CLB\XMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=~(~G+F)+H1 H0:SR H2:F F:#LUT:F=~((F3+F4)+F1+F2)*1U2130CLBJXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=(F*G)*H1 H0:SR H2:F F:#LUT:F=(F2*F3)*F1*1U2128CLBJXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=(G*F)*H1 H0:SR H2:F F:#LUT:F=(F2*F3)*F1*1U2126CLBJXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=(G*F)*H1 H0:SR H2:F F:#LUT:F=(F2*F3)*F1*1U2124CLBEXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=H1*(G+F) H0:SR H2:F F:#LUT:F=F1*F2*1U2122CLBZXMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=(G*~F)*H1 H0:SR H2:F F:#LUT:F=(~F3*~F4)*F1*F2*1U2120CLBOXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=(H1*~G)*F H0:SR H2:F F:#LUT:F=~((F2+F3)+~F1)*1U2114CLBJXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=(F*G)*H1 H0:SR H2:F F:#LUT:F=(F2*F3)*F1*1U2112CLBJXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=(F*G)*H1 H0:SR H2:F F:#LUT:F=(F2*F3)*F1*1U2110CLBFXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=(H1*G)*F H0:SR H2:F F:#LUT:F=F1*~F2*1U2098CLBJXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=(F*G)*H1 H0:SR H2:F F:#LUT:F=(F2*F3)*F1*1U2096CLB[XMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=(G*F)*H1 H0:SR H2:F F:#LUT:F=~F1*~((F3*F4)*F2)*1U2094CLB^XMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=~(~(F*G)*~H1) H0:SR H2:F F:#LUT:F=(~F3*~F4)*F1*F2*1U2092CLB\XMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=F*~(~H1*G) H0:SR H2:F F:#LUT:F=~((F3+F4)+F1+F2)*1U2090CLBKXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=~(H1+~(~F+G)) H0:SR H2:F F:#LUT:F=F1*~F2*1U2108CLBFXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=(H1*G)*F H0:SR H2:F F:#LUT:F=F1*~F2*1U2106CLBHXMUX:F YMUX:H H1:C1 SR:C3 H:#LUT:H=(H1*G)*F H0:SR H2:F F:#LUT:F=~(F1+F2)*1U2104CLBWXMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=(G*F)*H1 H0:SR H2:F F:#LUT:F=(F3*F4)*F1*F2*1U2102CLBWXMUX:F YMUX:H F4MUX:F4I H1:C1 SR:C3 H:#LUT:H=(G*F)*H1 H0:SR H2:F F:#LUT:F=(F3*F4)*F1*F2*1xmod_ctlIOBI1MUX:IU4459BUFGLSU4466BUFGLSn2194NFXF2F2F2F2MF1n2193MHYF1F1F1F1n2165$FXGC3MGC3(F3F3F3F3F4F4F3F3F3F3F3F3F3F38F3F30F3F3,F1F1+G3G3 F1F1F3F34F1F13G3G3G3G3G2G2F3F3(F4F4'G4G4dG4G4nF3F3F3F3G3G3F3F3G3G3F4F4G4G4AG2G2{F4F4zG4G45F4F4F1n1889FXMH1C1F3F3F1F1G2G2F1n2213 /GYNF1F1'G1G1,F4F44F4F4F4F4G1G1G4G4G1G1.G0n2212 GYNF2F2G1G1G1G1 G2G2F1F1F1F1?G1G1F1F1G1G1G0n1866 7GYNF3F3G1G1F4F4;F4F4?G3G3F1F1G3G3G3G36G0n1864 GYNF4F4G1G1#G1G1G1G1F3F3?G4G4G1G1G4G4G0bootstrap/rx/sreg274<5>QYQ.DC2DC2DC2yDC2UDC2kDC2"DC2 DC2KDC2OGC3H1C1.H1C1H1C1H1C1H1C1G1G1F2F2H1C1H1C1>H1C19DC2F4F4bootstrap/decode/n701<0> PFXCEC4CEC4OF1bootstrap/decode/n691 OHYCEC4bootstrap/decode/int_active686 FXOH1C1D1n2130 FXPF1F1F3F3F1bootstrap/n53 QXQCCEC4PF2F2G2G2F2F2F2F2iG1G1sG2G2n2170RFXBF2F2QF1n1877GYQGC3F1F1G0audio_interface/aud/n365QHYyCEC4audio_interface/aud/busy360QXQyDC2CEC4H1C1QH1C1F2F2F2F2F2F2F2F2G2G2F2F2F2F2F2F2G2G2F2F2G2G2F2F2G2G2F2F2G2G2GG2G2F1F1n1825HYGC3RF1F1G1G1G2G2F2F2audio_interface/aud/cycle<2>QYQRF3F3F1F1F3F3F3F3G3G3G2G2G3G3audio_interface/aud/cycle<1>QXQRF4F4F4F4F2F2G3G3F2F2G2G2mG1G1audio_interface/aud/cycle<0> QXQRF2F2F3F3F3F3G4G4F4F4G4G4mG3G3G2G2n2079FXSGC3=F2F2n1871TFXgH1C1&F1F1F3F3G4G4SF1antenna_interface/ant/n248SHY{CEC4antenna_interface/ant/int_busy243nQXQACEC4SH1C1CF2F2BG2G2GF2F2KF2F2JG2G2OF2F2NG2G2SF2F2RG2G2WF2F2VG2G2[F2F2ZG2G2_F2F2{DC2G2G2G1G1n2216"FXTF4F4*F3F3 F1n2215hGYdH1C1TF1F1gG0antenna_interface/ant/ser_clk234.QXQTF2F2eF4F4-F2F2wDC2antenna_interface/ant/clock<6>QYQTF3F3eF2F2*F4F4G2G2rtc_divide/clock<5>{QYQUGC3~F2F2xG2G2rtc_divide/clock<4>zQXQUH1C1yF2F2xG3G3F4F4n2226 VFXyF3F3xG4G4UF1n2225!UHY}G1G1F3F3G4G4!F3F3rtc_divide/clock<3>"QYQVF2F2G1G1G4G4rtc_divide/clock<2>#QYQVF4F4G1G1G2G2G2G2rtc_divide/clock<1>$QYQVF3F3G2G2G2G2G4G4G3G3rtc_divide/clock<0>%wQXQVF1F1vF1F1G3G3G1G1G3G3G1G1synthesizer_interface/synth/cycle<4>&QXQF1F1G3G3F4F4synthesizer_interface/synth/cycle<3>'4QYQF4F4G2G2F1F11G2G2synthesizer_interface/synth/cycle<2>(QYQG1G1F2F21G3G3gF4F4G2G2n2025)sFXF3F3qF1n2024*FX G4G4synthesizer_interface/synth/clock<4>+QYQrG4G4F1F1G2G2G2G2synthesizer_interface/synth/clock<3>,QXQqH1C1H1C1G3G3G4G4synthesizer_interface/synth/clock<2>-bQYQrG1G1G1G1_G2G2G3G3synthesizer_interface/synth/clock<1>.QXQrG2G2F3F3G3G3_G4G4G1G1n2027/GYsF2F2F3F3F2F2wF3F3vG4G4tod_receiver/tod_receiver/shift_reg211<4>0QYQGDC2F1F1JF4F4F1F1tod_receiver/tod_receiver/shift_reg211<2>1}QYQF3F3PF2F2F3F33H1C1tod_receiver/tod_receiver/shift_reg211<1>26QXQF2F2SG2G2yH1C1F2F2tod_receiver/tod_receiver/n217<0>3QYQ:CEC4GCEC46CEC4CCEC4>CEC4JCEC4mF2F2^CEC4G1G1CEC4}CEC4F4F4CEC4CEC4qCEC4cCEC47CE4DCE4?CE4n18084FXoG4G4tod_receiver/tod_receiver/shift_reg211<5>5GQXQG2G2eG4G4G2G2;H1C1tod_receiver/tod_receiver/shift_reg211<3>67QYQG1G1DC2G1G1G2G2tod_receiver/tod_receiver/shift_reg211<10>7JQXQ:DC2G3G3FG4G4G3G3rcp_tod_rd<15>8qQYQF3F3G4G4G4G4n22309GYoG2G2tod_receiver/tod_receiver/shift_reg211<15>:CQXQmF4F4F3F3F1F1mH1C1tod_receiver/tod_receiver/shift_reg211<14>;>QXQCDC2mF1F1F3F3F2F2tod_receiver/tod_receiver/shift_reg211<12><cQXQmF3F3F3F3^DC2F3F3tod_receiver/tod_receiver/shift_reg211<11>=:QXQlG3G3F4F4G2G2cDC2n2231>FXoG1G1n2232?GYlG4G4tod_receiver/tod_receiver/shift_reg211<6>@?QYQpF3F3F4F4^F3F3@H1C1n2233AFXlG2G2tod_receiver/tod_receiver/shift_reg211<9>BQYQJDC2pF4F4G1G1G3G3tod_receiver/tod_receiver/shift_reg211<8>CQYQpF1F1G2G2H1C1F3F3tod_receiver/tod_receiver/shift_reg211<7>DDQYQpF2F2G3G3LG3G3H1C1tod_receiver/tod_receiver/shift_reg211<13>E^QYQ>DC2oG3G3F3F3G4G4n1882FGYlG1G1rcp_audio_rd<8>G yQXQH1C1F1F1G1G1F1F1G2G2G1G1mG2G2G1G1G2G2n2021HFXF1F1F2F2VG3G3F1audio_interface/aud/n394<4>IFXCEC4CEC4CEC4CE4CE4audio_interface/aud/clock<4>JQXQGC3F2F2F2F2F1F1F4F4VG2G2audio_interface/aud/clock<2>KQYQH1C1F3F3G1G1F3F3eF2F2VG4G4n2201LFXG1G1n1880MFXF1F1G1G1G4G4F1audio_interface/aud/read_cycleNQXQF2F2G3G3F4F4audio_interface/aud/n413<0>O GYCEC4CEC4CEC4CEC4CE4CE4CE4CE4interrupt_source/divide<0>P"QYQF1F1G1G1 F1F1n2155RHYF4F4nF1F1AG4G4n1991SnFXF4F4F1F1bs_addr<17>TQXQF1F1nF2F2AG3G3pG1G1n2171UmGYF4F4G4G4n2080VwGY9F4F4F4F4antenna_interface/ant/cycle<4>W>QXQ=F3F3;H1C1G4G4F3F3antenna_interface/ant/cycle<3>X:QXQ=F4F49F3F37H1C1F2F2F2F2antenna_interface/ant/cycle<2>Y6QYQ<G4G49F1F13G2G2F1F1F3F3synthesizer_interface/synth/cycle<1>ZQXQF2F2 G3G3G1G1gF3F3G3G3synthesizer_interface/synth/cycle<0>[QXQF2F2G4G4F3F3 G2G2G3G3gF2F2rcp_sts2_rd\ QXQF1F1F3F3F1F1F4F4F1F1G1G1F1F1G2G2G2G2JF1F1gF1F1n2081]GYG4G41G4G4n1983^?GY@F4F4F4F4n1982_GYF4F4F3F3F4F4iic_bus_interface/iic/n451`FXMCEC4iic_bus_interface/iic/cycle<2>aCQXQBF2F2G4G4#G3G3@F2F2WG3G3G3G3F2F2iic_bus_interface/iic/cycle<1>b@QXQ?F3F3BF4F4F3F3#G2G2@F3F3WG1G1F1F1interrupt_source/n131<0>cGYCEC4CEC4CEC4CE4CE4CE4interrupt_source/divide<1>dQXQF2F2G2G2n2055eFXGC3G3G3G4G4EF4F4[F4F4qF4F4F1n1940fsGY7G4G4/G4G4G4G4G4G4F3F3fG1G1G1G1[F1F1ZG1G1qF1F1tF1F1IF1F1HG1G1bootstrap/wr_source/r20/n51<0>gqFXNCEC4QCEC4UCEC4VCE4bootstrap/decode/address<5>hQXQ7G1G1/G1G1G1G1G1G1F4F4F2F2fG3G3G2G2[F3F3ZG2G2qF2F2tF3F3 G3G3IF2F2HG3G3bootstrap/decode/address<4>iQXQ7G2G2/G2G2G2G2G2G2F3F3F4F4fG2G2G3G3[F2F2ZG3G3qF3F3tF2F2 G2G2IF3F3HG2G2rcp_addr_tri/y12<4>j CGYINOG3G3F3F3 F3F3$F3F3GF2F2pG2G2hG2G2rcp_addr_tri/y12<3>k DFXINOG4G4F2F2 F1F1$F2F2GF3F3pG1G1hG1G1rcp_addr_tri/y12<2>l GYINOG2G2F4F4 F2F2$F1F1GF1F1pG3G3hG4G4rcp_addr_tri/y12<1>m FXINOG1G1F1F1 F4F4$F4F4GF4F4pG4G4hG3G3n1833npGY,G1G1G1G1G3G3EG1G1n2285oGYIDC2antenna_interface/ant/shift_reg_Q276<6>pYQYQG3G3address_generator/int_addr30<7>q OUTI1F2F2F2F2G1G1GG1G1G1G1>G1G1G1G1bG1G1 F2F2audio_interface/aud/comm_sreg_Q421<1>rQXQF3F3address_generator/int_addr30<10>sOUTI1F2F2G1G1CF1F1F1F1F1F1VF1F18F1F1antenna_interface/ant/shift_reg_Q276<4>uUQYQ[F3F3address_generator/int_addr30<5>v OUTI1G2G2[F1F1F1F1F1F1bF1F1F2F2H1C1F1F1^G1G1F2F2antenna_interface/ant/shift_reg_Q276<7>xIQYQZG3G3address_generator/int_addr30<8>y OUTI1G1G1GH1C1F1F1SF1F1F2F2G1G1ZG1G1F1F1NG1G1F1F1G3G3G2G2antenna_interface/ant/shift_reg_Q276<2>{QQYQWF3F3address_generator/int_addr30<3>|OUTI1G4G4iH1C1WF1F1F1F1F1F1^F1F1iF2F2H1C1H1C1ZG1G1oF1F1G2G2G2G2F2F2antenna_interface/ant/shift_reg_Q276<5>~\QXQVG3G3address_generator/int_addr30<6> OUTI1G2G2VG1G1G1G1G1G1aG1G1nG1G1G2G2G1G1G2G2antenna_interface/ant/shift_reg<0>AQXQSF3F3address_generator/int_addr30<1>OUTI1DC2DC2uDC2G4G4iFC2SF1F1gF4F4F1F1F1F1F4F4F1F1F4F4F4F4ZF1F1iF1F1F3F3F2F2G1G1RG1G1G2G2F1F1G2G2antenna_interface/ant/shift_reg_Q276<3>XQXQRG3G3address_generator/int_addr30<4>OUTI1DC2G4G4jG1G1gF2F2F3F3F2F2F2F2F3F3cF1F1F2F2F3F3RG1G1G1G1vG2G2G1G1G2G2]G1G1AG1G1G2G2antenna_interface/ant/shift_reg_Q276<13>EQYQOF3F3address_generator/int_addr30<14>OUTI1F2F2G4G4OF1F1F1F1G1G1fG1G1antenna_interface/ant/shift_reg_Q276<1>TQXQNG3G3address_generator/int_addr30<2>OUTI1DC2DC2G4G4kF2F2jG2G2gF3F3F2F2F1F1F1F1F2F2_F1F1F1F1F2F2F4F4NG1G1G1G1G1G1G3G3YG1G1G1G1synthesizer_interface/synth/shift_reg<9>QXQ8F4F4uG2G2synthesizer_interface/synth/n348<0>2QXQCEC4F4F4G4G4F4F4G4G4F4F4G4G4F4F4G4G4F4F4G4G4F4F4G4G4F4F4G4G4F4F4G4G4F4F4G4G4F4F4G4G4F2F2G2G2G4G4fG2G2vG4G4G2G2F2F28F2F27G2G2xF2F2wG2G2G2G2wF1F1vG1G1F2F2G2G2F2F2G2G2=G2G2oF2F2nG2G2uG4G4F2F2G2G2=F2F2<G2G2BF2F2AG2G2synthesizer_interface/synth/int_busy3037QYQDC2F1F1G2G2F3F3G3G3F3F3G3G3F3F3G3G3F3F3G3G3F3F3G3G3F3F3G3G3F3F3G3G3F3F3G3G3F3F3G3G3F3F3G3G3F3F3G3G3G3G3G1G1fG3G3vG3G3G3G3 G1G1F3F38F3F37G3G3xF3F3wG3G3G3G3wF4F4vG2G2F3F3G3G3F3F3G3G3=G3G3oF3F3nG3G3uG3G3G2G2F3F3G3G3=F3F3<G3G3BF3F3AG3G3n20568FXF1F1synthesizer_interface/synth/shift_reg<12>QXQF2F27G4G4n20577GYG1G1address_generator/int_addr30<13>OUTI1F2F2G4G4BG1G1G1G17G1G1G1G1synthesizer_interface/synth/shift_reg<11>QYQF4F4G2G2n2058FXF1F1address_generator/int_addr30<12>OUTI1F2F2G1G1KF1F1F1F1F1F1F1F1synthesizer_interface/synth/shift_reg<14>QXQF2F2G4G4n2059GYG1G1address_generator/int_addr30<15> OUTI1DC2F4F4G2G2jG4G4F1F1JG1G1G1G1G1G1G3G3synthesizer_interface/synth/shift_reg<16>QXQG4G4xF1F1synthesizer_interface/synth/shift_reg<15>QYQxF4F4G2G2n2218xFXF1F1synthesizer_interface/synth/shift_reg<19>QYQwG1G1G4G4synthesizer_interface/synth/shift_reg<18>QXQwG4G4=F1F1n2219wGYG1G1synthesizer_interface/synth/shift_reg<17>QYQG1G1=F4F4n2220=FXF1F1synthesizer_interface/synth/shift_reg<22>QYQG4G4<G1G1synthesizer_interface/synth/shift_reg<21>QXQ<G4G4BF1F1n2221<GYG1G1synthesizer_interface/synth/shift_reg<20>QXQG1G1BF4F4n2124BFXF1F1synthesizer_interface/synth/shift_reg<3>QXQF2F2AG4G4n2125AGYG1G1n1911FXG4G4F1bootstrap/tx/cycle<1>QXQH1C1G1G1F4F4@F4F48G3G3bootstrap/tx/cycle127<0>FXG1G1D1bootstrap/tx_busy QXQF1F1F1F1F3F3F3F3F1F1F1F1,F1F18G1G1bootstrap/tx/cycle<0>QXQF2F2F3F3F2F2@F2F28G2G2tod_receiver/tod_receiver/manchester_decoder/timeout<0>QXQG1G1%F1F1)F2F2G1G1tod_receiver/tod_receiver/manchester_decoder/edge_nQYQH1C1F1F1G3G3n2290FXF2F2G4G4F1D1n1948%FXF3F3-F3F3#F1n1905 FXF2F2n1904GYF1F1n1903FXF4F4n2258lFXoG4G4jF1bootstrap/rx/cycle<1>mQXQjH1C1oG2G2F3F3gF4F49F3F3bootstrap/rx/cycle246<0>GYhDC2kG1G1bootstrap/rx/cycle<0>hQXQlF2F2F2F2gF3F3G2G29F2F2bootstrap/rx/busy eQXQlF1F1pF3F3sF1F1wF3F3FG2G2gF1F1G1G1jF2F2G1G19F1F1n1916XFXeF1F1F3F3WF1n1913WHY%G1G1G4G4antenna_interface/ant/clock<4>#QXQWGC3hG3G3*F2F2!G1G1antenna_interface/ant/clock<3>QXQWH1C1eF3F3"F2F2F2F2antenna_interface/ant/clock<2>QXQXF2F2"F1F1F2F2antenna_interface/ant/clock<1>QYQXF1F1"F4F4F3F3G1G1antenna_interface/ant/clock<0>QXQXF3F3"F3F3F2F2G2G2F4F4receiver_interface/dac/n300<0>YHYhCEC4dCEC4TCEC4`CEC4XCEC4\CEC4PCEC4eCE4UCE4aCE4YCE4]CE4QCE4receiver_interface/dac/busy285tQXQ-DC2H1C1YH1C1OF2F2NG2G2SF2F2RG2G2[F2F2ZG2G2_F2F2^G2G2cF2F2bG2G2G2G2WF2F2G2G2n1959ZFXGC3JF1F1F1F1YF1n1934FXYGC3XF2F2F1receiver_interface/dac/clock<3><QXQZF4F4;F4F4:G1G1IG1G1receiver_interface/dac/clock<2>8QXQZF1F15H1C1;F3F3:G4G4IG4G4receiver_interface/dac/clock<1>3QXQGC3ZF2F26G1G12F1F1IG3G3receiver_interface/dac/clock<0>0QXQZF3F36G4G42F2F2IG2G2/F2F2rcp_ad_tri/y12<7>[HXINOn1874GY_GC3]GC3[GC3F4F4F4F4F2F2F2F2F2F2F2F2F2F2F2F2F4F4G4G4<F4F4;G4G4G0bootstrap/wr_source/r_hih<7>_QXQ[H1C1n303+OUTI1H1C1TRITTRIT\F2F2^F2F2`F2F2F2F2G2G2F1F1F1F1F4F4F4F4F4F4F4F4F4F4F3F3G1G1G2G2F2F2G2G2F2F2G2G21F2F20G2G24F2F23G2G2DF2F2CG2G2aF1F1G4G4RG2G2qF2F2pG2G2tF2F2sG2G2.G2G2F2F2G2G2F2F2G2G2F1F1G1G1n2119GY\F1F1n2118FX\F4F4n2117 GY\F3F3rcp_ad_tri/y12<2>]HXINObootstrap/wr_source/r_hih<2>UQXQ]H1C1n2064FX^F1F1n2063GY^F4F4n2062FX^F3F3rcp_ad_tri/y12<0>_HXINObootstrap/wr_source/r_hih<0>NQXQ_H1C1n2109FX`F1F1n2108SGY`F4F4n2107TFX`F3F3n1941FX7G3G3fG4G4IF4F4F1bootstrap/wr_source/r22/n51<0>IFXbCEC4fCEC4kCEC4oCEC4n2113FX/G3G3F1F1ZG4G4HG4G4F1bootstrap/wr_source/r11/n51<0>HGY2CEC45CEC49CEC4CEC4bootstrap/wr_source/r10/n51<0>[FX.CEC4)CEC4/CE4*CE4bootstrap/wr_source/r21/n51<0>ZGY_CEC4\CEC4YCEC49CEC4n2129FXG3G3F3F3G4G4tF4F4G1G1F1bootstrap/wr_source/r13/n51<0>tFXECEC4HCEC4KCEC4CEC4n1417QXQINOG1G1F4F4F1F1sG1G1bootstrap/rx/sreg274<2> QYQDC2F1F1G1G1EF2F20G2G2sG4G4G3G3 G1G1bootstrap/rx/sreg274<1>QXQDC2F2F2H1C1EF3F30G1G1sG3G3 G4G4n2211 GYG1G1G1G1F2F2?G2G2:G4G4G1G1G2G2G2G2G0n1869GYF2F2F1F1G1G1n280OUTI1mF3F3lG3G3F3F3F3F3F3F3F3F3sF3F3F3F3iF1F1G3G3G3G3G3G3G3G3external_port/sync/wr_n_latchQXQF1F1external_port/sync/ale_selectQXQF2F2n2136GYF1F1audio_interface/aud/cycle<4>QXQF2F2F3F3G1G1G1G1BF4F4audio_interface/aud/cycle<3>QYQG2G2G2G2F2F2G2G2BF3F3n1878GYF2F2F1F1antenna_interface/ant/shift_reg_Q276<11>HQXQKF3F3antenna_interface/ant/shift_reg_Q276<14>PQXQJG3G3antenna_interface/ant/shift_reg_Q276<9>`QXQCF3F3antenna_interface/ant/shift_reg_Q276<12>LQXQBG3G3antenna_interface/ant/int_busy {QXQ&F2F2=F1F1<G1G19F2F2F1F1G3G31F1F14F1F13G1G1antenna_interface/ant/cycle<0>2QXQ<G3G31F2F24F2F23G3G3wG1G1F4F4n19810GYGC3GC3GC3F4F4antenna_interface/ant/cycle<1>5QXQ<G2G24F3F33G4G4wG2G2F1F1synthesizer_interface/synth/shift_reg<2>QXQF2F2oF4F4n2126oFXF1F1synthesizer_interface/synth/shift_reg<5> QXQF2F2nG4G4n2127 nGYG1G1synthesizer_interface/synth/shift_reg<4> QYQF4F4G2G2n2128 FXF1F1synthesizer_interface/synth/shift_reg<1> QXQG4G4G2G2n2266GYF1F1n22685FX$F1F1n1841GY F3F35F1F1bs_addr<3>%QXQ$F2F2F4F4DF1F15F2F2bs_addr<2>!QXQ$F3F3 F2F2F2F2G1G15F3F3n22694GY4F2F2n2208HY0F4F43G2G2F3F34G3G3bs_addr<7>5QXQ2H1C1F1F11F1F14G1G1bs_addr<6>1QXQ0F1F1F2F2sG1G14G2G2synthesizer_interface/synth/shift_reg<7>QXQG2G2F4F4n1929FXG1G1synthesizer_interface/synth/shift_reg<6>QYQG4G4G2G2n1930GYG1G1n2035FX{F1F1n1931{FXF2F2bs_addr<11>QXQF3F3{F2F2zG1G1G1G1bs_addr<10>QXQF1F1F1F1{F3F3zG3G3F1F1n2052HYF4F4F2F2F2F2zG2G2n1932 zGYF1F1n1944!?FXDH1C1=F1bootstrap/rd_control/n106"DHYFCEC4n1980$FXH1C1H1C1H1C1EF1F1G2G2F1address_generator/int_addr30<9>% OUTI1gDC2F2F2G1G1_F1F1F1F1F1F1OF1F1F3F3G3G3F1F1NG1G1G1G1synthesizer_interface/synth/clock<0>' QXQsF1F1rG3G3F2F2F2F2F1F1G2G2_G3G3wF2F2vG3G3audio_interface/aud/ser_stb342+GYF1F1BF1F1G0D0n2181- GYMF3F3PF4F4SG4G4^F2F2eG1G1G4G4 G3G3EG4G4G1G1n2286.rGYTDC2iic_bus_interface/iic/shift_reg_Q459<0>/PQXQrG1G1iic_bus_interface/iic/busy4270QYQgCEC4!DC2FCEC4tH1C1IF1F1HG1G1OF2F2NG2G2VF2F2UG2G2ZF2F2YG2G2^F2F2]G2G2bF2F2aG2G2F1F1G2G2G1G1rG2G2receiver_interface/sync/wr_n_latch1pQXQsF1F1receiver_interface/sync/ale_select2lQXQsF2F2bootstrap/tx/int_busy1374QYQDC2F3F3H1C1G3G3FC2G3G3FC2G3G3FC2G3G3FC2G3G3FC2G3G3FC2G3G3FC2AG1G1~G2G2+G1G1bootstrap/rd_sel7 NQXQF1F1G1G1G1G1G2G2G2G2G2G2G2G2G2G2MF1F1LG3G3?F2F2bootstrap/tx/sreg_Q150<8>8QXQH1C1rtc_divide/clock<6>;QXQ~F1F1|H1C1F2F2G3G3!F2F2rtc_divide/clk111< ~FXvF2F2yF1F1xG1G1,G1G1G4G4G3G3|F1D1n2023>GY~F3F3n1876?FX~F4F4bootstrap/tx/sreg_Q150<7>@QXQH1C1bootstrap/tx/sreg_Q150<6>CQXQH1C1n2296FVGY}DC2audio_interface/aud/clock<0>G}QXQF3F3F1F1G2G2eF1F1VG1G1receiver_interface/dac/shift_reg<0>HPQXQWF1F1n2180J $FXFG3G3JF3F3LG4G4PF1F1SG1G1^F4F4eG3G3G1G1G1G1F4F4G4G4n2018K#GYIF2F2F2F2iic_bus_interface/iic/cycle<3>LQYQLF2F2G1G1F3F3#G1G1?G2G2n1868M@FXAG2G2+G4G4bootstrap/tx/cycle<3>NQXQF1F1G3G3@F1F1bootstrap/tx/cycle<2>OQXQF4F4G2G2F2F2@F3F3n1867P?GY(F2F20F2F2+G1G13G1G1n1945QbFX>G1G1aF1bootstrap/wr_control/n97RaHYCEC4bootstrap/wr_control/cycle_rst_n92SHYaH1C1D*bootstrap/wr_control/cycle<2>TQXQbF3F3F2F2F2F2bootstrap/wr_control/cycle<1>UQYQbF1F1F4F4F1F1G3G3bootstrap/wr_control/cycle<0>VQXQbF2F2F2F2G2G2F3F3n1807WeFXiF1F1dF1n1806XdHYG2G2n2169Y6GY;F2F25G0n1861Z:GY;F1F1n2199\HY7F1F1:G2G2n1840]FX:G3G3F1bootstrap/rd_control/cycle<0>^IQXQLG2G2?F1F1G3G3HF3F3rG2G2G2G2;G2G2bootstrap/rd_control/cycle119<0>_;GYIDC2bootstrap/rd_control/cyc_rst_n` FQXQINOMF3F3KH1C1HF1F1rG1G1G1G1;G1G1,F2F2rcp_iic_rd<8>a !QXQxH1C15F1F1#H1C1(F3F3<F1F1?F1F1BF1F1F1F1@F1F1EF1F1iic_bus_interface/iic/cycle<0>b =QXQ<F2F2?F2F2BF3F3LF3F3F2F2?G1G1WG2G2G4G4n2217dGYG1G1receiver_interface/dac/cycle<0>e?QXQF3F3>F2F2AF2F2@G3G3xF1F1fG2G2rcp_rcv_rd<10>f-QXQ6G2G2FF3F3EG1G1F1F12F3F3>F1F1AF1F1@G1G1LF1F1/F1F1F2F2XF1F1fG1G1G3G3synthesizer_interface/synth/shift_reg<10>hQXQF2F2=G4G4n1906i=GYG1G1address_generator/int_addr30<11>jOUTI1FDC2F2F2G1G1GF1F1F1F1G1G1=G1G1tod_receiver/tod_receiver/shift_reg211<0>kQXQ6DC2G3G3tod_receiver/tod_receiver/manchester_decoder/sdai_2247l QYQDC2G1G1hH1C1G2G2tod_receiver/tod_receiver/manchester_decoder/sdai_2mlQYQG2G2G1G1tod_receiver/tod_receiver/cycle<2>oQXQ G1G1F4F4F2F2tod_receiver/tod_receiver/cycle<1>pQXQ G3G3F3F3F2F2F4F4tod_receiver/tod_receiver/cycle<0>qQXQ G2G2F2F2G1G1F1F1F3F3n2188r FXF1F1F1n2103tFX:G2G2bs_addr<13>uQXQH1C1F4F4G1G1F2F2G1G1bs_addr<12>vQXQGC3F2F2F3F3F1F1F3F3G3G3n2104wGY:G1G1n2105x(FX;F2F2n1845yHY(F1F1bs_addr<9>z<QXQGC3(F2F2'G1G1.G1G1bs_addr<8>{9QXQH1C18F1F1(F3F3'G2G20G1G1n2106|'GY;F1F1n2054}FXH1C18F4F4'G3G3F1n2248~@FXG3G3n2156FX(F4F4+G2G2F3F3F1n2012FX,F2F2bs_addr<5>-QXQGC3*H1C1F2F2tF1F1bs_addr<4>)QXQH1C1(F1F1CG1G1F1F1n2061GYvG1G1rcp_rcv_rd<0>\QXQTF3F3RG3G3n2112,GYTF2F2n2111 GFXF1F1cF2F2G1G1LG2G2TF4F4DG2G2fF2F2G4G4F4F4F2F2FF2F2n1939-FXTF1F1rcp_audio_rd<0>QXQF3F3SG3G3synthesizer_interface/sync_low/wr_n_latchQYQF1F1synthesizer_interface/sync_low/ale_selectQYQF2F2n1870GYF2F2 G4G4AG1G1n2185 GYgF1F1F4F4F3F3F3F3F1F1F4F4F1F1G4G4iic_bus_interface/sync/wr_n_latchQYQG1G1iic_bus_interface/sync/ale_selectjQXQG2G2n279OUTI1jG3G3G2G2G1G1audio_interface/sync/wr_n_latchQXQF1F1audio_interface/sync/ale_selectQXQF2F2bootstrap/rd_control/cycle<2>JQYQMF4F4LG4G4?F3F3G1G1HF2F2bootstrap/rd_control/cycle<1>QXQLG1G1?F4F4G2G2HF4F4rG3G3G3G3fill_output/sync/wr_n_latchQXQF1F1fill_output/sync/ale_selectQXQF2F2bootstrap/tx/sreg_Q150<5>QXQH1C1bootstrap/tx/sreg_Q150<4>QXQH1C1bootstrap/tx/sreg_Q150<3>QXQH1C1n20739FX/G4G47F1n20705FX7H1C1+H1C10F1F1/G1G1'G1G13F1iic_bus_interface/iic/clock<6>:QXQ8G1G1uG4G4|F3F3/G3G3n2087-FX9F3F34G3G30F4F4+F1iic_bus_interface/iic/clock<5>6QXQ9F4F4uG2G23H1C1|F1F1iic_bus_interface/iic/clock<4>1QXQ9F1F1yG4G44G1G10F2F2iic_bus_interface/iic/clock<3>.QXQ9F2F2,G1G1yG3G34G2G20F3F3iic_bus_interface/iic/clock<2>*QYQ-F1F1uG3G3|F4F4'G2G2iic_bus_interface/iic/clock<1>)QXQ-F3F3yG1G1(F2F2'G4G4iic_bus_interface/iic/clock<0>&QXQ-F2F2yG2G2$G1G1(F1F1'G3G3fan_interface/pwm/shift_reg_Q142<7>QXQF3F3fan_interface/loadoQYQF2F2F2F2G2G2F2F2G2G2F2F2G2G2F2F2G2G2F2F2G2G2F2F2G2G2F2F2G2G2F2F2cG1G1F2F2>G2G2n2149~FXH1C1wF4F4FG1G1}F1n2148FX}H1C1F1n2168{FX~F4F4G4G4yF1n2167 }GY~F3F3PF2F2SF3F3WF4F4`F1F1dF1F1jF1F1iG2G2|G0bootstrap/rx/div16<3>uQYQ~F1F1G2G2bootstrap/rx/div16<2>|QXQ~F2F2zG1G1G3G3synthesizer_interface/synth/shift_reg<13>QYQfG4G4G2G2n2060fGYF1F1bootstrap/rx/cycle<2>iQYQpF4F4oG1G1F4F4gF2F2n1890[GY^G2G2 G2G2ZG0bootstrap/rx/baud16<5>]QXQZH1C1}G1G1`F3F3bootstrap/rx/baud16<4>aQYQ\F1F1}G2G2^G1G1 G1G1bootstrap/rx/baud16<3>UQYQ[G3G3{G3G3RG2G2VG3G3bootstrap/rx/baud16<2>XQXQ[G1G1WF1F1VG1G1{G1G1RG4G4bootstrap/rx/baud16<1>TQXQ|H1C1[G4G4SF2F2WF2F2VG4G4{G2G2bootstrap/rx/baud16<0>QQXQ~F1F1[G2G2PF1F1SF1F1WF3F3VG2G2{G4G4antenna_interface/ant/n239gHXwCEC4antenna_interface/ant/clock<7>+QXQhG1G1)G1G1-F3F3antenna_interface/ant/clock<5>'QXQhG2G2*F1F1$H1C1G3G3tod_receiver/tod_receiver/cycle<3> QXQH1C1F1F1tod_receiver/tod_receiver/stb192FX F2F2F4F4F1D1tod_receiver/tod_receiver/activeQXQ F1F1H1C1F3F3G2G2tod_receiver/tod_receiver/n188kHXCEC4nH1C1tod_receiver/tod_receiver/active174QXQDC2DC2kH1C1tod_receiver/tod_receiver/n179nHXCEC4synthesizer_interface/synth/n299qHYCEC4receiver_interface/dac/ser_clk258IGY6G3G3F2F22F4F4/F3F3XF3F3HG0KD0receiver_interface/dac/n263HHXKCEC4receiver_interface/dac/cycle<3>GQXQFF1F1EG3G3F2F2JF2F2receiver_interface/dac/cycle<2>CQYQFF4F4EG2G2F1F1JF3F3@G2G2n2256xFXEG4G4JF4F4rcp_rcv_rd<5>aQYQG2G2G3G3n2291GYhDC2rcp_rcv_rd<3>]QYQcF3F3FF1F1rcp_rcv_rd<6>hQXQLG1G1bG3G3rcp_rcv_rd<1>UQYQ_F3F3cF1F1rcp_rcv_rd<4>dQXQfF1F1^G3G3receiver_interface/dac/shift_reg<1>YQYQ[F3F3address_generator/int_addr30<0> OUTI1ADC2DC2DC2rDC2F2F2G4G4F1F1F1F1[F1F1F2F2YDC2UG1G1rcp_rcv_rd<2>`QXQZG3G3F3F3rcp_rcv_rd<7>eQYQSF3F3F1F1rcp_sts1_rdOUTI1-F3F3rcp_iic_rd<0>XQYQZF3F3-F1F1n1921 FXbG2G2-F2F2FG2G2]G2G2`G2G2EF2F2F2F2G2G2 G2G2FF4F4n1875 FXbG4G4-F4F4MF2F2]G4G4EF4F4DG4G4F4F4rcp_sts2_rdOUTI1,G4G4n1799hGYcF3F3,G3G3JF2F2`G3G3fF3F3G3G3n1408QXQINO,G2G2n2210HYG4G4G3G3G3G3G3G3G3G3G3G3G3G3G3G3F3F3F3F3IG3G3OG3G3SF3F3G3G3 F3F3F3F3n2089GYG2G2G2G2G2G2G2G2G2G2G2G2G2G2G2G2F2F2F2F2IG2G2OG2G2SF2F2G2G2 F2F2F2F2bootstrap/wr_source/r_mid<0>)QXQF1F1bootstrap/wr_source/r_low<0>QXQF4F4n2260bGYG2G2n2259cFXG3G3n1984PFXG4G4n1908GY<F1F1rcp_sts2_rdOUTI1cF4F4rcp_sts1_rdOUTI1bG3G3rcp_iic_rd<1>[QXQbG1G1YG3G3n2297rGYDC2bootstrap/rx/div16<0>tQXQ{F1F1sF2F2wF1F1n1937VGYRG1G1antenna_interface/sync/wr_n_latch jQXQmF1F1antenna_interface/sync/ale_select hQXQmF2F2fan_interface/sync/wr_n_latch QYQlG1G1fan_interface/sync/ale_selectQXQlG2G2rcp_ad_tri/y_tri_enable<0>GYTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITn281OUTI1G1G1bootstrap/tx/sreg_Q150<1>QXQ~G1G1bootstrap/tx/sreg146<0>~GYDC2internal_port/sync/wr_n_latch|QXQF1F1internal_port/sync/ale_selectxQXQF2F2tod_receiver/sync/wr_n_latchQYQG1G1tod_receiver/sync/ale_selectQXQG2G2internal_port/sync/ale_select67FXxDC2D1bootstrap/wr_source/r12/n51<0>fGYACEC4=CEC4jCEC4BCE4rcp_iic_rd<3>_QXQ]G3G3FF3F3rcp_iic_rd<2> \QYQ^F3F3F1F1rcp_iic_rd<9>$WQXQFG1G1UG3G3iic_bus_interface/iic/shift_reg_Q459<1>&TQXQVF3F3n2292(GYDC2bootstrap/tx/sreg_Q150<2>,QXQH1C1bootstrap/rx/n252<3>/FGYqCEC4mCEC4hCEC4yH1C1iCE4bootstrap/rx/div16<1>1xQXQ{F2F2wF2F2bootstrap/incr_en482QXQDC2DC2=DC2)DC2NDC2bDC2rDC2YDC2CDC22DC2EDC2DC2 DC2&H1C1H1C1H1C16H1C1 G1G1H1C1H1C1F1F1bootstrap/rx/sreg274<4>5QYQADC2DC2QDC2fDC2uDC2\DC2DC25DC2HDC2DC2H1C1H1C1,F3F3F1F1;F3F3:G3G3DC2H1C1&H1C1F2F2bs_addr<1>8QXQGC3F1F1F1F1G3G3F1F1bs_addr<0>9QXQH1C1F4F4F2F2F3F3G4G4RG1G1n1907:*FX-F4F4(F1antenna_interface/ant/n268<4>; &FX2CEC45CEC4:CEC4>CEC4(H1C1 H1C1F1F1F1F1G1G1-F1F1$F16CE4n2234=yGYvF1F15F2F2%F1F1G1G1xG0n1958>uGYzF1F1G2G2tG0iic_bus_interface/iic/n461<0>? tHXPCEC4cCEC4_CEC4[CEC4WCEC4TCEC4fCEC4QCE4dCE4`CE4\CE4XCE4iic_bus_interface/iic/clock<7>@2QYQuG1G1IF3F3|F2F2/G2G2iic_bus_interface/iic/n489<3>AxHX=CEC4@CEC4CCEC4CEC4n1938C|HXRG3G3n1933D{GY}G4G4bootstrap/rx/baud16<6>EaQXQ}G3G3`F2F2n2284FGYDC2audio_interface/aud/comm_sreg_Q421<4>GQXQG3G3n322HsOUTI1F3F3rcp_ad_tri/y12<9>JHXINObootstrap/wr_source/r_hih<9>KfQXQH1C1n2264MDGYF3F3n1925NSFXF1F1n1920OFGYF4F4bootstrap/rx_data<0>PQXQG3G3F2F2F1F1F2F2F2F2G1G1bootstrap/rx/sreg274<0>QQXQDC2G1G1F1F1F2F2F1F1F1F1G3G3rcp_ad_tri/y12<8>RHXINOn2263UFXF2F2bootstrap/wr_source/r_hih<8>VbQXQF3F3bootstrap/wr_source/r_mid<8>W=QXQG1G1bootstrap/wr_source/r_low<8>XQXQG3G3rcp_ad_tri/y12<5>YHXINOn1951\GYF2F2bootstrap/wr_source/r_hih<5>]\QXQF3F3bootstrap/wr_source/r_mid<5>^5QXQG1G1bootstrap/wr_source/r_low<5>_ QYQG4G4rcp_ad_tri/y12<15>`HXINObootstrap/wr_source/r_hih<15>czQYQF1F1bootstrap/wr_source/r_mid<15>dQYQG1G1bootstrap/wr_source/r_low<15>e%QXQG4G4rcp_ad_tri/y12<14>fHXINObootstrap/wr_source/r_hih<14>iyQXQF1F1bootstrap/wr_source/r_mid<14>jKQXQG1G1bootstrap/wr_source/r_low<14>k"QXQG4G4n332l#OUTI1OF1F1rcp_rcv_rd<8>nTQXQF2F2NG3G3receiver_interface/dac/cycle<1>pBQXQF4F4AF3F3@G4G4xF2F2fG3G3n1879vgFXF2F21G1G1rcp_iic_rd<5>xcQXQ]G1G1aG3G3rcp_iic_rd<4>z`QYQbF3F3G1G1rcp_audio_rd<1>|QXQG3G3PF3F3n1909}OGY<F2F2bootstrap/wr_source/r_mid<1>~*QYQOG1G1bootstrap/wr_source/r_low<1>QXQOG4G4n1986GYF2F2n1985FXF1F1rcp_audio_rd<2>QYQF3F3G3G3rcp_sts1_rdOUTI1F3F3rcp_sts2_rdOUTI1G4G4rcp_fill_rdOUTI1G2G2bootstrap/wr_source/r_mid<2>.QXQF1F1bootstrap/wr_source/r_low<2>QXQF4F4n2164JFXG4G4n2163EGYG2G2n2162FFXG3G3n2065GY;G1G1n2120GYG1G1G4G4rcp_audio_rd<7>QYQF3F3 G4G4bootstrap/wr_source/r23/n51<0>GYyCEC4uCEC4rCEC4zCE4n1979jGYiF3F3iG0bootstrap/wr_source/r03/n51<0>GY%CEC4"CEC4CEC4CEC4rcp_rcv_rd<9>QQYQG1G1DG1G1n2293GYXDC2fan_interface/pwm/shift_reg_Q142<15>QYQF1F1fan_interface/pwm/shift_reg_Q142<16>QXQG1G1rcp_iic_rd<6>dQYQ`G1G1G3G3n2294GYfDC2fan_interface/pwm/shift_reg_Q142<17>QYQF3F3n337nOUTI1OF3F3rcp_iic_rd<7>fQXQNG3G3 G1G1n2295>GYDC2n1376QYQINO>G3G3fan_interface/pwm/shift_reg_Q142<5>QXQG3G3fan_interface/pwm/shift_reg_Q142<4>QYQF3F3fan_interface/pwm/shift_reg_Q142<3>QXQG3G3fan_interface/pwm/shift_reg_Q142<2>QYQF3F3n1865FXF2F28F2F2F1F1F1bootstrap/rx/sreg274<6>QYQDC2_DC2DC2%DC2DC2oDC29DC2"H1C1H1C1H1C14F3F3F3F3DC2H1C1+H1C1jDC2RH1C1vH1C1F3F3n1993HY$F4F4 F1F1rcp_ad_tri/y12<13>HXINObootstrap/wr_source/r_hih<13>uQXQF1F1bootstrap/wr_source/r_mid<13>HQXQG1G1bootstrap/wr_source/r_low<13>QXQG4G4rcp_ad_tri/y12<12>HXINObootstrap/wr_source/r_hih<12>rQXQF1F1bootstrap/wr_source/r_mid<12>EQXQG1G1bootstrap/wr_source/r_low<12>QXQG4G4rcp_ad_tri/y12<11>HXINObootstrap/wr_source/r_hih<11>oQXQF1F1bootstrap/wr_source/r_mid<11>jQXQG1G1bootstrap/wr_source/r_low<11>QXQG4G4rcp_ad_tri/y12<10>HXINOn2110GYF4F4bootstrap/wr_source/r_hih<10>kQXQF1F1bootstrap/wr_source/r_mid<10>BQYQG1G1bootstrap/wr_source/r_low<10>QXQG4G4n2072|FX5F3F3%F2F2rcp_audio_rd<3>QXQG3G3EG3G3n1409QYQINOEG2G2n2066IGY;G2G2bootstrap/wr_source/r_mid<3>/QYQIG1G1bootstrap/wr_source/r_low<3>QXQIG4G4n2067FXF1F1n1802eGYF4F4n1801fFXF2F2n1800GYF3F3rcp_fill_rdOUTI1G4G4rcp_sts2_rdOUTI1fF4F4rcp_audio_rd<4>QYQF3F3eG2G2n2068FXF2F2bootstrap/wr_source/r_mid<4>2QXQF1F1bootstrap/wr_source/r_low<4> QXQF4F4n1950]GYG4G4n1803^FXG3G3synthesizer_interface/sync_high/wr_n_latchkQYQG1G1synthesizer_interface/sync_high/ale_selectQXQG2G2n2160GYF3F3F1F1AG3G3+G2G2n2159FXF2F2F2F2AG4G4+G3G3bootstrap/tx/baud<0>QXQF2F2F4F4F2F2F3F3G1G1n2034AGYF3F3dG1G1n2250OGYF4F4n2153FXF2F2OG2G2G2G2F1fan_interface/pwm/clock<9>QYQF3F3F2F2OG3G3G3G3fan_interface/pwm/clock<8>QYQGC3F3F3OG4G4G1G1fan_interface/pwm/clock<7>QXQH1C1F3F3F1F1OG1G1G3G3synthesizer_interface/synth/shift_reg342<9>uGYDC2n2191FXuG1G1synthesizer_interface/synth/shift_reg342<1>GYDC2n2189FXG1G1n2190GYF1F1fan_interface/pwm/shift_reg_Q142<1>QXQG3G3n1377QXQINOF3F3fan_interface/pwm/shift_reg_Q142<14>QXQG3G3fan_interface/pwm/shift_reg_Q142<13>QYQF3F3n1375QXQINOG3G3fan_interface/pwm/shift_reg_Q142<11>QYQF3F3rcp_audio_rd<5> QXQG3G3^F1F1fan_interface/pwm/shift_reg_Q142<10> QXQG3G3fan_interface/pwm/shift_reg_Q142<9>QXQF3F3n2154FXF4F4 F4F4F1bs_addr<15> QXQGC3F1F1 F3F3G1G1n2008dGYF1F1bs_addr<19>QXQF2F23G1G1dG2G2bs_addr<18>QXQF3F3F2F24F1F1dG3G3tod_receiver/tod_receiver/manchester_decoder/timeout<2>&QXQ$G1G1-F2F2)F1F1F1F1n2246 FX#H1C1H1C1+H1C1'H1C1F1F1G1G10F1F1/G1G1G1G1G1G1G1G1F1tod_receiver/tod_receiver/manchester_decoder/timeout<1> QYQ%F2F2)F3F3G2G2n1843%<GY8G1G1;G0antenna_interface/ant/shift_reg_Q276<10>-DQXQGF3F3rcp_sts1_rd/OUTI1]G3G3n22230aFXG1G1n21161LGYaF4F4n19532MFXaF2F2n19523`GYaF3F3rcp_sts2_rd4QXQ`G4G4rcp_sts1_rd5OUTI1MF1F1rcp_audio_rd<6>6QYQGG3G3MF4F4n22247 FXG2G2bootstrap/wr_source/r_mid<6>8QYQ F1F1bootstrap/wr_source/r_low<6>9 QXQ F4F4n2227; GY`F4F4synthesizer_interface/synth/n338<4>= FXCEC4CEC4CEC4_G1G1G1G14CEC4F1CE4n1872D%FX(F4F4G2G2F3F3#F1bootstrap/wr_control/cycle_rst_nFQXQF1F1G1G1F1F1n2283IGYuDC2iic_bus_interface/iic/read_cycleKFQXQLF1F1iic_bus_interface/iic_sda62MKGYmINOiic_bus_interface/iic/shift_reg_Q459<11>NQQYQKG1G1bootstrap/wr_control/n114O{OUTI1CEC4GC3F1F1KG2G2fan_interface/pwm/shift_reg_Q142<8>PQYQF3F3n1956RGYF1F1bootstrap/rx/sreg274<7>SOUTI1dF2F2H1C1iG3G3n2245UFXcG4G4F1n2102VGYGC3cG3G3n2101WFXH1C1cG2G2fan_interface/pwm/n144<0>XcGYCEC4CEC4CEC4CEC4CEC4CEC4CEC4CEC4CEC4CEC4CE4CE4CE4CE4CE4CE4CE4CE4n2100YHYF1F1F1F1G1G1F1F1F1F1F1F1G1G1fan_interface/pwm/clock<5>ZQYQF4F4F2F2F3F3G1G1fan_interface/pwm/clock<2>[QXQF1F1F1F1F1F1fan_interface/pwm/clock<1>\QXQF2F2F3F3F3F3F3F3tod_receiver/tod_receiver/manchester_decoder/timeout<12>]"QXQ G1G1G3G3 F1F1n2252^!FXG4G4F1tod_receiver/tod_receiver/manchester_decoder/timeout<9>`QYQ!F3F3G3G3F4F4G3G3G4G4tod_receiver/tod_receiver/manchester_decoder/timeout<11>aQXQ!F1F1H1C1 F4F4tod_receiver/tod_receiver/manchester_decoder/timeout<10>bQXQ!F2F2G2G2F2F2F4F4n2013cHY!F4F4G1G1F3F3G2G2tod_receiver/tod_receiver/manchester_decoder/timeout<5>d.QXQ,G1G1F2F20F3F3 F3F3n1949e-FXF3F30F4F4+F1tod_receiver/tod_receiver/manchester_decoder/timeout<4>gQYQ-F1F1G2G2 F2F2tod_receiver/tod_receiver/manchester_decoder/timeout<3>h*QXQ-F4F4(G1G1G3G3G3G3n2253i)FXG4G4'F1interrupt_source/q<5>kQYQG1G1interrupt_source/q130<5>lQXQH1C1H1C1interrupt_source/q<3>oQYQF2F2interrupt_source/q<1>pQYQF4F4interrupt_source/q130<3>qQXQF1F1H1C1interrupt_source/q130<1>rQXQF3F3H1C1bs_addr<16>v QXQH1C1 F2F2 G3G3qF1F1n2084wLGY,F3F3KG0n2195zGYMF2F2n2051}HYF4F4bs_addr<14>~QXQF1F1F2F2F1F1n2222 GYG3G3bootstrap/wr_source/r_mid<7>9QXQG1G1bootstrap/wr_source/r_low<7>QXQG4G4n2262EFXF4F4n2261GYF3F3rcp_sts1_rdOUTI1EF3F3rcp_sts1_rdOUTI1DG3G3n2287vGYDC2n2197FXG2G2n2288:GYDC2n2289GYDC2audio_interface/aud/comm_sreg_Q421<6>QYQF3F3audio_interface/aud/n356GYCEC4antenna_interface/ant/shift_reg_Q276<8>]QYQ_F3F3rtc_divide/clock<8>QYQ,G3G3F1F1G1G1rtc_divide/clock<7>QXQF1F1G2G2!F1F1F3F3rcp_addr_tri/y12<18>4FXINOG2G2address_generator/int_addr<18>GY4F3F3G1G1rcp_addr_tri/y12<19>3GYINOG1G1address_generator/int_addr<19>FX3G3G3F1F1address_generator/int_addr<1>GYF3F3G1G1address_generator/int_addr<2>kFXG3G3kF1F1address_generator/int_addr<3>FXDF3F3F1F1address_generator/int_addr<4>GYCG3G3G1G1rcp_addr_tri/y12<5>tFXINOaddress_generator/int_addr<5>FXtF3F3F1F1rcp_addr_tri/y12<6>sGYINOaddress_generator/int_addr<6>GYsG3G3G1G1rcp_addr_tri/y12<7>1FXINOaddress_generator/int_addr<7> FX1F3F3 F1F1rcp_addr_tri/y12<8>0GY INOaddress_generator/int_addr<8>GY0G3G3G1G1n2247eFXG1G1F4F4audio_interface/aud/clock<3>QXQH1C1F1F1F3F3n1838FXF4F4F1bootstrap/tx/n133<3>FXCEC4CEC4CEC4CEC4H1C1H1C1F1F1G1G1F1F1G1G1F1F1F1F1G1G1F1bootstrap/tx/baud<9>QXQG1G1F3F3F2F2n1839FXF3F3G4G4F1bootstrap/tx/baud<8>QXQF1F1H1C1F1F1bootstrap/tx/baud<7>QYQF2F2G2G2G2G2F4F4bootstrap/tx/baud<6>QXQF4F4G1G1G1G1G3G3F3F3n2184FXF2F2F2F2G3G3F1bootstrap/tx/baud<5>QYQF3F3G4G4G2G2G1G1bootstrap/tx/baud<4>QYQGC3F4F4G2G2G4G4bootstrap/tx/baud<3>QXQH1C1F1F1F3F3G4G4G4G4n1826FXG3G3F3F3F1audio_interface/aud/n423<0> HYCEC4CEC4CEC4CEC4CEC4CEC4CE4CE4rtc_divide/clock<9>/QYQ,G2G2F2F2n2076!FX,G4G4n1919HYG3G3G3G3n20328GYF2F2n2028fGYFF2F2bootstrap/wr_source/r_mid<9>AQXQSF1F1bootstrap/wr_source/r_low<9>QYQSF4F4rcp_addr_tri/y12<0>RGYINOaddress_generator/int_addr<0>FXRG3G3F1F1rcp_addr_tri/y12<10>FXINOaddress_generator/int_addr<10>FXF3F3F1F1rcp_addr_tri/y12<11>GYINOaddress_generator/int_addr<11>FXG3G3F1F1rcp_addr_tri/y12<12>FXINOaddress_generator/int_addr<12>FXF3F3F1F1rcp_addr_tri/y12<13>GYINOaddress_generator/int_addr<13>FXG3G3F1F1rcp_addr_tri/y12<14>FXINOaddress_generator/int_addr<14>FXF3F3F1F1rcp_addr_tri/y12<15>GYINOaddress_generator/int_addr<15>GYG3G3G1G1rcp_addr_tri/y12<16>qFXINOG3G3address_generator/int_addr<16>GYqF3F3G1G1rcp_addr_tri/y12<17>pGYINOG4G4address_generator/int_addr<17>FXpG3G3F1F1synthesizer_interface/synth/shift_reg<8>QYQF4F4G2G2n2282HYF2F2G2G2fan_interface/pwm/clock<10>QXQF1F1F3F3G3G3fan_interface/pwm/clock<0>QXQF2F2F1F1F2F2F2F2G2G2n2010FXF2F2G3G3G3G3F1fan_interface/pwm/clock<4>QYQGC3G1G1G2G2G4G4fan_interface/pwm/clock<3> QXQH1C1F3F3G4G4G4G4G2G2audio_interface/aud/clock<1> QXQF2F2F2F2G3G3eF3F3receiver_interface/dac/n310<3>FXGCEC4BCEC4?CEC4CCE4synthesizer_interface/synth/n318<0>GYCEC4CEC4CE4synthesizer_interface/synth/shift_reg<0>QXQF4F4n1381QXQINOG1G1tod_receiver/tod_receiver/n207<3>GY CEC4CEC4CEC4CEC4bootstrap/rd_control/n125<0>,FXNCEC4ICEC4CEC4JCE4bootstrap/tx/n152<0> +GYCEC4CEC4CEC4CEC4CEC4CEC4CEC4CEC4CEC4iic_bus_interface/iic/n423FXJCEC4tod_receiver/tod_receiver/manchester_decoder/timeout<13>QYQG2G2F2F2fan_interface/pwm/clock<11>QXQF2F2F3F3n2151!HYF1F1F4F4fan_interface/pwm/clock<6>"QXQF3F3F2F2F4F4tod_receiver/tod_receiver/manchester_decoder/timeout<7>$QYQH1C1G1G1G2G2/G3G3n2178%FXG3G3/G4G4F1n2030.9FXpF2F2bootstrap/rx/cycle<3>/qQXQpF1F1oG3G3F1F1audio_interface/aud/n3840HXCEC4antenna_interface/sync/wr_n_latch765 iFX|DC2pDC2DC2DC2DC2kDC2H1C1H1C1H1C1jD1D6n14146GYINOrcp_ad_tri/y12<1>8<FXINObootstrap/wr_source/r_hih<1>9QQXQ<F3F3rcp_ad_tri/y12<3>:;GYINObootstrap/wr_source/r_hih<3>;VQYQ;G3G3rcp_ad_tri/y12<4><FXINObootstrap/wr_source/r_hih<4>=YQXQF3F3rcp_ad_tri/y12<6>>GYINObootstrap/wr_source/r_hih<6>?9QYQG3G3synthesizer_interface/synth/n308@ GYCEC4synthesizer_interface/synth/n348<10>AwFXCEC4CEC4CEC4CEC4CEC4CEC4CEC4CEC4CEC4CE4CE4CE4CE4CE4CE4synthesizer_interface/synth/n348<16>B vGYCEC4CEC4CEC4CEC4CEC4CE4CE4CE4tod_receiver/tod_receiver/manchester_decoder/timeout<6>C1QXQF1F10F2F2G2G2tod_receiver/tod_receiver/manchester_decoder/timeout<8>E2QYQGC3F3F3/G2G2bootstrap/tx/baud<10>LQXQF2F2G2G2bootstrap/rx/n278<0>P HYCEC4CEC4CEC4CEC4CE4CE4CE4CE4antenna_interface/ant/n388QFXSRC3SRC3.SRC3SRC3SRC3ASRC3SRC3SRC36SRC3@SRC3SRC3SRC3SRC3SRC3ASRC3SRC3PSRC3%SRC3SRC3:SRC3SRC3|SRC3SRC3TSRC3*SRC3SRC3ySRC3SRC3xSRC3SRC3=SRC31SRC3SRC3SRC3SRC3SRC3SRC3SRC3SRC3=SRC3!SRC3)SRC3SRC3SRC3SRC3SRC3&SRC3SRC3pSRC3eSRC3SRC3SRC3JSRC3SRC3@SRC3.SRC3SRC3SRC3SRC3hSRC3SRC3SRC3SRC3SRC3SRC3SRC3aSRC3SRC3XSRC3SRC3SRC3CSRC3SRC3SRC3SRC3SRC3NSRC3SRC3SRC3SRC3MSRC3bSRC3_SRC3SRC3SRC3SRC3SRC3]SRC3SRC3NSRC3SRC3tSRC3SRC3gSRC3.SRC3SRC3SRC3GSRC3SRC3SRC3)SRC3SRC3SRC3QSRC3ySRC3dSRC3SRC3SRC3SRC3fSRC3SRC3SRC3SRC30SRC3\SRC3xSRC3SRC3+SRC3SRC3SRC3&SRC3DSRC3SRC3USRC3uSRC3cSRC3SRC3SRC3SRC3kSRC3 SRC3\SRC3SRC3SRC3SRC3GSRC33SRC3SRC3|SRC3SRC3!SRC3SRC3jSRC3SRC3TSRC3HSRC3SRC3%SRC3rSRC3SRC3`SRC3KSRC3SRC3SRC3oSRC3YSRC3SRC3SRC3XSRC3SRC38SRC3ISRC3SRC3'SRC3SRC3SRC3CSRC3tSRC3LSRC3"SRC32SRC3_SRC3<SRC3SRC3 SRC3SRC3SRC3SRC3SRC3"SRC3TSRC3SRC3BSRC3<SRC3SRC3SRC3SRC3wSRC3SRC3SRC3#SRC3SRC3SRC3SRC3dSRC36SRC3SRC3SRC3XSRC3-SRC3SRC35SRC39SRC32SRC3\SRC3uSRC3 SRC3qSRC3lSRC3SRC3ESRC3SRC3SRC3SRC3QSRC3?SRC3`SRC3SRC3SRC3SRC3SRC3SRC3PSRC3SRC3SRC3[SRC35SRC35SRC3rSRC3 SRC3 SRC3CSRC3HSRC3FSRC3SRC3SRC3SRC3SRC3SRC3SRC3SRC3nSRC3:SRC31SRC3PSRC3jSRC3SRC3>SRC3mSRC3SRC3SRC3KSRC3SRC31SRC3SRC3SRC3SRC3MSRC3SRC3SRC3SRC3>SRC3SRC3WSRC3-SRC39SRC3SRC3hSRC3FSRC3SRC3SRC3.SRC3SRC3SRC3zSRC3SRC3JSRC3hSRC3:SRC3SRC3}SRC3SRC3SRC3 SRC3SRC3TSRC3)SRC3SRC3TRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRITTRIT TRIT TRIT{SRC3wSRC3SRC3SRC3jSRC3fSRC3cSRC3SR4/SR4SR4SR4SR4BSR4QSR4}SR4SR4USR4SR4SR42SR4SR4SR4SR4SR4*SR4SR4SR4SR4qSR4SR4SR4SR4SR4SR4bSR4YSR4SR4SR4SR4SR4SR4^SR4SR4SR4uSR4SR4/SR4SR4SR4*SR4SR4zSR4eSR4gSR4SR4SR4]SR4SR4SR4SR4ESR4SR4VSR4dSR4SR4lSR4SR4SR44SR4SR4SR4"SR4SR4kSR4SR4USR4ISR4aSR4SR4YSR4SR49SR4JSR4SR4SR4SR4MSR4`SR4SR4SR4USR4SR4CSR4SR4SR4eSR47SR4SR4YSR46SR4]SR4SR4SR4aSR4SR4SR4QSR4SR4\SR4 SR4DSR4SR4SR4SR4SR4SR4oSR4QSR4?SR4SR4SR42SR4SR4SR4XSR4:SR4iSR4SR4SR4SR4{SR4SR4~SR4SR4SR4 SR4SR4SR4n1805RFXG3G3n1954SFXF3F3n1994TGYG3G3bootstrap/tx/baud<2>UQXQF1F1F2F2G2G2bootstrap/tx/baud<1>VQXQF3F3F3F3F4F4G3G3audio_interface/aud/n347WBFXCEC4bootstrap/tx/n142XAGYCEC4n1989YWGYF2F2iic_bus_interface/iic/n432ZFX!CEC4antenna_interface/ant/n278<10>_GYTCEC4XCEC4\CEC4DCEC4HCEC4LCEC4`CEC4PCEC4UCE4YCE4]CE4ECE4ICE4MCE4QCE4rcp_addr_tri/y12<9>`.GY INOaddress_generator/int_addr<9>aFX.G3G3F1F1receiver_interface/dac/clock314<0>b/FXH1C10D1bootstrap/wr_source/r01/n51<0>fHYCEC4 CEC4 CEC4 CE4receiver_interface/dac/n290gHY-CEC4n2298hGGYDC2receiver_interface/dac/n281jXFXMCEC4audio_interface/aud/comm_sreg_Q421<2>oQXQF3F3audio_interface/aud/comm_sreg_Q421<5>qQYQG3G3audio_interface/aud/comm_sreg_Q421<3>tQXQF3F3audio_interface/aud/comm_sreg_Q421<0>vQXQF3F3bootstrap/incr_addry@QXQG2G2F2F2G2G2F2F2G2G2bootstrap/dma_cnt/n93<0>zGY%CEC4!CEC4CEC4CEC4bootstrap/dma_cnt/n93<10>{FXCEC4CEC4<CEC49CEC4bootstrap/dma_cnt/n93<12>|GYCEC4CEC4CEC4 CEC4bootstrap/dma_cnt/n93<16>}FXCEC4 CEC4CEC4CEC4bootstrap/dma_cnt/n93<4>~GY5CEC41CEC4-CEC4)CEC4bootstrap/rx/n242<3>jFXtCEC4xCEC4|CEC4uCE4bootstrap/rx/n261iGYeCEC4bootstrap/wr_source/r02/n51<0>HYCEC4CEC4CEC4CEC4bootstrap/wr_source/r00/n51<0>HYCEC4CEC4CEC4CEC4bootstrap/incr_enCQXQ=H1C1iic_bus_interface/iic/stop_cyclegQXQIF4F4n278OUTOCKKCKKCKK.CKKCKKCKKACKKCKKCKK6CKK@CKKCKKCKKCKKCKKACKKCKKPCKK%CKKCKK:CKKCKK|CKKCKKTCKK*CKKCKKyCKKCKKxCKKCKK=CKK1CKKCKKCKKCKKCKKCKKCKKCKK=CKK!CKKCKK)CKKCKKCKKCKKCKK&CKKCKKpCKKeCKKCKKCKKJCKKCKK@CKK.CKKCKKCKKCKKhCKKCKKCKKCKKCKKCKKCKKaCKKCKKXCKKCKKCKKCCKKCKKCKKCKKCKKNCKKCKKCKKCKKMCKKbCKK_CKKCKKCKKCKKCKK]CKKCKKNCKKCKKtCKKCKKgCKK.CKKCKKCKKGCKKCKKCKK)CKKCKKCKKQCKKyCKKdCKKCKKCKKCKKfCKKCKKCKKCKK0CKK\CKKxCKKCKK+CKKCKKCKK&CKKDCKKCKKUCKKuCKKcCKKCKKCKKCKKkCKK CKK\CKKCKKCKKCKKGCKK3CKKCKK|CKKCKK!CKKCKKjCKKCKKTCKKHCKKCKK%CKKrCKKCKK`CKKKCKKCKKCKKoCKKYCKKCKKCKKXCKKCKK8CKKCKKICKKCKK'CKKCKKCKKCCKKtCKKLCKK"CKK2CKK_CKK<CKKCKK CKKCKKCKKCKKCKK"CKKTCKKCKKBCKK<CKKCKKCKKCKKCKKwCKKCKKCKK#CKKCKKCKKCKKdCKK6CKKCKKCKKXCKK-CKKCKK5CKK9CKK2CKK\CKKuCKK CKKqCKKlCKKCKKECKKCKKCKKCKKQCKKCKK?CKK`CKKCKKCKKCKKCKKCKKCKKPCKKCKKCKK[CKK5CKK5CKKrCKK CKK CKKCCKKHCKKFCKKCKKCKKCKKCKKCKKCKKCKKnCKK:CKK1CKKPCKKjCKKCKKCKK>CKKmCKKCKKCKKKCKKCKK1CKKCKKCKKCKKCKKMCKKCKKCKKCKK>CKKCKKWCKK-CKK9CKKCKKhCKKFCKKCKKCKK.CKKCKKCKKzCKKCKKJCKKhCKK:CKKCKK}CKKCKKCKK CKKCKKTCKK)CKKCKK{CKKwCKKCKKjCKKfCKKcCKKCK4CK4/CK4CK4CK4CK4BCK4QCK4}CK4CK4UCK4CK4CK42CK4CK4CK4CK4CK4CK4*CK4CK4CK4CK4qCK4CK4CK4CK4CK4CK4bCK4YCK4CK4CK4CK4CK4CK4^CK4CK4CK4uCK4CK4/CK4CK4CK4*CK4CK4zCK4eCK4gCK4CK4CK4]CK4CK4CK4CK4ECK4CK4VCK4dCK4CK4lCK4CK4CK44CK4CK4CK4"CK4CK4kCK4CK4UCK4ICK4aCK4CK4YCK4CK49CK4CK4JCK4CK4CK4CK4MCK4`CK4CK4CK4UCK4CK4CCK4CK4CK4CK4eCK47CK4CK4YCK46CK4]CK4CK4CK4CK4aCK4CK4CK4CK4QCK4CK4\CK4 CK4DCK4CK4CK4CK4CK4CK4oCK4QCK4CK4?CK4CK4CK42CK4CK4CK4CK4XCK4:CK4iCK4CK4CK4CK4{CK4CK4~CK4CK4CK4 CK4CK4CK4interrupt_source/q130<2>KOUTI1DC2memory_interface/rcp_1553_cs_n148QXQDC2n1415QXQINOexternal_port/n89QXQCEC4CEC4CEC4YCEC4CE4CE4n1399QYQINOn1382QXQINOn1383QXQuINOn1412QXQINOinternal_port/sync/n72QYQxCEC4fill_output/n124QXQCEC4CEC4CE4tod_receiver/tod_receiver/manchester_decoder/sdai_1238 OUTI1 H1C1n1385QXQpINOaddress_generator/n31<0> OUTODC2eDC2DC2 DC2zH1C1H1C1cH1C1H1C1G3G3H1C1H1C1F3F3G3G3F3F3G3G3F3F3G3G3 F3F3G3G3F3F3G3G3F3F3F3F3F3F3F3F3F3F3F3F3G3G3kF3F3F3F3dD6fan_interface/sync/n72QXQCEC4interrupt_source/q130<4>OUTI1DC2interrupt_source/q130<0>OUTI1DC2memory_interface/dff139,OUTI1DC2n13808QXQINOn13709JQXQkINOn1379aQYQINOn1372MQXQ%INOn1378QYQINOsynthesizer_interface/sync_low/n72QYQCEC4tod_receiver/tod_receiver/manchester_decoder/n215QYQCEC4audio_interface/sync/n72QXQCEC4fill_output/sync/n72 QXQCEC4tod_receiver/sync/n72gQYQCEC4receiver_interface/sync/n72QYQlCEC4iic_bus_interface/sync/n72QYQjCEC4external_port/sync/n72&eQYQCEC4address_generator/int_addr30<16>(OUTI1G2G2internal_port/n89>QXQuCEC4rCEC4n1407HQXQINOn1373IKQXQINOn1401TQXQ INOaddress_generator/int_addr30<17>ZOUTI1F2F2address_generator/int_addr30<18>\OUTI1G2G2address_generator/int_addr30<19>^OUTI1F2F2audio_interface/doe_nQXQrTRITsynthesizer_interface/sync_high/n72~QYQCEC4n1386QXQINOantenna_interface/sync/n72dQXQhCEC4tod_receiver/n88QYQCEC4receiver_interface/dac/ser_dato267XQXQ6H1C1n1367uQXQINOrcp_wr_tri/y12QXQINOn1360QYQ}INOn1368rQXQINOn14037MQYQINOn1371T:QYQ!INOn1402UYQYQ INOaudio_interface/aud_ctl_dat62VQXQrINOiic_bus_interface/doe_naMQXQmTRITn1404ewQXQINOn1361v'OUTI1)INOn1410QYQINOn1398QXQINOn1397QYQINOn1400QXQINOcp_nPADCLKININIrcp_ale_PADCLKININIadf_home_en  OUT PADam_mode_ind  OUT PADant_selD PADINant_tune_clk OUTPADant_tune_dat OUTPADn2470 GDn2469 FDn3407 GDn3406 FDn3397 GDn3398 FDn3014  H#Dantenna_interface/ant/clock_reg<4>_Gint !G Gn3011 $H'Dantenna_interface/ant/clock_reg<5>_Gint %G$Gn2849< (H+Dantenna_interface/ant/clock_reg<7>_Gint )G(Gn3523 ,G/Dn3524 -F.Dn2460 1F2Dn2464 3G6Dn2465 4F5Dn3929 7H:Dantenna_interface/ant/cycle_reg<3>_Gint 8G7Gn3928 9F7Fn3213& ;H>Dn3212' =F;Fn2457 BGEDn2458 CFDDn3235. GFHDn2449 JGMDn2450 KFLDn2366 NGQDn2367 OFPDn2358 RGUDn2359 SFTDn2350 VGYDn2351} WFXDn2342z ZG]Dn2343w [F\Dn3427 ^GaDn3426 _F`Dn2780 gFhDn2762 lGoDn2763 mFnDaud_ctl_clk pOUTqPADaud_ctl_dat rOUTsINtPADaud_ctl_stb uOUTvPADaudio_interface/aud/clock_reg<0>_Hint zH~Dn3634 GDn3635 FDn3471 HDaudio_interface/aud/clock_reg<3>_Gint GGn3662 GDn3661 FDn2955 FDn3898x GDn3899w FDn2335t FDn3880r GDn3881p FDn3889s GDn3888u FDn3422 FDn2442 FDn2815* GDn2814+ FDn3535 HDn3534 FFn2872I FDn3873m GDn3872n FDn3865k GDn3864l FDn3142 GDn3141 FDn3637 FDaudio_interface/aud/read_cycle_reg_Hint HDn2510, FDn37031 FFaudio_interface/sync/ale_latch_reg_Hint HDn2616 GDn2617 FDn2622 GDn2623 FDband_lo_0z PADINband_lo_1y PADINband_sel_0M OUTPADband_sel_1F OUTPADbit_fault_dsc OUTPADn37052 HDbootstrap/decode/ext_reg<0>_Gint GGn2958 FDn3167 HDbootstrap/dma_cnt/iq_reg<0>_Gint GGn3166 FFn3031 HDbootstrap/dma_cnt/iq_reg<10>_Gint GGn3030 FFn3418 FDn3021 HDbootstrap/dma_cnt/iq_reg<12>_Gint GGn3020 FFn3348{ HDn3347| FFn3160 H Dbootstrap/dma_cnt/iq_reg<15>_Gint GGn3159 FFn3330s  H Dn3328u  G Gn3329t  F Fn3177 HDbootstrap/dma_cnt/iq_reg<17>_Gint GGn3176 FFn3366 HDn3365 FFn3183 HDbootstrap/dma_cnt/iq_reg<19>_Gint GGn3182 FFn28466 HDbootstrap/dma_cnt/iq_reg<1>_Gint GGn28457 FFn3230+ H!Dn3229,  FFn3037 "H%Dbootstrap/dma_cnt/iq_reg<3>_Gint #G"Gn3036 $F"Fn28363 &H)Dbootstrap/dma_cnt/iq_reg<4>_Gint 'G&Gn28354 (F&Fn3223( *H-Dn3221* +G*Gn3222) ,F*Fn3205# .H1Dn3204$ 0F.Fn3358 2H5Dn3356 3G2Gn3357 4F2Fn3195! 6H9Dn3194" 8F6Fn3412 ;F<Dn3921 =H@Dbootstrap/incr_addr_reg_Gint >G=Gn2499# EFDFFDn3852i HFJDn3338x KHNDn3337y MFKFn3099 PFQDn3815d RGUDn3816c SFTDn2759 WFXDn2669 ZH]Dbootstrap/rx/baud16_reg<5>_Gint \FZFn3265> _GbDn3266< `FaDn3310T dFeDn2667 gFiDn2408 jHmDbootstrap/rx/cycle_reg<1>_Gint kGjGn3700+ nHqDn3698- oGnGn3699, pFnFn2752 sFtDn3391 wFxDn28260 yH|Dbootstrap/rx/div16_reg<2>_Gint zGyGn2661 }HDbootstrap/rx/sreg_reg<0>_Hint HDbootstrap/rx/sreg_reg<1>_Hint HDbootstrap/rx/sreg_reg<2>_Hint HDbootstrap/rx/sreg_reg<4>_Hint HDn3093 GDn3092 FDn3760K GDn3759M FDn3793\ GDn3794[ FDn3802] GDn3801^ FDn3765O GDn3766N FDn3477 HDbootstrap/tx/baud_reg<6>_Gint GGn3540 HDn3539 GGn3474 HDbootstrap/tx/baud_reg<9>_Gint GGn2401 HDbootstrap/tx/cycle_reg<1>_Gint GGn3294J FDn3547 HDn3545 GGn3546 FFn2823- HDn2822. GGn2651 HDn2650 GGn2643 HDn2642 GGn2635 HDn2634 GGn2550D HDn2549E GGn2542A HDn2541B GGn25299 HDn2528: GGn25215 HDn25206 FFn3289G GDn3288H FDn37177 FDbootstrap/wr_control/cycle_rst_n_reg_Gint GGn3436 GDn3437 FDbootstrap/wr_source/r00/q_reg<2>_Hint HDbootstrap/wr_source/r00/q_reg<3>_Hint HDbootstrap/wr_source/r01/q_reg<0>_Hint H Dbootstrap/wr_source/r10/q_reg<0>_Hint &H*Dbootstrap/wr_source/r10/q_reg<2>_Hint +H/Dbootstrap/wr_source/r11/q_reg<3>_Hint 6H:Dbootstrap/wr_source/r12/q_reg<1>_Hint >HBDbootstrap/wr_source/r20/q_reg<2>_Hint RHVDbootstrap/wr_source/r22/q_reg<1>_Hint cHgDbootstrap/wr_source/r22/q_reg<2>_Hint hHlDbootstrap/wr_source/r23/q_reg<2>_Hint vHzDcd_n |PAD{INck32khzD }OUT~PADdig_dat_sel PADINext_bs_dati PADINext_bs_dato OUTPADext_tod_in PADINexternal_port/rcp_reg1_reg_Hint HDexternal_port/rcp_reg1_reg_Hint HDexternal_port/rcp_reg1_reg_Hint HDn2964 FDexternal_port/sync/wr_n_latch_reg_Hint HDn2436 FDfan_enable PADINn3636 FDn3628 GDn3627 FDn3668 GDn3669 FDn3751J GDn3752I FDn3631 GDn3632 FDn3744H GDn3745G FDn3681 GDn3680# FDn3674 GDn3675 FDn2977 FDn3150 GDn3149 FDn3134 GDn3133 FDn3126 GDn3125 FDn2969 GDn2970 FDn3118 GDn3117 FDn3007 GDn3006 FDn2999 GDn2998 FDn2660 FDn3306Q FDfan_interface/sync/ale_latch_reg_Hint HDn2966 FDfan_phase_a OUTPADfan_phase_bT OUTPADfan_phase_cS OUTPADfan_sensex PADINfill_cc_dat OUTPADfill_clk OUTPADfill_data PADINfill_modeE PADINfill_output/fill_cc_dat_reg_Hint HDfill_output/sync/ale_latch_reg_Hint  H Dn2769 FDfill_output/sync/wr_n_latch_reg_Hint HDn2627 GDn2626 FDfill_req OUTPADfm_hi_band OUTPADfnc_cs_n` PADINn2324Q  F"Dn3924 #H&Diic_bus_interface/iic/clock_reg<0>_Gint $G#Gn3285C 'G*Dn3284E (F)Dn2655 +H.Diic_bus_interface/iic/clock_reg<3>_Gint ,G+Gn3278B /G2Dn3279A 0F1Dn3069 3H6Dn3068 4G3Gn2653 7H:Diic_bus_interface/iic/clock_reg<6>_Gint 8G7Gn2574c <F=Dn2991 ?F@Dn3098 BFCDn3939 GHJDiic_bus_interface/iic/scl_reg_Gint HGGGn3938 IFGFn3299L LFMDn2985 NGQDn2986 OFPDn2807% UGXDn2806' VFWDn2798" YG\Dn2797# ZF[Dn2789 ]G`Dn2788! ^F_Dn2936y aGdDn2935{ bFcDn2961 iFjDiic_sclO kOUTlPADiic_sdaN mOUTnINoPADinternal_port/sync/wr_n_latch_reg_Hint yH}Dn2772 FDn3433 GDn3434 FDn3322m HDinterrupt_source/intr_reg_Gint GGn3321n FFinterrupt_source/q_reg<0>_Hint HDinterrupt_source/q_reg<2>_Hint HDinterrupt_source/q_reg<4>_Hint HDlow_battw PADINmemory_interface/dff_reg_Hint HDmemory_interface/rcp_1553_cs_n_reg_Hint HDpower_on PADINptt PADINradio_rly_ky PADINrcp_1553_cs_n OUTPADrcp_1553_csi_n PADINrcp_a_bus<16>' PADINrcp_a_bus<17>Y PADINrcp_a_bus<18>[ PADINrcp_a_bus<19>] PADINrcp_ad_bus<0> OUTINPADrcp_ad_bus<10>! OUTINPADrcp_ad_bus<11>" OUTINPADrcp_ad_bus<12># OUTINPADrcp_ad_bus<13>$ OUTINPADrcp_ad_bus<14>% OUTINPADrcp_ad_bus<15>& OUTINPADrcp_ad_bus<1> OUTINPADrcp_ad_bus<2> OUTINPADrcp_ad_bus<3> OUTINPADrcp_ad_bus<4> OUTINPADrcp_ad_bus<5> OUTINPADrcp_ad_bus<6> OUTINPADrcp_ad_bus<7> OUTINPADrcp_ad_bus<8> OUTINPADrcp_ad_bus<9> OUTINPADrcp_addr_bus<0> OUTPADrcp_addr_bus<10> OUTPADrcp_addr_bus<11> OUTPADrcp_addr_bus<12> OUTPADrcp_addr_bus<13> OUTPADrcp_addr_bus<14> OUTPADrcp_addr_bus<15> OUTPADrcp_addr_bus<16> OUTPADrcp_addr_bus<17> OUTPADrcp_addr_bus<18> OUTPADrcp_addr_bus<19> OUTPADrcp_addr_bus<1> OUTPADrcp_addr_bus<2> OUTPADrcp_addr_bus<3> OUTPADrcp_addr_bus<4> OUTPADrcp_addr_bus<5> OUTPADrcp_addr_bus<6> OUTPADrcp_addr_bus<7> OUT PADrcp_addr_bus<8>  OUT PADrcp_addr_bus<9>  OUT PADrcp_eep_cs_n OUTPADrcp_hlda PADINrcp_hold OUTPADrcp_ptt_int OUTPADrcp_rd_n- OUTINPADrcp_tod_int OUTPADrcp_wr_n. OUTINPADrcv_tune_clkR OUT PADrcv_tune_datP !OUT"PADrcv_tune_lb $PAD#INrcv_tune_ld_nQ %OUT&PADready_dsciu (PAD'INready_dscoE )OUT*PADn2926w 1G4Dn2927u 2F3Dn2863B 5H8Dreceiver_interface/dac/clock_reg<2>_Gint 7F5Fn2571[ ;F<Dn2583g >F?Dn2914r @GCDn2915q AFBDn3554 DHGDn3552 EGDGn3553 FFDFn2695 JFHFn37084 LFMDn2909o NGQDn2910m OFPDn2736 RGUDn2737 SFTDn2556I WFYDn2727 ZG]Dn2728 [F\Dn2718 ^GaDn2719 _F`Dn2709 bGeDn2710 cFdDn3818e iHlDreceiver_interface/sync/wr_n_latch_reg_Hint mHqDn25133 sFtDn3103 vFwDn3272@ xG{Dn3273? yFzDn2534= |HDrtc_divide/clock_reg<6>_Gint }G|Gn3431 GDn3430 FDsc_fh_ind OUTPADsqlch_tn_dis PADINsquelch_ind OUTPADsyn_ctl_clk OUTPADsyn_ctl_dat OUTPADsyn_ctl_en1 OUTPADsyn_ctl_en2 OUTPADsyn_ctl_en3 OUTPADn2619 FDn2613 FDn2503& GDn2502( FDn3258: FDn3482 HDsynthesizer_interface/synth/clock_reg<3>_Gint GGn2920s GDn2919t FDn2810) FDn3693( HDn3691* GGn3692) FFn37063 FDn2506* GDn2507) FDn3516 GDn3515 FDn3508 GDn3507 FDn3500 GDn3499 FDn3492 GDn3491 FDn3624 GDn3623 FDn3616 GDn3615 FDn3110 FDn3591 GDn3592 FDn3608 GDn3607 FDn3600 GDn3599 FDtake_ctl PADINn2776 GDn3931 HDtod_receiver/tod_receiver/cycle_reg<0>_Gint GGn2701 FDn2590n GDn2589s FDn2676 H Dn2675  GGn2404 HDtod_receiver/tod_receiver/manchester_decoder/timeout_reg<0>_Gint GGn3686& GDn3685' FDn3528 HDn3527 GGn3312_ H"Dtod_receiver/tod_receiver/manchester_decoder/timeout_reg<12>_Gint  GGn3185 #H&Dtod_receiver/tod_receiver/manchester_decoder/timeout_reg<2>_Gint $G#Gn3316j 'H*Dtod_receiver/tod_receiver/manchester_decoder/timeout_reg<3>_Gint (G'Gn3314f +H.Dtod_receiver/tod_receiver/manchester_decoder/timeout_reg<5>_Gint ,G+Gn3738F /G2Dn3739D 0F1Dtod_receiver/tod_receiver/shift_reg_reg<0>_Hint 3H7Dtod_receiver/tod_receiver/shift_reg_reg<13>_Hint ;H?Dtod_receiver/tod_receiver/shift_reg_reg<14>_Hint @HDDtone_key LPADKINn2417 \F[Fn2422 ^F]Fn2427 `F_FU2930_Gint iFgFn2680 lGkGn2679 mFkFn2685 oGnGn2684 pFnFn2690 rGqGU3135_Gint vFtFU3142_Gint zFxFU3153_Gint ~F|Fn2878L FFn2883T GGn2884S FFn2889[ GGn2890Z FFn2896b GGn2897a FFn2903h GGn2904g FFn3043 GGn3044 FFn3050 GGn3051 FFn3057 GGn3058 FFn3063 GGn3064 FFxmod_ctl PADIN