PAR: Xilinx Place And Route M1.5.20. Copyright (c) 1995-1998 Xilinx, Inc. All rights reserved. Tue Oct 06 13:50:44 1998 par -w -ol 4 -i 4 -t 1 -n 5 -s 5 map.ncd ../p4.dir bdes.pcf Constraints file: bdes.pcf Loading device database for application par from file "map.ncd". "bdes" is an NCD, version 2.27, device xc4010xl, package pq208, speed -1 Loading device for application par from file '4010xl.nph' in environment C:/fndtn. Device speed data version: x1_0.37 1.22 FINAL. Writing design to file "C:/TEMP/xil_93". Device utilization summary: Number of External IOBs 103 out of 160 64% Flops: 0 Latches: 0 Number of Global Buffer IOBs 2 out of 8 25% Flops: 0 Latches: 0 Number of CLBs 350 out of 400 87% Total Latches: 0 out of 800 0% Total CLB Flops: 441 out of 800 55% 4 input LUTs: 657 out of 800 82% 3 input LUTs: 153 out of 400 38% Number of BUFGLSs 2 out of 8 25% Overall effort level (-ol): 4 (set by user) Placer effort level (-pl): 4 (default) Placer cost table entry (-t): 1 Router effort level (-rl): 4 (default) Timing method (-kpaths|-dfs): -kpaths (default) Starting initial Timing Analysis. REAL time: 9 secs Finished initial Timing Analysis. REAL time: 13 secs Starting initial Placement phase. REAL time: 15 secs Finished initial Placement phase. REAL time: 16 secs Starting Constructive Placer. REAL time: 17 secs Placer score = 758271 Placer score = 507499 Placer score = 493131 Placer score = 454077 Placer score = 415638 Placer score = 396262 Placer score = 372115 Placer score = 362926 Placer score = 334704 Placer score = 316531 Placer score = 307361 Placer score = 280109 Placer score = 275877 Placer score = 265451 Placer score = 250857 Placer score = 246086 Placer score = 239061 Placer score = 226869 Placer score = 219616 Placer score = 217053 Placer score = 203485 Placer score = 202950 Placer score = 196730 Placer score = 192764 Placer score = 188208 Placer score = 186474 Placer score = 183824 Placer score = 183676 Placer score = 182691 Placer score = 179720 Placer score = 179534 Placer score = 177388 Placer score = 176776 Placer score = 176546 Placer score = 175519 Placer score = 175039 Placer score = 175009 Finished Constructive Placer. REAL time: 8 mins 34 secs Writing design to file "../p4.dir/4_4_1.ncd". Starting Optimizing Placer. REAL time: 8 mins 34 secs Optimizing .. Swapped 22 comps. Xilinx Placer [1] 174708 REAL time: 9 mins 6 secs Optimizing .. Swapped 2 comps. Xilinx Placer [2] 174708 REAL time: 9 mins 35 secs Finished Optimizing Placer. REAL time: 9 mins 35 secs Writing design to file "../p4.dir/4_4_1.ncd". Total REAL time to Placer completion: 9 mins 36 secs Total CPU time to Placer completion: 9 mins 32 secs 0 connection(s) routed; 3402 unrouted. Starting router resource preassignment Completed router resource preassignment. REAL time: 9 mins 53 secs Starting iterative routing. Routing active signals. End of iteration 1 3402 successful; 0 unrouted; (1772124) REAL time: 10 mins 25 secs Improving timing. End of iteration 2 3402 successful; 0 unrouted; (14190) REAL time: 11 mins 24 secs WARNING:basrt:188 - Routing for this placement can not meet all timing constraints. It may have as many as 5 timing errors. Routing PWR/GND nets. Power and ground nets completely routed. End of iteration 3 3402 successful; 0 unrouted; (12474) REAL time: 13 mins 36 secs End of iteration 4 3402 successful; 0 unrouted; (11354) REAL time: 15 mins 25 secs Writing design to file "../p4.dir/4_4_1.ncd". Starting cleanup WARNING:basrt:188 - Routing for this placement can not meet all timing constraints. It may have as many as 5 timing errors. Improving routing. End of cleanup iteration 1 3402 successful; 0 unrouted; (11381) REAL time: 17 mins 15 secs Writing design to file "../p4.dir/4_4_1.ncd". Total REAL time: 17 mins 16 secs Total CPU time: 17 mins 8 secs End of route. 3402 routed (100.00%); 0 unrouted. No errors found. Completely routed. The design submitted for place and route did not meet the specified timing requirements. Please use the static timing analysis tools (TRCE or Timing Analyzer) to report which constraints were not met. To obtain a better result, you may try the following: * Use the Re-entrant routing feature to run more router iterations on the design. * Check the timing constraints to make sure the design is not over-constrained. * Specify a higher placer effort level, if possible. * Specify a higher router effort level. * Use the Multi-Pass PAR (MPPR) feature. This generates multiple placement trials from which the best (i.e., lowest design score) placement can be used with re-entrant routing to obtain a better result. Please consult the Development System Reference Guide for more detailed information about the usage options pertaining to these features. Total REAL time to Router completion: 17 mins 19 secs Total CPU time to Router completion: 17 mins 11 secs Generating PAR statistics. The Delay Summary Report The Score for this design is: 7997 The Number of signals not completely routed for this design is: 0 The Average Connection Delay for this design is: 4.359 ns The Average Connection Delay on critical nets is: 0.000 ns The Average Clock Skew for this design is: 0.172 ns The Maximum Pin Delay is: 23.154 ns The Average Connection Delay on the 10 Worst Nets is: 16.684 ns Listing Pin Delays by value: (ns) d <= 10 < d <= 20 < d <= 30 < d <= 40 < d <= 50 d > 50 --------- --------- --------- --------- --------- --------- 3209 184 9 0 0 0 Timing Score: 11381 WARNING:baspw:101 - Timing constraints have not been met. Asterisk (*) preceding a constraint indicates it was not met. -------------------------------------------------------------------------------- Constraint | Requested | Actual | Logic | | | Levels -------------------------------------------------------------------------------- * TS_01 = PERIOD TIMEGRP "clk" 20 nS HIG | 20.000ns | 23.011ns | 8 H 50.000 % | | | -------------------------------------------------------------------------------- 1 constraint not met. Writing design to file "../p4.dir/4_4_1.ncd". All signals are completely routed. Total REAL time to PAR completion: 17 mins 31 secs Total CPU time to PAR completion: 17 mins 21 secs PAR done.