PAR: Xilinx Place And Route M1.3.7.
Copyright (c) 1995-1997 Xilinx, Inc.  All rights reserved.

Fri Oct 17 08:55:21 1997


par -w -l 4 -d 0 map.ncd epiclab.ncd epiclab.pcf



Constraints file: epiclab.pcf

Placement level-cost: 4-1



Loading device database for application par from file "map.ncd".
   "ONECLOCK" is an NCD, version 2.27, device xc4005xl, package pc84, speed -1
Loading device for application par from file '4005xl.nph' in environment
C:/Xilinx.
Device speed data version:  x1_0.35.1.4 3.7ag PRELIMINARY.


Device utilization summary:

   IO            5/112     4% used
                 5/61      8% bonded
   LOGIC        10/196     5% used
   SPECIAL       1/1167    0% used

   CLKIOB        1/8      12% used
   IOB           4/112     3% used

   CLB          10/196     5% used

   BUFGLS        1/8      12% used


Starting initial Placement phase.  REAL time: 12 secs 
Finished initial Placement phase.  REAL time: 12 secs 


Starting Constructive Placer.  REAL time: 12 secs .
Placer score = 15780
Placer score = 13680
Placer score = 12780
Placer score = 12240
Placer score = 10080
Placer score = 8340
Placer score = 7740
Placer score = 6660
Placer score = 4140
Placer score = 3480
Placer score = 2700
Placer score = 2640
Finished Constructive Placer.  REAL time: 26 secs 


Dumping design to file "epiclab.ncd".

Starting Optimizing Placer.  REAL time: 26 secs 
Optimizing  
Swapped 3 comps.
Xilinx Placer [1]   2520   REAL time: 26 secs 
Finished Optimizing Placer.  REAL time: 26 secs 


Dumping design to file "epiclab.ncd".

Total REAL time to Placer completion: 26 secs 
Total CPU time to Placer completion: 26 secs 


0 connection(s) routed; 67 unrouted.
Starting router resource preassignment
Completed router resource preassignment. Real time: 27 secs  
Starting iterative routing. 
End of iteration 1 
67 successful; 0 unrouted; (0) real time: 27 secs  
Constraints are met. 
Power and ground nets completely routed. 
Dumping design to file "epiclab.ncd".
Starting cleanup 
End of cleanup iteration 1 
67 successful; 0 unrouted; (0) real time: 28 secs  
Dumping design to file "epiclab.ncd".
Total CPU time 28 secs  
Total REAL time: 28 secs  
Completely routed. 
End of route.  67 routed (100.00%); 0 unrouted.
No errors found. 

Total REAL time to Router completion: 28 secs 
Total CPU time to Router completion: 28 secs 


Generating PAR statistics.

   The Delay Summary Report


   The Score for this design is: 184



The Number of signals not completely routed for this design is: 0


   The Average Connection Delay for this design is:        1.466 ns
   The Average Connection Delay on critical nets is:       0.000 ns
   The Average Clock Skew for this design is:              0.031 ns
   The Maximum Pin Delay is:                               3.591 ns
   The Average Connection Delay on the 10 Worst Nets is:   1.907 ns

   Listing Pin Delays by value: (ns)


    d <= 10    < d <= 20   < d <= 30   < d <= 40   < d <= 50    d > 50
   ---------   ---------   ---------   ---------   ---------   ---------
          67           0           0           0           0           0


Timing Score: 0


Dumping design to file "epiclab.ncd".


All signals are completely routed.


Total REAL time to PAR completion: 30 secs 
Total CPU time to PAR completion: 30 secs 

PAR done.