Xilinx Mapping Report File for Design "design_1"
          Copyright (c) 1995-1997 Xilinx, Inc.  All rights reserved.



Section:  DRC Messages
----------------------


Section:  Mapper Warnings and Errors
------------------------------------


Section:  Design Information
----------------------------

Command Line   : map -p xc4005e-3-pq100 -o map.ncd ../xc4000e.ngd design_1.pcf 
Target Device  : x4005e
Target Package : pq100
Target Speed   : -3
Mapper Version : xc4000e -- M1.3.7
Mapped Date   : Thu Oct 16 09:51:50 1997

Section:  Design Attributes
---------------------------

 Attribute LOC

 Attribute BLKNM

 Attribute OPTIMIZE

 Attribute OPT_EFFORT

Section:  Removed Logic
-----------------------

Block "PELFIFO/$1I215/INTBUF" (X_INV) redundant - removed.
Block "$1N555.ZERO" (X_ZERO) removed due to optimization.

The trimmed logic report below shows the logic removed from your design due to
sourceless or loadless signals, and VCC or ground connections.  If the removal
of a signal or symbol results in the subsequent removal of an additional signal
or symbol, the message explaining that second removal will be indented.  This
indentation will be repeated as a chain of related logic is removed.

To quickly locate the original cause for the removal of a chain of logic, look
above the place where that logic is listed in the trimming report, then locate
the lines that are least indented (begin at the leftmost edge).
The signal "CTL/Q0/O" is loadless and has been removed.
 Loadless block "CTL/Q0/O.BUF" (X_BUF) removed.
The signal "CTL/Q1/O" is loadless and has been removed.
 Loadless block "CTL/Q1/O.BUF" (X_BUF) removed.
The signal "CTL/Q2/O" is loadless and has been removed.
 Loadless block "CTL/Q2/O.BUF" (X_BUF) removed.
The signal "CTL/Q3/O" is loadless and has been removed.
 Loadless block "CTL/Q3/O.BUF" (X_BUF) removed.
The signal "CTL/Q4/O" is loadless and has been removed.
 Loadless block "CTL/Q4/O.BUF" (X_BUF) removed.
The signal "CTL/Q5/O" is loadless and has been removed.
 Loadless block "CTL/Q5/O.BUF" (X_BUF) removed.
The signal "CTL/Q6/O" is loadless and has been removed.
 Loadless block "CTL/Q6/O.BUF" (X_BUF) removed.
The signal "CTL/Q7/O" is loadless and has been removed.
 Loadless block "CTL/Q7/O.BUF" (X_BUF) removed.
The signal "CTL/Q8/O" is loadless and has been removed.
 Loadless block "CTL/Q8/O.BUF" (X_BUF) removed.
The signal "CTL/Q9/O" is loadless and has been removed.
 Loadless block "CTL/Q9/O.BUF" (X_BUF) removed.
The signal "PELFIFO/AR0/Q0/O" is loadless and has been removed.
 Loadless block "PELFIFO/AR0/Q0/O.BUF" (X_BUF) removed.
The signal "PELFIFO/AR0/Q1/O" is loadless and has been removed.
 Loadless block "PELFIFO/AR0/Q1/O.BUF" (X_BUF) removed.
The signal "PELFIFO/AR0/Q2/O" is loadless and has been removed.
 Loadless block "PELFIFO/AR0/Q2/O.BUF" (X_BUF) removed.
The signal "PELFIFO/AR0/Q3/O" is loadless and has been removed.
 Loadless block "PELFIFO/AR0/Q3/O.BUF" (X_BUF) removed.
The signal "PELFIFO/AR0/Q4/O" is loadless and has been removed.
 Loadless block "PELFIFO/AR0/Q4/O.BUF" (X_BUF) removed.
The signal "PELFIFO/AR0/Q5/O" is loadless and has been removed.
 Loadless block "PELFIFO/AR0/Q5/O.BUF" (X_BUF) removed.
The signal "PELFIFO/AR0/Q6/O" is loadless and has been removed.
 Loadless block "PELFIFO/AR0/Q6/O.BUF" (X_BUF) removed.
The signal "PELFIFO/AR0/Q7/O" is loadless and has been removed.
 Loadless block "PELFIFO/AR0/Q7/O.BUF" (X_BUF) removed.
The signal "PELFIFO/CASD/$1I37/O" is loadless and has been removed.
 Loadless block "PELFIFO/CASD/$1I37/BUF" (X_BUF) removed.

Merged Signal(s):
The signal "PELFIFO/$1I215/inv_to_obuf" was merged into signal "PELFIFO/DRQF".

Section:  Removed Logic Summary
-------------------------------

  19 block(s) clipped
   1 block(s) removed
   1 block(s) optimized away
  19 signal(s) removed
   1 signal(s) merged

Section:  Added Logic
---------------------


Section:  Expanded Logic
------------------------

"CTL/Q0" (INFF) expanded into these physical comps:  DBUS0 (IOB)
"CTL/Q1" (INFF) expanded into these physical comps:  DBUS1 (IOB)
"CTL/Q2" (INFF) expanded into these physical comps:  DBUS2 (IOB)
"CTL/Q3" (INFF) expanded into these physical comps:  DBUS3 (IOB)
"CTL/Q4" (INFF) expanded into these physical comps:  DBUS4 (IOB)
"CTL/Q5" (INFF) expanded into these physical comps:  DBUS5 (IOB)
"CTL/Q6" (INFF) expanded into these physical comps:  DBUS6 (IOB)
"CTL/Q7" (INFF) expanded into these physical comps:  DBUS7 (IOB)
"CTL/Q8" (INFF) expanded into these physical comps:  DBUS8 (IOB)
"CTL/Q9" (INFF) expanded into these physical comps:  DBUS9 (IOB)
"PELFIFO/AR0/Q0" (INFF) expanded into these physical comps:  PELD0 (IOB)
"PELFIFO/AR0/Q1" (INFF) expanded into these physical comps:  PELD1 (IOB)
"PELFIFO/AR0/Q2" (INFF) expanded into these physical comps:  PELD2 (IOB)
"PELFIFO/AR0/Q3" (INFF) expanded into these physical comps:  PELD3 (IOB)
"PELFIFO/AR0/Q4" (INFF) expanded into these physical comps:  PELD4 (IOB)
"PELFIFO/AR0/Q5" (INFF) expanded into these physical comps:  PELD5 (IOB)
"PELFIFO/AR0/Q6" (INFF) expanded into these physical comps:  PELD6 (IOB)
"PELFIFO/AR0/Q7" (INFF) expanded into these physical comps:  PELD7 (IOB)
"PELFIFO/CASD/$1I37" (INFF) expanded into these physical comps:  CASIN2- (IOB)
"$1I486" (BUFGP) expanded into these physical comps:  $1I486 (PRI-CLK)
     CPUCLK (CLKIOB)
"$1I493/$1I30" (AND3) expanded into these physical comps:  DO9/2.0 (CLB)
"$1I493/$1I35" (AND3) expanded into these physical comps:  DO9/2.0 (CLB)
"$1I493/$1I47" (NOR4) expanded into these physical comps:  DO9/2.0 (CLB)
"$1I493/$1I55" (AND3) expanded into these physical comps:  DO9/2.0 (CLB)
"$1I494/$1I30" (AND3) expanded into these physical comps:  DO8/2.0 (CLB)
"$1I494/$1I35" (AND3) expanded into these physical comps:  DO8/2.0 (CLB)
"$1I494/$1I47" (NOR4) expanded into these physical comps:  DO8/2.0 (CLB)
"$1I494/$1I55" (AND3) expanded into these physical comps:  DO8/2.0 (CLB)
"$1I495/$1I30" (AND3) expanded into these physical comps:  DO7/2.0 (CLB)
"$1I495/$1I35" (AND3) expanded into these physical comps:  DO7/2.0 (CLB)
"$1I495/$1I47" (NOR4) expanded into these physical comps:  DO7/2.0 (CLB)
"$1I495/$1I55" (AND3) expanded into these physical comps:  DO7/2.0 (CLB)
"$1I496/$1I30" (AND3) expanded into these physical comps:  DO6/2.0 (CLB)
"$1I496/$1I35" (AND3) expanded into these physical comps:  DO6/2.0 (CLB)
"$1I496/$1I47" (NOR4) expanded into these physical comps:  DO6/2.0 (CLB)
"$1I496/$1I55" (AND3) expanded into these physical comps:  DO6/2.0 (CLB)
"$1I497/$1I30" (AND3) expanded into these physical comps:  DO5 (CLB)
"$1I497/$1I35" (AND3) expanded into these physical comps:  DO5 (CLB)
"$1I497/$1I40" (AND3) expanded into these physical comps:  DO5 (CLB)
"$1I497/$1I47" (NOR4) expanded into these physical comps:  DO5 (CLB)
"$1I497/$1I55" (AND3) expanded into these physical comps:  DO5 (CLB)
"$1I498/$1I30" (AND3) expanded into these physical comps:  DO4 (CLB)
"$1I498/$1I35" (AND3) expanded into these physical comps:  DO4 (CLB)
"$1I498/$1I40" (AND3) expanded into these physical comps:  DO4 (CLB)
"$1I498/$1I47" (NOR4) expanded into these physical comps:  DO4 (CLB)
"$1I498/$1I55" (AND3) expanded into these physical comps:  DO4 (CLB)
"$1I499/$1I30" (AND3) expanded into these physical comps:  DO3/2.0 (CLB)
"$1I499/$1I35" (AND3) expanded into these physical comps:  DO3/2.0 (CLB)
"$1I499/$1I47" (NOR4) expanded into these physical comps:  DO3/2.0 (CLB)
"$1I499/$1I55" (AND3) expanded into these physical comps:  DO3/2.0 (CLB)
"$1I500/$1I30" (AND3) expanded into these physical comps:  DO2/2.0 (CLB)
"$1I500/$1I35" (AND3) expanded into these physical comps:  DO2/2.0 (CLB)
"$1I500/$1I47" (NOR4) expanded into these physical comps:  DO2/2.0 (CLB)
"$1I500/$1I55" (AND3) expanded into these physical comps:  DO2/2.0 (CLB)
"$1I501/$1I30" (AND3) expanded into these physical comps:  DO1 (CLB)
"$1I501/$1I35" (AND3) expanded into these physical comps:  DO1 (CLB)
"$1I501/$1I40" (AND3) expanded into these physical comps:  DO1 (CLB)
"$1I501/$1I47" (NOR4) expanded into these physical comps:  DO1 (CLB)
"$1I501/$1I55" (AND3) expanded into these physical comps:  DO1 (CLB)
"$1I502/$1I30" (AND3) expanded into these physical comps:  DO0 (CLB)
"$1I502/$1I35" (AND3) expanded into these physical comps:  DO0 (CLB)
"$1I502/$1I40" (AND3) expanded into these physical comps:  DO0 (CLB)
     VIDTIM/CSY- (CLB), VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"$1I502/$1I47" (NOR4) expanded into these physical comps:  DO0 (CLB)
"$1I502/$1I55" (AND3) expanded into these physical comps:  DO0 (CLB)
"PELFIFO/$1I164" (OR3) expanded into these physical comps:  PELFIFO/RQS (CLB)
"PELFIFO/$1I215" (OBUF) expanded into these physical comps:  DRQOUT- (IOB)
"PELFIFO/$1I264" (AND3) expanded into these physical comps:  PELFIFO/RQS (CLB)
"PELFIFO/$1I277" (AND4) expanded into these physical comps:  PELFIFO/FDIS (CLB)
"PELFIFO/$1I311" (AND3) expanded into these physical comps:  PELFIFO/POP (CLB)
"PELFIFO/$1I39" (AND3) expanded into these physical comps:  PELFIFO/POPWT (CLB)
"PELFIFO/$1I7" (AND3) expanded into these physical comps:  PELFIFO/POPWT (CLB)
"PELFIFO/FIFO/$1I2952" (AND4) expanded into these physical comps:  
     PELFIFO/FIFO/A (CLB)
"PELFIFO/FIFO/$1I3355" (OR3) expanded into these physical comps:  
     PELFIFO/FIFO/LAST (CLB)
"PELFIFO/FIFO/$1I3434" (AND3) expanded into these physical comps:  
     PELFIFO/FIFO/A (CLB)
"PELFIFO/FIFO/$1I3439" (AND3) expanded into these physical comps:  
     PELFIFO/FIFO/LAST (CLB)
"PELFIFO/FIFO/$1I3440" (AND3) expanded into these physical comps:  
     PELFIFO/FIFO/LAST (CLB)
"PELFIFO/FIFO/$1I3457" (OR3) expanded into these physical comps:  
     PELFIFO/RQS (CLB)
"PELFIFO/FIFO/APRD/$1I2690" (AND3) expanded into these physical comps:  
     PELFIFO/FIFO/AR2 (CLB)
"PELFIFO/FIFO/APWR/$1I2690" (AND3) expanded into these physical comps:  
     PELFIFO/FIFO/AW2 (CLB)
"PELFIFO/FIFO/C4UD/$1I3039" (AND3) expanded into these physical comps:  
     PELFIFO/FIFO/Q1 (CLB)
"PELFIFO/FIFO/C4UD/$1I3040" (AND3) expanded into these physical comps:  
     PELFIFO/FIFO/Q1 (CLB)
"PELFIFO/FIFO/C4UD/$1I3043" (AND4) expanded into these physical comps:  
     PELFIFO/FIFO/C4UD/$1N2959 (CLB)
"PELFIFO/FIFO/C4UD/$1I3044" (AND4) expanded into these physical comps:  
     PELFIFO/FIFO/C4UD/$1N2959 (CLB)
"PELFIFO/FIFO/C4UD/$1I3048" (AND3) expanded into these physical comps:  
     PELFIFO/FIFO/C4UD/F (CLB)
"PELFIFO/FIFO/C4UD/$1I3049" (AND3) expanded into these physical comps:  
     PELFIFO/FIFO/C4UD/$1N2959 (CLB)
"REGSA/$1I44" (AND4) expanded into these physical comps:  DOEN- (CLB)
"ARNE1" (AND4) expanded into these physical comps:  CTLWRDUPL (CLB)
"VIDTIM/$1I487" (AND3) expanded into these physical comps:  VIDTIM/PVSK (CLB)
"VIDTIM/CSYNC/$1I30" (AND3) expanded into these physical comps:  
     VIDTIM/CSY- (CLB), VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/CSYNC/$1I35" (AND3) expanded into these physical comps:  
     VIDTIM/CSY- (CLB), VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/CSYNC/$1I40" (AND3) expanded into these physical comps:  
     VIDTIM/CSY- (CLB), VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/CSYNC/$1I47" (OR3) expanded into these physical comps:  
     VIDTIM/CSY- (CLB), VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/HTIME/$1I115/AND1" (AND4) expanded into these physical comps:  
     VIDTIM/HTIME/$1I115/AND1 (CLB)
"VIDTIM/HTIME/$1I115/AND2" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/NHSR/2.0 (CLB)
"VIDTIM/HTIME/$1I115/NHSR" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/NHSR/2.0 (CLB), VIDTIM/NHS (CLB)
"VIDTIM/HTIME/$1I121/AND1" (AND4) expanded into these physical comps:  
     VIDTIM/HTIME/DHRR (CLB)
"VIDTIM/HTIME/$1I121/AND2" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/DHRR (CLB)
"VIDTIM/HTIME/$1I121/DHRR" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/DHRR (CLB)
"VIDTIM/HTIME/$1I13/AND1" (AND4) expanded into these physical comps:  
     VIDTIM/HTIME/$1I115/AND1 (CLB)
"VIDTIM/HTIME/$1I13/AND2" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/NHSR/2.0 (CLB)
"VIDTIM/HTIME/$1I13/VGSR" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/NHSR/2.0 (CLB), VIDTIM/NHS (CLB)
"VIDTIM/HTIME/$1I134/AND1" (AND4) expanded into these physical comps:  
     VIDTIM/HTIME/HDVS (CLB)
"VIDTIM/HTIME/$1I134/AND2" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/HDVS (CLB)
"VIDTIM/HTIME/$1I134/HDVS2" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/HDVS (CLB)
"VIDTIM/HTIME/$1I138/AND1" (AND4) expanded into these physical comps:  
     VIDTIM/HTIME/$1I138/AND1 (CLB)
"VIDTIM/HTIME/$1I138/AND2" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/HDVR/2.0 (CLB)
"VIDTIM/HTIME/$1I138/HDVR" (AND3) expanded into these physical comps:  
     VIDTIM/CHR (CLB), VIDTIM/HTIME/HDVR/2.0 (CLB)
"VIDTIM/HTIME/$1I156" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/L2HM1 (CLB)
"VIDTIM/HTIME/$1I171/AND1" (AND4) expanded into these physical comps:  
     VIDTIM/HTIME/CHRR (CLB)
"VIDTIM/HTIME/$1I171/AND2" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/CHRR (CLB)
"VIDTIM/HTIME/$1I171/CHRR2" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/CHRR (CLB)
"VIDTIM/HTIME/$1I176/AND1" (AND4) expanded into these physical comps:  
     VIDTIM/HTIME/$1I138/AND1 (CLB)
"VIDTIM/HTIME/$1I176/AND2" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/HDVR/2.0 (CLB)
"VIDTIM/HTIME/$1I176/CHRS" (AND3) expanded into these physical comps:  
     VIDTIM/CHR (CLB), VIDTIM/HTIME/HDVR/2.0 (CLB)
"VIDTIM/HTIME/$1I212" (AND4) expanded into these physical comps:  
     VIDTIM/HTIME/L2HM1 (CLB)
"VIDTIM/HTIME/$1I223" (AND5) expanded into these physical comps:  
     VIDTIM/HTIME/KEY2/4.0 (CLB), VIDTIM/HTIME/L2HM1 (CLB)
"VIDTIM/HTIME/$1I70/AND1" (AND4) expanded into these physical comps:  
     VIDTIM/HTIME/$1I70/AND1 (CLB)
"VIDTIM/HTIME/$1I70/AND2" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/KEY2/4.0 (CLB)
"VIDTIM/HTIME/$1I70/HEQR" (AND3) expanded into these physical comps:  
     VIDTIM/HEQ (CLB), VIDTIM/HTIME/KEY2/4.0 (CLB)
"VIDTIM/HTIME/$1I74/AND1" (AND4) expanded into these physical comps:  
     VIDTIM/HTIME/$1I70/AND1 (CLB)
"VIDTIM/HTIME/$1I74/AND2" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/HVSR/2.0 (CLB)
"VIDTIM/HTIME/$1I74/HVSR" (AND3) expanded into these physical comps:  
     VIDTIM/HST (CLB), VIDTIM/HTIME/HVSR/2.0 (CLB)
"VIDTIM/HTIME/$1I87/AND1" (AND4) expanded into these physical comps:  
     VIDTIM/HTIME/$1I87/AND1 (CLB)
"VIDTIM/HTIME/$1I87/AND2" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/HVSR/2.0 (CLB)
"VIDTIM/HTIME/$1I87/DHRS" (AND3) expanded into these physical comps:  
     VIDTIM/HTIME/$1I87/AND1 (CLB), VIDTIM/HTIME/HVSR/2.0 (CLB)
"VIDTIM/VTIME2/$1I197/AND1" (AND4) expanded into these physical comps:  
     VIDTIM/VTIME2/$1I197/AND1 (CLB)
"VIDTIM/VTIME2/$1I197/AND2" (AND4) expanded into these physical comps:  
     VIDTIM/VTIME2/$1I197/AND2 (CLB)
"VIDTIM/VTIME2/$1I197/AND3" (AND3) expanded into these physical comps:  
     VIDTIM/VTIME2/LASTV (CLB)
"VIDTIM/VTIME2/$1I441" (AND3) expanded into these physical comps:  
     VIDTIM/NVDR (CLB)
"VIDTIM/VTIME2/$1I457" (AND3) expanded into these physical comps:  
     VIDTIM/VTIME2/NVRS (CLB)
"VIDTIM/VTIME2/$1I533" (AND4) expanded into these physical comps:  
     VIDTIM/VTIME2/L0_63 (CLB)
"VIDTIM/VTIME2/$1I539" (AND5) expanded into these physical comps:  
     VIDTIM/VTIME2/$1I197/AND2 (CLB), VIDTIM/VTIME2/VINC (CLB)
"VIDTIM/VTIME2/$1I549" (AND5) expanded into these physical comps:  
     VIDTIM/VTIME2/LASTV (CLB), VIDTIM/VTIME2/NVRS (CLB)
"VIDTIM/VTIME2/$1I559" (AND5) expanded into these physical comps:  
     VIDTIM/VTIME2/L0_63 (CLB)
"VIDTIM/VTIME2/$1I571" (AND5) expanded into these physical comps:  
     VIDTIM/CSY- (CLB), VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
     VIDTIM/VTIME2/NVRS (CLB)
"VIDTIM/VTIME2/$1I578" (AND4) expanded into these physical comps:  
     VIDTIM/VTIME2/$1I197/AND1 (CLB)
"VIDTIM/VTIME2/$1I584" (AND3) expanded into these physical comps:  
     VIDTIM/VTIME2/$1I197/AND1 (CLB)

Section:  Signal Cross-Reference
--------------------------------

Signal "$1N527" - Driver Comp(s): VIDTIM/PRLDEN
   Load Comp(s): ADCLK, PELFIFO/$1I341
Signal "A0" covered by "A0" (IOB).
Signal "A1" covered by "A1" (IOB).
Signal "ACOD0" covered by "ACOD0" (IOB).
Signal "ACOD1" covered by "ACOD1" (IOB).
Signal "ACOD2" covered by "ACOD2" (IOB).
Signal "ACOD3" covered by "ACOD3" (IOB).
Signal "ADCLK" covered by "ADCLK" (IOB).
Signal "CASIN1-" covered by "CASIN1-" (IOB).
Signal "CASIN2-" covered by "CASIN2-" (IOB).
Signal "CPUCLK" covered by "CPUCLK" (CLKIOB).
Signal "CRN" - Driver Comp(s): CRN
   Load Comp(s): CRN, DO9/2.0, PELFIFO/RQS, VIDTIM/NVDR
Signal "CTL0" - Driver Comp(s): DBUS0
   Load Comp(s): ACOD0, DO0
Signal "CTL1" - Driver Comp(s): DBUS1
   Load Comp(s): ACOD1, DO1
Signal "CTL2" - Driver Comp(s): DBUS2
   Load Comp(s): ACOD2, DO2/2.0
Signal "CTL3" - Driver Comp(s): DBUS3
   Load Comp(s): ACOD3, DO3/2.0
Signal "CTL4" - Driver Comp(s): DBUS4
   Load Comp(s): DO4, VGA, VIDTIM/LDEND, VIDTIM/NVDR, VIDTIM/VTIME2/LX0_17
Signal "CTL5" - Driver Comp(s): DBUS5
   Load Comp(s): DO5, VIDTIM/PRLDEN, VIDTIM/VTIME2/LASTV
Signal "CTL6" - Driver Comp(s): DBUS6
   Load Comp(s): DO6/2.0, VIDTIM/IKE
Signal "CTL7" - Driver Comp(s): DBUS7
   Load Comp(s): DO7/2.0, PELFIFO/FDIS
Signal "CTL8" - Driver Comp(s): DBUS8
   Load Comp(s): DAHLD, DO8/2.0
Signal "CTL9" - Driver Comp(s): DBUS9
   Load Comp(s): DO9/2.0
Signal "CTLWR" - Driver Comp(s): DOEN-
   Load Comp(s): DBUS2, DBUS4, DBUS5, DBUS6, DBUS7, DBUS9
Signal "CTLWRDUPL" - Driver Comp(s): CTLWRDUPL
   Load Comp(s): DBUS0, DBUS1, DBUS3, DBUS8
Signal "DAHLD" covered by "DAHLD" (IOB).
Signal "DAKIN-" covered by "DAKIN-" (IOB).
Signal "DBLANK-" covered by "DBLANK-" (IOB).
Signal "DBUS0" covered by "DBUS0" (IOB).
Signal "DBUS1" covered by "DBUS1" (IOB).
Signal "DBUS10" covered by "DBUS10" (IOB).
Signal "DBUS11" covered by "DBUS11" (IOB).
Signal "DBUS12" covered by "DBUS12" (IOB).
Signal "DBUS13" covered by "DBUS13" (IOB).
Signal "DBUS14" covered by "DBUS14" (IOB).
Signal "DBUS15" covered by "DBUS15" (IOB).
Signal "DBUS16" covered by "DBUS16" (IOB).
Signal "DBUS17" covered by "DBUS17" (IOB).
Signal "DBUS18" covered by "DBUS18" (IOB).
Signal "DBUS19" covered by "DBUS19" (IOB).
Signal "DBUS2" covered by "DBUS2" (IOB).
Signal "DBUS20" covered by "DBUS20" (IOB).
Signal "DBUS21" covered by "DBUS21" (IOB).
Signal "DBUS22" covered by "DBUS22" (IOB).
Signal "DBUS23" covered by "DBUS23" (IOB).
Signal "DBUS24" covered by "DBUS24" (IOB).
Signal "DBUS25" covered by "DBUS25" (IOB).
Signal "DBUS26" covered by "DBUS26" (IOB).
Signal "DBUS27" covered by "DBUS27" (IOB).
Signal "DBUS28" covered by "DBUS28" (IOB).
Signal "DBUS29" covered by "DBUS29" (IOB).
Signal "DBUS3" covered by "DBUS3" (IOB).
Signal "DBUS30" covered by "DBUS30" (IOB).
Signal "DBUS31" covered by "DBUS31" (IOB).
Signal "DBUS4" covered by "DBUS4" (IOB).
Signal "DBUS5" covered by "DBUS5" (IOB).
Signal "DBUS6" covered by "DBUS6" (IOB).
Signal "DBUS7" covered by "DBUS7" (IOB).
Signal "DBUS8" covered by "DBUS8" (IOB).
Signal "DBUS9" covered by "DBUS9" (IOB).
Signal "DFLDO" covered by "DFLDO" (IOB).
Signal "DO0" - Driver Comp(s): DO0
   Load Comp(s): DBUS0
Signal "DO1" - Driver Comp(s): DO1
   Load Comp(s): DBUS1
Signal "DO2" - Driver Comp(s): DO2/2.0
   Load Comp(s): DBUS2
Signal "DO3" - Driver Comp(s): DO3/2.0
   Load Comp(s): DBUS3
Signal "DO4" - Driver Comp(s): DO4
   Load Comp(s): DBUS4
Signal "DO5" - Driver Comp(s): DO5
   Load Comp(s): DBUS5
Signal "DO6" - Driver Comp(s): DO6/2.0
   Load Comp(s): DBUS6
Signal "DO7" - Driver Comp(s): DO7/2.0
   Load Comp(s): DBUS7
Signal "DO8" - Driver Comp(s): DO8/2.0
   Load Comp(s): DBUS8
Signal "DO9" - Driver Comp(s): DO9/2.0
   Load Comp(s): DBUS9
Signal "DOEN-" - Driver Comp(s): DOEN-
   Load Comp(s): DBUS0, DBUS1, DBUS2, DBUS3, DBUS4, DBUS5, DBUS6, DBUS7, DBUS8, 
        DBUS9
Signal "DRQOUT-" covered by "DRQOUT-" (IOB).
Signal "DSYNC-" covered by "DSYNC-" (IOB).
Signal "FCLK" - Driver Comp(s): $1I486
   Load Comp(s): ADCLK, CASIN2-, CRN, DBLANK-, DBUS0, DBUS1, DBUS10, DBUS11, 
        DBUS12, DBUS13, DBUS14, DBUS15, DBUS16, DBUS17, DBUS18, DBUS19, DBUS2, 
        DBUS20, DBUS21, DBUS22, DBUS23, DBUS24, DBUS25, DBUS26, DBUS27, 
        DBUS28, DBUS29, DBUS3, DBUS30, DBUS31, DBUS4, DBUS5, DBUS6, DBUS7, 
        DBUS8, DBUS9, DO1, DO3/2.0, DO7/2.0, DO9/2.0, DSYNC-, HDRV-, HIRQ-, 
        HSYNC-, IFD, KEY, LDEN, PELD0, PELD1, PELD2, PELD3, PELD4, PELD5, 
        PELD6, PELD7, PELFIFO/DI10, PELFIFO/DI12, PELFIFO/DI14, PELFIFO/DI16, 
        PELFIFO/DI18, PELFIFO/DI26, PELFIFO/DI30, PELFIFO/DI8, PELFIFO/DO1, 
        PELFIFO/DO10, PELFIFO/DO13, PELFIFO/DO15, PELFIFO/DO17, PELFIFO/DO18, 
        PELFIFO/DO21, PELFIFO/DO22, PELFIFO/DO24, PELFIFO/DO26, PELFIFO/DO29, 
        PELFIFO/DO3, PELFIFO/DO31, PELFIFO/DO5, PELFIFO/DO7, PELFIFO/DO9, 
        PELFIFO/FIFO/AR0, PELFIFO/FIFO/AR2, PELFIFO/FIFO/AW0, 
        PELFIFO/FIFO/AW2, PELFIFO/FIFO/C4UD/$1N2959, PELFIFO/FIFO/CE_RD, 
        PELFIFO/FIFO/LAST, PELFIFO/FIFO/Q1, PELFIFO/FULL, PELFIFO/POP, 
        PELFIFO/POPWT, PELFIFO/RQS, VD1, VD3, VD5, VD7, VDRV-, VGCLK, 
        VIDTIM/CHR, VIDTIM/HEQ, VIDTIM/HST, VIDTIM/HTIME/$1I87/AND1, 
        VIDTIM/HTIME/HCOUNT<0>, VIDTIM/HTIME/HCOUNT<2>, 
        VIDTIM/HTIME/HCOUNT<4>, VIDTIM/HTIME/HCOUNT<6>, VIDTIM/HTIME/L2HM1, 
        VIDTIM/IKE, VIDTIM/LDEND, VIDTIM/NHS, VIDTIM/NVDR, VIDTIM/PRLDEN, 
        VIDTIM/PVSK, VIDTIM/T1, VIDTIM/VRD1, VIDTIM/VTIME2/L0_63, 
        VIDTIM/VTIME2/LASTV, VIDTIM/VTIME2/LX0_17, VIDTIM/VTIME2/VCOUNT<0>, 
        VIDTIM/VTIME2/VINC, VSCLK, VSYNC-
Signal "FMT" - Driver Comp(s): PELFIFO/FIFO/LAST
   Load Comp(s): DO4, PELFIFO/FDIS, PELFIFO/FIFO/CE_RD, PELFIFO/FIFO/LAST, 
        PELFIFO/RQS
Signal "FORN" - Driver Comp(s): PELFIFO/FULL
   Load Comp(s): DO5, PELFIFO/FULL
Signal "HDRV-" covered by "HDRV-" (IOB).
Signal "HIRQ-" covered by "HIRQ-" (IOB).
Signal "HSYNC-" covered by "HSYNC-" (IOB).
Signal "IFD" - Driver Comp(s): IFD
   Load Comp(s): DFLDO, DO1, DO9/2.0, IFD
Signal "IZE-" covered by "IZE-" (IOB).
Signal "KEY" covered by "KEY" (IOB).
Signal "LDEN" covered by "LDEN" (IOB).
Signal "PELD0" covered by "PELD0" (IOB).
Signal "PELD1" covered by "PELD1" (IOB).
Signal "PELD2" covered by "PELD2" (IOB).
Signal "PELD3" covered by "PELD3" (IOB).
Signal "PELD4" covered by "PELD4" (IOB).
Signal "PELD5" covered by "PELD5" (IOB).
Signal "PELD6" covered by "PELD6" (IOB).
Signal "PELD7" covered by "PELD7" (IOB).
Signal "PELFIFO/ADEB" - Driver Comp(s): PELFIFO/$1I341
   Load Comp(s): CRN, PELD0, PELD1, PELD2, PELD3, PELD4, PELD5, PELD6, PELD7, 
        PELFIFO/DI10, PELFIFO/DI12, PELFIFO/DI14, PELFIFO/DI16, PELFIFO/DI18, 
        PELFIFO/DI26, PELFIFO/DI30, PELFIFO/DI8, PELFIFO/DO13, PELFIFO/DO15, 
        PELFIFO/DO17, PELFIFO/DO21
Signal "PELFIFO/CAS-" - Driver Comp(s): CASIN1-
   Load Comp(s): PELFIFO/FDIS, PELFIFO/POP
Signal "PELFIFO/DAK-" - Driver Comp(s): DAKIN-
   Load Comp(s): DBUS10, DBUS11, DBUS12, DBUS13, DBUS14, DBUS15, DBUS16, DBUS17, 
        DBUS18, DBUS19, DBUS20, DBUS21, DBUS22, DBUS23, DBUS24, DBUS25, 
        DBUS26, DBUS27, DBUS28, DBUS29, DBUS30, DBUS31, DOEN-, PELFIFO/FDIS, 
        PELFIFO/POP
Signal "PELFIFO/DCAS-" - Driver Comp(s): CASIN2-
   Load Comp(s): PELFIFO/FDIS, PELFIFO/POP
Signal "PELFIFO/DI0" - Driver Comp(s): PELD0
   Load Comp(s): PELFIFO/DI8, PELFIFO/DO1
Signal "PELFIFO/DI1" - Driver Comp(s): PELD1
   Load Comp(s): PELFIFO/DI8, PELFIFO/DO1
Signal "PELFIFO/DI10" - Driver Comp(s): PELFIFO/DI10
   Load Comp(s): PELFIFO/DI18, PELFIFO/DO10
Signal "PELFIFO/DI11" - Driver Comp(s): PELFIFO/DI10
   Load Comp(s): PELFIFO/DI18, PELFIFO/DO10
Signal "PELFIFO/DI12" - Driver Comp(s): PELFIFO/DI12
   Load Comp(s): PELFIFO/DO13
Signal "PELFIFO/DI13" - Driver Comp(s): PELFIFO/DI12
   Load Comp(s): PELFIFO/DO13
Signal "PELFIFO/DI14" - Driver Comp(s): PELFIFO/DI14
   Load Comp(s): PELFIFO/DO15
Signal "PELFIFO/DI15" - Driver Comp(s): PELFIFO/DI14
   Load Comp(s): PELFIFO/DO15
Signal "PELFIFO/DI16" - Driver Comp(s): PELFIFO/DI16
   Load Comp(s): PELFIFO/DO17
Signal "PELFIFO/DI17" - Driver Comp(s): PELFIFO/DI16
   Load Comp(s): PELFIFO/DO17
Signal "PELFIFO/DI18" - Driver Comp(s): PELFIFO/DI18
   Load Comp(s): PELFIFO/DI26, PELFIFO/DO18
Signal "PELFIFO/DI19" - Driver Comp(s): PELFIFO/DI18
   Load Comp(s): PELFIFO/DI26, PELFIFO/DO18
Signal "PELFIFO/DI2" - Driver Comp(s): PELD2
   Load Comp(s): PELFIFO/DI10, PELFIFO/DO3
Signal "PELFIFO/DI20" - Driver Comp(s): PELFIFO/DO13
   Load Comp(s): PELFIFO/DO21
Signal "PELFIFO/DI21" - Driver Comp(s): PELFIFO/DO13
   Load Comp(s): PELFIFO/DO21
Signal "PELFIFO/DI22" - Driver Comp(s): PELFIFO/DO15
   Load Comp(s): PELFIFO/DI30, PELFIFO/DO22
Signal "PELFIFO/DI23" - Driver Comp(s): PELFIFO/DO15
   Load Comp(s): PELFIFO/DI30, PELFIFO/DO22
Signal "PELFIFO/DI24" - Driver Comp(s): PELFIFO/DO17
   Load Comp(s): PELFIFO/DO24
Signal "PELFIFO/DI25" - Driver Comp(s): PELFIFO/DO17
   Load Comp(s): PELFIFO/DO24
Signal "PELFIFO/DI26" - Driver Comp(s): PELFIFO/DI26
   Load Comp(s): PELFIFO/DO26
Signal "PELFIFO/DI27" - Driver Comp(s): PELFIFO/DI26
   Load Comp(s): PELFIFO/DO26
Signal "PELFIFO/DI28" - Driver Comp(s): PELFIFO/DO21
   Load Comp(s): PELFIFO/DO29
Signal "PELFIFO/DI29" - Driver Comp(s): PELFIFO/DO21
   Load Comp(s): PELFIFO/DO29
Signal "PELFIFO/DI3" - Driver Comp(s): PELD3
   Load Comp(s): PELFIFO/DI10, PELFIFO/DO3
Signal "PELFIFO/DI30" - Driver Comp(s): PELFIFO/DI30
   Load Comp(s): PELFIFO/DO31
Signal "PELFIFO/DI31" - Driver Comp(s): PELFIFO/DI30
   Load Comp(s): PELFIFO/DO31
Signal "PELFIFO/DI4" - Driver Comp(s): PELD4
   Load Comp(s): PELFIFO/DI12, PELFIFO/DO5
Signal "PELFIFO/DI5" - Driver Comp(s): PELD5
   Load Comp(s): PELFIFO/DI12, PELFIFO/DO5
Signal "PELFIFO/DI6" - Driver Comp(s): PELD6
   Load Comp(s): PELFIFO/DI14, PELFIFO/DO7
Signal "PELFIFO/DI7" - Driver Comp(s): PELD7
   Load Comp(s): PELFIFO/DI14, PELFIFO/DO7
Signal "PELFIFO/DI8" - Driver Comp(s): PELFIFO/DI8
   Load Comp(s): PELFIFO/DI16, PELFIFO/DO9
Signal "PELFIFO/DI9" - Driver Comp(s): PELFIFO/DI8
   Load Comp(s): PELFIFO/DI16, PELFIFO/DO9
Signal "PELFIFO/DO1" - Driver Comp(s): PELFIFO/DO1
   Load Comp(s): DO1
Signal "PELFIFO/DO10" - Driver Comp(s): PELFIFO/DO10
   Load Comp(s): DBUS10
Signal "PELFIFO/DO11" - Driver Comp(s): PELFIFO/DO10
   Load Comp(s): DBUS11
Signal "PELFIFO/DO12" - Driver Comp(s): PELFIFO/DO13
   Load Comp(s): DBUS12
Signal "PELFIFO/DO13" - Driver Comp(s): PELFIFO/DO13
   Load Comp(s): DBUS13
Signal "PELFIFO/DO14" - Driver Comp(s): PELFIFO/DO15
   Load Comp(s): DBUS14
Signal "PELFIFO/DO15" - Driver Comp(s): PELFIFO/DO15
   Load Comp(s): DBUS15
Signal "PELFIFO/DO16" - Driver Comp(s): PELFIFO/DO17
   Load Comp(s): DBUS16
Signal "PELFIFO/DO17" - Driver Comp(s): PELFIFO/DO17
   Load Comp(s): DBUS17
Signal "PELFIFO/DO18" - Driver Comp(s): PELFIFO/DO18
   Load Comp(s): DBUS18
Signal "PELFIFO/DO19" - Driver Comp(s): PELFIFO/DO18
   Load Comp(s): DBUS19
Signal "PELFIFO/DO20" - Driver Comp(s): PELFIFO/DO21
   Load Comp(s): DBUS20
Signal "PELFIFO/DO21" - Driver Comp(s): PELFIFO/DO21
   Load Comp(s): DBUS21
Signal "PELFIFO/DO22" - Driver Comp(s): PELFIFO/DO22
   Load Comp(s): DBUS22
Signal "PELFIFO/DO23" - Driver Comp(s): PELFIFO/DO22
   Load Comp(s): DBUS23
Signal "PELFIFO/DO24" - Driver Comp(s): PELFIFO/DO24
   Load Comp(s): DBUS24
Signal "PELFIFO/DO25" - Driver Comp(s): PELFIFO/DO24
   Load Comp(s): DBUS25
Signal "PELFIFO/DO26" - Driver Comp(s): PELFIFO/DO26
   Load Comp(s): DBUS26
Signal "PELFIFO/DO27" - Driver Comp(s): PELFIFO/DO26
   Load Comp(s): DBUS27
Signal "PELFIFO/DO28" - Driver Comp(s): PELFIFO/DO29
   Load Comp(s): DBUS28
Signal "PELFIFO/DO29" - Driver Comp(s): PELFIFO/DO29
   Load Comp(s): DBUS29
Signal "PELFIFO/DO3" - Driver Comp(s): PELFIFO/DO3
   Load Comp(s): DO3/2.0
Signal "PELFIFO/DO30" - Driver Comp(s): PELFIFO/DO31
   Load Comp(s): DBUS30
Signal "PELFIFO/DO31" - Driver Comp(s): PELFIFO/DO31
   Load Comp(s): DBUS31
Signal "PELFIFO/DO5" - Driver Comp(s): PELFIFO/DO5
   Load Comp(s): DO3/2.0
Signal "PELFIFO/DO7" - Driver Comp(s): PELFIFO/DO7
   Load Comp(s): DO7/2.0
Signal "PELFIFO/DO9" - Driver Comp(s): PELFIFO/DO9
   Load Comp(s): DO9/2.0
Signal "PELFIFO/$1I215/inv_to_obuf" - Driver Comp(s): PELFIFO/RQS
   Load Comp(s): DRQOUT-, PELFIFO/POP, PELFIFO/RQS
Signal "PELFIFO/FDIS" - Driver Comp(s): PELFIFO/FDIS
   Load Comp(s): DO9/2.0, PELFIFO/FIFO/AR0, PELFIFO/FIFO/AR2, PELFIFO/FIFO/AW0, 
        PELFIFO/FIFO/AW2, PELFIFO/FIFO/C4UD/$1N2959, PELFIFO/FIFO/CE_RD, 
        PELFIFO/FIFO/LAST, PELFIFO/FIFO/Q1, PELFIFO/FULL, PELFIFO/POP, 
        PELFIFO/POPWT
Signal "PELFIFO/FIFO/A" - Driver Comp(s): PELFIFO/FIFO/A
   Load Comp(s): PELFIFO/FIFO/LAST
Signal "PELFIFO/FIFO/A0" - Driver Comp(s): PELFIFO/FIFO/A1
   Load Comp(s): PELFIFO/DO1, PELFIFO/DO10, PELFIFO/DO13, PELFIFO/DO15, 
        PELFIFO/DO17, PELFIFO/DO18, PELFIFO/DO21, PELFIFO/DO22, PELFIFO/DO24, 
        PELFIFO/DO26, PELFIFO/DO29, PELFIFO/DO3, PELFIFO/DO31, PELFIFO/DO5, 
        PELFIFO/DO7, PELFIFO/DO9
Signal "PELFIFO/FIFO/A1" - Driver Comp(s): PELFIFO/FIFO/A1
   Load Comp(s): PELFIFO/DO1, PELFIFO/DO10, PELFIFO/DO13, PELFIFO/DO15, 
        PELFIFO/DO17, PELFIFO/DO18, PELFIFO/DO21, PELFIFO/DO22, PELFIFO/DO24, 
        PELFIFO/DO26, PELFIFO/DO29, PELFIFO/DO3, PELFIFO/DO31, PELFIFO/DO5, 
        PELFIFO/DO7, PELFIFO/DO9
Signal "PELFIFO/FIFO/A2" - Driver Comp(s): PELFIFO/FIFO/A3
   Load Comp(s): PELFIFO/DO1, PELFIFO/DO10, PELFIFO/DO13, PELFIFO/DO15, 
        PELFIFO/DO17, PELFIFO/DO18, PELFIFO/DO21, PELFIFO/DO22, PELFIFO/DO24, 
        PELFIFO/DO26, PELFIFO/DO29, PELFIFO/DO3, PELFIFO/DO31, PELFIFO/DO5, 
        PELFIFO/DO7, PELFIFO/DO9
Signal "PELFIFO/FIFO/A3" - Driver Comp(s): PELFIFO/FIFO/A3
   Load Comp(s): PELFIFO/DO1, PELFIFO/DO10, PELFIFO/DO13, PELFIFO/DO15, 
        PELFIFO/DO17, PELFIFO/DO18, PELFIFO/DO21, PELFIFO/DO22, PELFIFO/DO24, 
        PELFIFO/DO26, PELFIFO/DO29, PELFIFO/DO3, PELFIFO/DO31, PELFIFO/DO5, 
        PELFIFO/DO7, PELFIFO/DO9
Signal "PELFIFO/FIFO/AR0" - Driver Comp(s): PELFIFO/FIFO/AR0
   Load Comp(s): PELFIFO/FIFO/A1, PELFIFO/FIFO/AR0, PELFIFO/FIFO/AR2
Signal "PELFIFO/FIFO/AR1" - Driver Comp(s): PELFIFO/FIFO/AR0
   Load Comp(s): PELFIFO/FIFO/A1, PELFIFO/FIFO/AR0, PELFIFO/FIFO/AR2
Signal "PELFIFO/FIFO/AR2" - Driver Comp(s): PELFIFO/FIFO/AR2
   Load Comp(s): PELFIFO/FIFO/A3, PELFIFO/FIFO/AR2
Signal "PELFIFO/FIFO/AR3" - Driver Comp(s): PELFIFO/FIFO/AR2
   Load Comp(s): PELFIFO/FIFO/A3, PELFIFO/FIFO/AR2
Signal "PELFIFO/FIFO/AW0" - Driver Comp(s): PELFIFO/FIFO/AW0
   Load Comp(s): PELFIFO/FIFO/A1, PELFIFO/FIFO/AW0, PELFIFO/FIFO/AW2
Signal "PELFIFO/FIFO/AW1" - Driver Comp(s): PELFIFO/FIFO/AW0
   Load Comp(s): PELFIFO/FIFO/A1, PELFIFO/FIFO/AW0, PELFIFO/FIFO/AW2
Signal "PELFIFO/FIFO/AW2" - Driver Comp(s): PELFIFO/FIFO/AW2
   Load Comp(s): PELFIFO/FIFO/A3, PELFIFO/FIFO/AW2
Signal "PELFIFO/FIFO/AW3" - Driver Comp(s): PELFIFO/FIFO/AW2
   Load Comp(s): PELFIFO/FIFO/A3, PELFIFO/FIFO/AW2
Signal "PELFIFO/FIFO/C" - Driver Comp(s): PELFIFO/FIFO/A
   Load Comp(s): PELFIFO/FIFO/LAST
Signal "PELFIFO/FIFO/C4UD/$1N2959" - Driver Comp(s): PELFIFO/FIFO/C4UD/$1N2959
   Load Comp(s): PELFIFO/FIFO/CE_RD
Signal "PELFIFO/FIFO/C4UD/D0" - Driver Comp(s): PELFIFO/FIFO/CE_WR
   Load Comp(s): PELFIFO/FIFO/Q1
Signal "PELFIFO/FIFO/C4UD/F" - Driver Comp(s): PELFIFO/FIFO/C4UD/F
   Load Comp(s): PELFIFO/FIFO/CE_RD
Signal "PELFIFO/FIFO/CE_RD" - Driver Comp(s): PELFIFO/FIFO/CE_RD
   Load Comp(s): PELFIFO/FIFO/AR0, PELFIFO/FIFO/AR2, PELFIFO/FIFO/C4UD/$1N2959, 
        PELFIFO/FIFO/CE_WR, PELFIFO/FIFO/LAST, PELFIFO/FIFO/Q1, PELFIFO/FULL
Signal "PELFIFO/FIFO/CE_WR" - Driver Comp(s): PELFIFO/FIFO/CE_WR
   Load Comp(s): PELFIFO/DO1, PELFIFO/DO10, PELFIFO/DO13, PELFIFO/DO15, 
        PELFIFO/DO17, PELFIFO/DO18, PELFIFO/DO21, PELFIFO/DO22, PELFIFO/DO24, 
        PELFIFO/DO26, PELFIFO/DO29, PELFIFO/DO3, PELFIFO/DO31, PELFIFO/DO5, 
        PELFIFO/DO7, PELFIFO/DO9, PELFIFO/FIFO/AW0, PELFIFO/FIFO/AW2, 
        PELFIFO/FIFO/C4UD/$1N2959, PELFIFO/FIFO/C4UD/F, PELFIFO/FIFO/CE_RD, 
        PELFIFO/FIFO/LAST, PELFIFO/FIFO/Q1, PELFIFO/FULL
Signal "PELFIFO/FIFO/LAST" - Driver Comp(s): PELFIFO/FIFO/LAST
   Load Comp(s): PELFIFO/FIFO/LAST, PELFIFO/FULL
Signal "PELFIFO/FIFO/Q0" - Driver Comp(s): PELFIFO/FIFO/Q1
   Load Comp(s): PELFIFO/FIFO/A, PELFIFO/FIFO/C4UD/$1N2959, PELFIFO/FIFO/C4UD/F, 
        PELFIFO/FIFO/CE_WR, PELFIFO/FIFO/Q1
Signal "PELFIFO/FIFO/Q1" - Driver Comp(s): PELFIFO/FIFO/Q1
   Load Comp(s): PELFIFO/FIFO/A, PELFIFO/FIFO/C4UD/$1N2959, PELFIFO/FIFO/C4UD/F, 
        PELFIFO/FIFO/Q1
Signal "PELFIFO/FIFO/Q2" - Driver Comp(s): PELFIFO/FIFO/C4UD/$1N2959
   Load Comp(s): PELFIFO/FIFO/A, PELFIFO/FIFO/C4UD/$1N2959, PELFIFO/FIFO/C4UD/F, 
        PELFIFO/RQS
Signal "PELFIFO/FIFO/Q3" - Driver Comp(s): PELFIFO/FIFO/CE_RD
   Load Comp(s): PELFIFO/FIFO/A, PELFIFO/FIFO/C4UD/F, PELFIFO/FIFO/CE_RD, 
        PELFIFO/RQS
Signal "PELFIFO/FULL" - Driver Comp(s): PELFIFO/FULL
   Load Comp(s): PELFIFO/FIFO/CE_WR, PELFIFO/FULL, PELFIFO/RQS
Signal "PELFIFO/GE4" covered by "PELFIFO/RQS" (CLB).
Signal "PELFIFO/PELASM1" - Driver Comp(s): CRN
   Load Comp(s): CRN, PELFIFO/POPWT
Signal "PELFIFO/PELASM2" - Driver Comp(s): CRN
   Load Comp(s): CRN, PELFIFO/POPWT
Signal "PELFIFO/POP" - Driver Comp(s): PELFIFO/POP
   Load Comp(s): DBUS10, DBUS11, DBUS12, DBUS13, DBUS14, DBUS15, DBUS16, DBUS17, 
        DBUS18, DBUS19, DBUS20, DBUS21, DBUS22, DBUS23, DBUS24, DBUS25, 
        DBUS26, DBUS27, DBUS28, DBUS29, DBUS30, DBUS31, DO1, DO3/2.0, DO7/2.0, 
        DO9/2.0, PELFIFO/DO1, PELFIFO/DO3, PELFIFO/DO5, PELFIFO/DO7, 
        PELFIFO/DO9, PELFIFO/FIFO/CE_RD, PELFIFO/POPWT
Signal "PELFIFO/POPWT" covered by "PELFIFO/POPWT" (CLB).
Signal "PELFIFO/PUSH" - Driver Comp(s): PELFIFO/POPWT
   Load Comp(s): PELFIFO/FIFO/A1, PELFIFO/FIFO/A3, PELFIFO/FIFO/CE_WR, 
        PELFIFO/FULL
Signal "PELFIFO/RQCL" - Driver Comp(s): PELFIFO/FDIS
   Load Comp(s): PELFIFO/RQS
Signal "PELFIFO/RQS" - Driver Comp(s): PELFIFO/RQS
   Load Comp(s): PELFIFO/POP
Signal "PELFIFO/RUND" - Driver Comp(s): DO9/2.0
   Load Comp(s): PELFIFO/RQS
Signal "PELQ0" - Driver Comp(s): PELFIFO/DO1
   Load Comp(s): DO0
Signal "PELQ1" covered by "DO1" (CLB).
Signal "PELQ2" - Driver Comp(s): PELFIFO/DO3
   Load Comp(s): DO2/2.0
Signal "PELQ3" covered by "DO3/2.0" (CLB).
Signal "PELQ4" - Driver Comp(s): PELFIFO/DO5
   Load Comp(s): DO4
Signal "PELQ5" - Driver Comp(s): DO3/2.0
   Load Comp(s): DO5
Signal "PELQ6" - Driver Comp(s): PELFIFO/DO7
   Load Comp(s): DO6/2.0
Signal "PELQ7" covered by "DO7/2.0" (CLB).
Signal "PELQ8" - Driver Comp(s): PELFIFO/DO9
   Load Comp(s): DO8/2.0
Signal "PELQ9" covered by "DO9/2.0" (CLB).
Signal "REGSA/A0I" - Driver Comp(s): A0
   Load Comp(s): CTLWRDUPL, DOEN-
Signal "REGSA/A1I" - Driver Comp(s): A1
   Load Comp(s): CTLWRDUPL, DOEN-, RS1
Signal "REGSA/NSTBI" - Driver Comp(s): STRB-
   Load Comp(s): CTLWRDUPL, DOEN-, RS1
Signal "REGSA/NWRI" - Driver Comp(s): WR-
   Load Comp(s): CTLWRDUPL, DOEN-
Signal "RS0" - Driver Comp(s): CTLWRDUPL
   Load Comp(s): DO0, DO1, DO2/2.0, DO3/2.0, DO4, DO5, DO6/2.0, DO7/2.0, 
        DO8/2.0, DO9/2.0
Signal "RS1" - Driver Comp(s): RS1
   Load Comp(s): DO0, DO1, DO2/2.0, DO3/2.0, DO4, DO5, DO6/2.0, DO7/2.0, 
        DO8/2.0, DO9/2.0, VIDTIM/VTIME2/LX0_17
Signal "RST-" covered by "RST-" (IOB).
Signal "RSTI-" - Driver Comp(s): RST-
   Load Comp(s): $1I540
Signal "STRB-" covered by "STRB-" (IOB).
Signal "VD0" - Driver Comp(s): VIDTIM/VTIME2/VCOUNT<0>
   Load Comp(s): DO0, VIDTIM/VTIME2/$1I197/AND1, VIDTIM/VTIME2/$1I197/AND2, 
        VIDTIM/VTIME2/L0_63, VIDTIM/VTIME2/LASTV, VIDTIM/VTIME2/LX0_17, 
        VIDTIM/VTIME2/VCOUNT<0>
Signal "VD1" - Driver Comp(s): VD1
   Load Comp(s): DO1, VD1, VIDTIM/VTIME2/$1I197/AND1, VIDTIM/VTIME2/L0_63, 
        VIDTIM/VTIME2/LX0_17, VIDTIM/VTIME2/NVRS, VIDTIM/VTIME2/VINC
Signal "VD2" - Driver Comp(s): VD1
   Load Comp(s): DO2/2.0, VD1, VIDTIM/VTIME2/$1I197/AND1, 
        VIDTIM/VTIME2/$1I197/AND2, VIDTIM/VTIME2/L0_63, VIDTIM/VTIME2/LASTV, 
        VIDTIM/VTIME2/NVRS
Signal "VD3" - Driver Comp(s): VD3
   Load Comp(s): DO3/2.0, VD3, VIDTIM/VTIME2/$1I197/AND1, VIDTIM/VTIME2/L0_63, 
        VIDTIM/VTIME2/LASTV, VIDTIM/VTIME2/LX0_17
Signal "VD4" - Driver Comp(s): VD3
   Load Comp(s): DO4, VD3, VIDTIM/VTIME2/L0_63, VIDTIM/VTIME2/LASTV, 
        VIDTIM/VTIME2/LX0_17
Signal "VD5" - Driver Comp(s): VD5
   Load Comp(s): DO5, VD5, VIDTIM/VTIME2/$1I197/AND2, VIDTIM/VTIME2/L0_63
Signal "VD6" - Driver Comp(s): VD5
   Load Comp(s): DO6/2.0, VD5, VIDTIM/VTIME2/$1I197/AND2, VIDTIM/VTIME2/L0_63
Signal "VD7" - Driver Comp(s): VD7
   Load Comp(s): DO7/2.0, VD7, VIDTIM/VTIME2/$1I197/AND2, VIDTIM/VTIME2/L0_63
Signal "VD8" - Driver Comp(s): VD7
   Load Comp(s): DO8/2.0, VD7, VIDTIM/VTIME2/$1I197/AND2, VIDTIM/VTIME2/L0_63
Signal "VDRV-" covered by "VDRV-" (IOB).
Signal "VGA" covered by "VGA" (IOB).
Signal "VGCLK" covered by "VGCLK" (IOB).
Signal "VIDTIM/CHR" - Driver Comp(s): VIDTIM/CHR
   Load Comp(s): CRN, VIDTIM/CHR
Signal "VIDTIM/CSY-" - Driver Comp(s): VIDTIM/VTIME2/LX0_17
   Load Comp(s): DSYNC-, HSYNC-
Signal "VIDTIM/CSYNC/M2" covered by "VIDTIM/VTIME2/LX0_17" (GROUP).
Signal "VIDTIM/CVR" - Driver Comp(s): VIDTIM/PVSK
   Load Comp(s): CRN, VIDTIM/PVSK
Signal "VIDTIM/DHR" - Driver Comp(s): VIDTIM/HTIME/$1I87/AND1
   Load Comp(s): VIDTIM/HTIME/$1I87/AND1, VIDTIM/NVDR, VIDTIM/VRD1
Signal "VIDTIM/DR2" - Driver Comp(s): VIDTIM/NVDR
   Load Comp(s): PELFIFO/RQS, VIDTIM/PIRQ-
Signal "VIDTIM/DR3" - Driver Comp(s): PELFIFO/RQS
   Load Comp(s): VIDTIM/PIRQ-
Signal "VIDTIM/DRN" - Driver Comp(s): VIDTIM/NVDR
   Load Comp(s): PELFIFO/FIFO/CE_RD, VIDTIM/IKE, VIDTIM/PVSK
Signal "VIDTIM/DVR" - Driver Comp(s): VIDTIM/VTIME2/VINC
   Load Comp(s): VIDTIM/NVDR, VIDTIM/PVSK, VIDTIM/VTIME2/VINC
Signal "VIDTIM/HDRV" - Driver Comp(s): VIDTIM/CHR
   Load Comp(s): HDRV-, VIDTIM/CHR
Signal "VIDTIM/HEQ" - Driver Comp(s): VIDTIM/HEQ
   Load Comp(s): VIDTIM/HEQ, VIDTIM/VTIME2/LX0_17
Signal "VIDTIM/HLN" - Driver Comp(s): VIDTIM/HEQ
   Load Comp(s): IFD, VIDTIM/HEQ, VIDTIM/HST, VIDTIM/HTIME/CHRR, 
        VIDTIM/HTIME/HDVS, VIDTIM/HTIME/L2HM1
Signal "VIDTIM/HST" - Driver Comp(s): VIDTIM/HST
   Load Comp(s): VIDTIM/NHS, VIDTIM/PVSK
Signal "VIDTIM/HTIME/$1I115/AND1" - Driver Comp(s): VIDTIM/HTIME/$1I115/AND1
   Load Comp(s): VIDTIM/NHS
Signal "VIDTIM/HTIME/$1I13/AND1" - Driver Comp(s): VIDTIM/HTIME/$1I115/AND1
   Load Comp(s): VIDTIM/NHS
Signal "VIDTIM/HTIME/$1I138/AND1" - Driver Comp(s): VIDTIM/HTIME/$1I138/AND1
   Load Comp(s): VIDTIM/CHR
Signal "VIDTIM/HTIME/$1I176/AND1" - Driver Comp(s): VIDTIM/HTIME/$1I138/AND1
   Load Comp(s): VIDTIM/CHR
Signal "VIDTIM/HTIME/$1I70/AND1" - Driver Comp(s): VIDTIM/HTIME/$1I70/AND1
   Load Comp(s): VIDTIM/HEQ
Signal "VIDTIM/HTIME/$1I74/AND1" - Driver Comp(s): VIDTIM/HTIME/$1I70/AND1
   Load Comp(s): VIDTIM/HST
Signal "VIDTIM/HTIME/$1I87/AND1" covered by "VIDTIM/HTIME/$1I87/AND1" (CLB).
Signal "VIDTIM/HTIME/CHRR" - Driver Comp(s): VIDTIM/HTIME/CHRR
   Load Comp(s): VIDTIM/CHR
Signal "VIDTIM/HTIME/DHRR" - Driver Comp(s): VIDTIM/HTIME/DHRR
   Load Comp(s): VIDTIM/HTIME/$1I87/AND1
Signal "VIDTIM/HTIME/HCNT_1/CO_2" - Driver Comp(s): VIDTIM/HTIME/HCOUNT<0>
   Load Comp(s): VIDTIM/HTIME/HCOUNT<2>
Signal "VIDTIM/HTIME/HCNT_1/CO_4" - Driver Comp(s): VIDTIM/HTIME/HCOUNT<2>
   Load Comp(s): VIDTIM/HTIME/HCOUNT<4>
Signal "VIDTIM/HTIME/HCNT_1/CO_6" - Driver Comp(s): VIDTIM/HTIME/HCOUNT<4>
   Load Comp(s): VIDTIM/HTIME/HCOUNT<6>
Signal "VIDTIM/HTIME/HCOUNT<0>" - Driver Comp(s): VIDTIM/HTIME/HCOUNT<0>
   Load Comp(s): VIDTIM/HTIME/$1I115/AND1, VIDTIM/HTIME/$1I138/AND1, 
        VIDTIM/HTIME/$1I70/AND1, VIDTIM/HTIME/$1I87/AND1, VIDTIM/HTIME/CHRR, 
        VIDTIM/HTIME/DHRR, VIDTIM/HTIME/HCOUNT<0>, VIDTIM/HTIME/HDVS, 
        VIDTIM/HTIME/L2HM1
Signal "VIDTIM/HTIME/HCOUNT<1>" - Driver Comp(s): VIDTIM/HTIME/HCOUNT<0>
   Load Comp(s): VIDTIM/HTIME/$1I115/AND1, VIDTIM/HTIME/$1I138/AND1, 
        VIDTIM/HTIME/$1I70/AND1, VIDTIM/HTIME/$1I87/AND1, VIDTIM/HTIME/CHRR, 
        VIDTIM/HTIME/DHRR, VIDTIM/HTIME/HCOUNT<0>, VIDTIM/HTIME/HDVS, 
        VIDTIM/HTIME/L2HM1
Signal "VIDTIM/HTIME/HCOUNT<2>" - Driver Comp(s): VIDTIM/HTIME/HCOUNT<2>
   Load Comp(s): VIDTIM/HTIME/$1I115/AND1, VIDTIM/HTIME/$1I138/AND1, 
        VIDTIM/HTIME/$1I70/AND1, VIDTIM/HTIME/$1I87/AND1, VIDTIM/HTIME/CHRR, 
        VIDTIM/HTIME/DHRR, VIDTIM/HTIME/HCOUNT<2>, VIDTIM/HTIME/HDVS, 
        VIDTIM/HTIME/L2HM1
Signal "VIDTIM/HTIME/HCOUNT<3>" - Driver Comp(s): VIDTIM/HTIME/HCOUNT<2>
   Load Comp(s): VIDTIM/HTIME/$1I115/AND1, VIDTIM/HTIME/$1I138/AND1, 
        VIDTIM/HTIME/$1I70/AND1, VIDTIM/HTIME/$1I87/AND1, VIDTIM/HTIME/CHRR, 
        VIDTIM/HTIME/DHRR, VIDTIM/HTIME/HCOUNT<2>, VIDTIM/HTIME/HDVS, 
        VIDTIM/HTIME/KEY2/4.0
Signal "VIDTIM/HTIME/HCOUNT<4>" - Driver Comp(s): VIDTIM/HTIME/HCOUNT<4>
   Load Comp(s): VIDTIM/HTIME/CHRR, VIDTIM/HTIME/DHRR, VIDTIM/HTIME/HCOUNT<4>, 
        VIDTIM/HTIME/HDVR/2.0, VIDTIM/HTIME/HDVS, VIDTIM/HTIME/HVSR/2.0, 
        VIDTIM/HTIME/KEY2/4.0, VIDTIM/HTIME/NHSR/2.0
Signal "VIDTIM/HTIME/HCOUNT<5>" - Driver Comp(s): VIDTIM/HTIME/HCOUNT<4>
   Load Comp(s): VIDTIM/HTIME/CHRR, VIDTIM/HTIME/DHRR, VIDTIM/HTIME/HCOUNT<4>, 
        VIDTIM/HTIME/HDVR/2.0, VIDTIM/HTIME/HDVS, VIDTIM/HTIME/HVSR/2.0, 
        VIDTIM/HTIME/KEY2/4.0, VIDTIM/HTIME/NHSR/2.0
Signal "VIDTIM/HTIME/HCOUNT<6>" - Driver Comp(s): VIDTIM/HTIME/HCOUNT<6>
   Load Comp(s): VIDTIM/HTIME/CHRR, VIDTIM/HTIME/DHRR, VIDTIM/HTIME/HCOUNT<6>, 
        VIDTIM/HTIME/HDVR/2.0, VIDTIM/HTIME/HDVS, VIDTIM/HTIME/HVSR/2.0, 
        VIDTIM/HTIME/KEY2/4.0, VIDTIM/HTIME/L2HM1, VIDTIM/HTIME/NHSR/2.0
Signal "VIDTIM/HTIME/HCOUNT<7>" - Driver Comp(s): VIDTIM/HTIME/HCOUNT<6>
   Load Comp(s): VIDTIM/HTIME/CHRR, VIDTIM/HTIME/DHRR, VIDTIM/HTIME/HCOUNT<6>, 
        VIDTIM/HTIME/HDVR/2.0, VIDTIM/HTIME/HDVS, VIDTIM/HTIME/HVSR/2.0, 
        VIDTIM/HTIME/KEY2/4.0, VIDTIM/HTIME/L2HM1, VIDTIM/HTIME/NHSR/2.0
Signal "VIDTIM/HTIME/HDVS" - Driver Comp(s): VIDTIM/HTIME/HDVS
   Load Comp(s): VIDTIM/CHR
Signal "VIDTIM/HTIME/L2HM1" - Driver Comp(s): VIDTIM/HTIME/L2HM1
   Load Comp(s): VIDTIM/HST
Signal "VIDTIM/HVD" - Driver Comp(s): VIDTIM/HST
   Load Comp(s): VIDTIM/HST, VIDTIM/VTIME2/LX0_17
Signal "VIDTIM/HX2" - Driver Comp(s): VIDTIM/HTIME/L2HM1
   Load Comp(s): VIDTIM/HEQ, VIDTIM/HST, VIDTIM/HTIME/HCOUNT<0>, 
        VIDTIM/HTIME/HCOUNT<2>, VIDTIM/HTIME/HCOUNT<4>, 
        VIDTIM/HTIME/HCOUNT<6>, VIDTIM/NHS, VIDTIM/VTIME2/VINC
Signal "VIDTIM/IKE" - Driver Comp(s): VIDTIM/IKE
   Load Comp(s): VIDTIM/IKE, VIDTIM/PVSK
Signal "VIDTIM/LDEE-" covered by "VIDTIM/LDEND" (CLB).
Signal "VIDTIM/LDEND" - Driver Comp(s): VIDTIM/LDEND
   Load Comp(s): LDEN
Signal "VIDTIM/NDRV" - Driver Comp(s): VIDTIM/VTIME2/LX0_17
   Load Comp(s): VDRV-
Signal "VIDTIM/NHS" - Driver Comp(s): VIDTIM/NHS
   Load Comp(s): VIDTIM/NHS, VIDTIM/VTIME2/LX0_17
Signal "VIDTIM/NVDR" - Driver Comp(s): VIDTIM/NVDR
   Load Comp(s): VIDTIM/VTIME2/LX0_17
Signal "VIDTIM/PBL" - Driver Comp(s): PELFIFO/FIFO/CE_RD
   Load Comp(s): DBLANK-
Signal "VIDTIM/PIRQ-" - Driver Comp(s): VIDTIM/PIRQ-
   Load Comp(s): HIRQ-
Signal "VIDTIM/PKEY" - Driver Comp(s): VIDTIM/HTIME/L2HM1
   Load Comp(s): KEY
Signal "VIDTIM/PRELD" - Driver Comp(s): VIDTIM/PRLDEN
   Load Comp(s): VIDTIM/$1I566, VIDTIM/PRLDEN
Signal "VIDTIM/PRLDEN" - Driver Comp(s): VIDTIM/PRLDEN
   Load Comp(s): VIDTIM/LDEND
Signal "VIDTIM/PVGK" - Driver Comp(s): VIDTIM/IKE
   Load Comp(s): VGCLK
Signal "VIDTIM/PVSK" - Driver Comp(s): VIDTIM/PVSK
   Load Comp(s): VSCLK
Signal "VIDTIM/T1" - Driver Comp(s): VIDTIM/T1
   Load Comp(s): VIDTIM/PRLDEN, VIDTIM/T1
Signal "VIDTIM/T2" - Driver Comp(s): VIDTIM/T1
   Load Comp(s): VIDTIM/PRLDEN, VIDTIM/T1
Signal "VIDTIM/VCEN" - Driver Comp(s): VIDTIM/$1I566
   Load Comp(s): PELFIFO/RQS, VIDTIM/CHR, VIDTIM/HEQ, VIDTIM/HST, 
        VIDTIM/HTIME/$1I87/AND1, VIDTIM/HTIME/HCOUNT<0>, 
        VIDTIM/HTIME/HCOUNT<2>, VIDTIM/HTIME/HCOUNT<4>, 
        VIDTIM/HTIME/HCOUNT<6>, VIDTIM/HTIME/L2HM1, VIDTIM/LDEND, VIDTIM/NHS, 
        VIDTIM/NVDR, VIDTIM/VRD1, VIDTIM/VTIME2/VINC
Signal "VIDTIM/VHS" - Driver Comp(s): VIDTIM/NHS
   Load Comp(s): VIDTIM/NHS, VIDTIM/VTIME2/LX0_17
Signal "VIDTIM/VKE" - Driver Comp(s): VIDTIM/LDEND
   Load Comp(s): PELFIFO/FIFO/CE_RD, VIDTIM/IKE, VIDTIM/PVSK
Signal "VIDTIM/VRD1" - Driver Comp(s): VIDTIM/VRD1
   Load Comp(s): VIDTIM/LDEND, VIDTIM/VRD1
Signal "VIDTIM/VRD2" - Driver Comp(s): VIDTIM/VRD1
   Load Comp(s): VIDTIM/LDEND
Signal "VIDTIM/VSYN" - Driver Comp(s): VIDTIM/VTIME2/L0_63
   Load Comp(s): VSYNC-
Signal "VIDTIM/VTIME2/$1I197/AND1" - Driver Comp(s): VIDTIM/VTIME2/$1I197/AND1
   Load Comp(s): VIDTIM/VTIME2/LASTV
Signal "VIDTIM/VTIME2/$1I197/AND2" - Driver Comp(s): VIDTIM/VTIME2/$1I197/AND2
   Load Comp(s): VIDTIM/VTIME2/LASTV
Signal "VIDTIM/VTIME2/L0_63" - Driver Comp(s): VIDTIM/VTIME2/L0_63
   Load Comp(s): VIDTIM/NVDR, VIDTIM/VTIME2/LX0_17, VIDTIM/VTIME2/NVRS
Signal "VIDTIM/VTIME2/LASTV" - Driver Comp(s): VIDTIM/VTIME2/LASTV
   Load Comp(s): IFD, VD1, VD3, VD5, VD7, VIDTIM/VTIME2/LX0_17, 
        VIDTIM/VTIME2/VCOUNT<0>
Signal "VIDTIM/VTIME2/LX0_17" - Driver Comp(s): VIDTIM/VTIME2/LX0_17
   Load Comp(s): VIDTIM/NVDR
Signal "VIDTIM/VTIME2/LX6_11" - Driver Comp(s): VIDTIM/VTIME2/$1I197/AND1
   Load Comp(s): VIDTIM/NVDR
Signal "VIDTIM/VTIME2/MAXHI" covered by "VIDTIM/VTIME2/LASTV" (CLB).
Signal "VIDTIM/VTIME2/NVRS" - Driver Comp(s): VIDTIM/VTIME2/NVRS
   Load Comp(s): VIDTIM/VTIME2/VINC
Signal "VIDTIM/VTIME2/VCNT_1/CO_2" - Driver Comp(s): VIDTIM/VTIME2/VCOUNT<0>
   Load Comp(s): VD1
Signal "VIDTIM/VTIME2/VCNT_1/CO_4" - Driver Comp(s): VD1
   Load Comp(s): VD3
Signal "VIDTIM/VTIME2/VCNT_1/CO_6" - Driver Comp(s): VD3
   Load Comp(s): VD5
Signal "VIDTIM/VTIME2/VCNT_1/CO_8" - Driver Comp(s): VD5
   Load Comp(s): VD7
Signal "VIDTIM/VTIME2/VCOUNT<0>" - Driver Comp(s): VIDTIM/VTIME2/VCOUNT<0>
   Load Comp(s): VIDTIM/VTIME2/$1I197/AND2, VIDTIM/VTIME2/LASTV, 
        VIDTIM/VTIME2/NVRS, VIDTIM/VTIME2/VCOUNT<0>
Signal "VIDTIM/VTIME2/VINC" - Driver Comp(s): VIDTIM/VTIME2/VINC
   Load Comp(s): IFD, VD1, VD3, VD5, VD7, VIDTIM/PVSK, VIDTIM/VTIME2/L0_63, 
        VIDTIM/VTIME2/LASTV, VIDTIM/VTIME2/LX0_17, VIDTIM/VTIME2/VCOUNT<0>, 
        VIDTIM/VTIME2/VINC
Signal "VSCLK" covered by "VSCLK" (IOB).
Signal "VSYNC-" covered by "VSYNC-" (IOB).
Signal "WR-" covered by "WR-" (IOB).

Section:  Symbol Cross-reference
--------------------------------

"$1I143/$1I30" (OBUFT) mapped to:  DBUS0 (IOB)
"$1I143/$1I31" (OBUFT) mapped to:  DBUS1 (IOB)
"$1I143/$1I32" (OBUFT) mapped to:  DBUS2 (IOB)
"$1I143/$1I33" (OBUFT) mapped to:  DBUS3 (IOB)
"$1I143/$1I34" (OBUFT) mapped to:  DBUS7 (IOB)
"$1I143/$1I35" (OBUFT) mapped to:  DBUS6 (IOB)
"$1I143/$1I36" (OBUFT) mapped to:  DBUS5 (IOB)
"$1I143/$1I37" (OBUFT) mapped to:  DBUS4 (IOB)
"$1I143/$1I50" (OBUFT) mapped to:  DBUS8 (IOB)
"$1I143/$1I53" (OBUFT) mapped to:  DBUS9 (IOB)
"$1I170" (NOR2) mapped to:  DOEN- (CLB)
"$1I253" (OBUF) mapped to:  DFLDO (IOB)
"$1I437" (OBUF) mapped to:  VGA (IOB)
"$1I472" (OBUF) mapped to:  DAHLD (IOB)
"$1I477" (OBUF) mapped to:  ACOD3 (IOB)
"$1I478" (OBUF) mapped to:  ACOD2 (IOB)
"$1I479" (OBUF) mapped to:  ACOD1 (IOB)
"$1I480" (OBUF) mapped to:  ACOD0 (IOB)
"$1I486" (BUFGP) mapped to:  $1I486 (PRI-CLK), CPUCLK (CLKIOB)
"$1I493/$1I30" (AND3) mapped to:  DO9/2.0 (CLB)
"$1I493/$1I35" (AND3) mapped to:  DO9/2.0 (CLB)
"$1I493/$1I40" (AND2) mapped to:  DO9/2.0 (CLB)
"$1I493/$1I47" (NOR4) mapped to:  DO9/2.0 (CLB)
"$1I493/$1I55" (AND3) mapped to:  DO9/2.0 (CLB)
"$1I494/$1I30" (AND3) mapped to:  DO8/2.0 (CLB)
"$1I494/$1I35" (AND3) mapped to:  DO8/2.0 (CLB)
"$1I494/$1I40" (AND2) mapped to:  DO8/2.0 (CLB)
"$1I494/$1I47" (NOR4) mapped to:  DO8/2.0 (CLB)
"$1I494/$1I55" (AND3) mapped to:  DO8/2.0 (CLB)
"$1I495/$1I30" (AND3) mapped to:  DO7/2.0 (CLB)
"$1I495/$1I35" (AND3) mapped to:  DO7/2.0 (CLB)
"$1I495/$1I40" (AND2) mapped to:  DO7/2.0 (CLB)
"$1I495/$1I47" (NOR4) mapped to:  DO7/2.0 (CLB)
"$1I495/$1I55" (AND3) mapped to:  DO7/2.0 (CLB)
"$1I496/$1I30" (AND3) mapped to:  DO6/2.0 (CLB)
"$1I496/$1I35" (AND3) mapped to:  DO6/2.0 (CLB)
"$1I496/$1I40" (AND2) mapped to:  DO6/2.0 (CLB)
"$1I496/$1I47" (NOR4) mapped to:  DO6/2.0 (CLB)
"$1I496/$1I55" (AND3) mapped to:  DO6/2.0 (CLB)
"$1I497/$1I30" (AND3) mapped to:  DO5 (CLB)
"$1I497/$1I35" (AND3) mapped to:  DO5 (CLB)
"$1I497/$1I40" (AND3) mapped to:  DO5 (CLB)
"$1I497/$1I47" (NOR4) mapped to:  DO5 (CLB)
"$1I497/$1I55" (AND3) mapped to:  DO5 (CLB)
"$1I498/$1I30" (AND3) mapped to:  DO4 (CLB)
"$1I498/$1I35" (AND3) mapped to:  DO4 (CLB)
"$1I498/$1I40" (AND3) mapped to:  DO4 (CLB)
"$1I498/$1I47" (NOR4) mapped to:  DO4 (CLB)
"$1I498/$1I55" (AND3) mapped to:  DO4 (CLB)
"$1I499/$1I30" (AND3) mapped to:  DO3/2.0 (CLB)
"$1I499/$1I35" (AND3) mapped to:  DO3/2.0 (CLB)
"$1I499/$1I40" (AND2) mapped to:  DO3/2.0 (CLB)
"$1I499/$1I47" (NOR4) mapped to:  DO3/2.0 (CLB)
"$1I499/$1I55" (AND3) mapped to:  DO3/2.0 (CLB)
"$1I500/$1I30" (AND3) mapped to:  DO2/2.0 (CLB)
"$1I500/$1I35" (AND3) mapped to:  DO2/2.0 (CLB)
"$1I500/$1I40" (AND2) mapped to:  DO2/2.0 (CLB)
"$1I500/$1I47" (NOR4) mapped to:  DO2/2.0 (CLB)
"$1I500/$1I55" (AND3) mapped to:  DO2/2.0 (CLB)
"$1I501/$1I30" (AND3) mapped to:  DO1 (CLB)
"$1I501/$1I35" (AND3) mapped to:  DO1 (CLB)
"$1I501/$1I40" (AND3) mapped to:  DO1 (CLB)
"$1I501/$1I47" (NOR4) mapped to:  DO1 (CLB)
"$1I501/$1I55" (AND3) mapped to:  DO1 (CLB)
"$1I502/$1I30" (AND3) mapped to:  DO0 (CLB)
"$1I502/$1I35" (AND3) mapped to:  DO0 (CLB)
"$1I502/$1I40" (AND3) mapped to:  DO0 (CLB), VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"$1I502/$1I47" (NOR4) mapped to:  DO0 (CLB)
"$1I502/$1I55" (AND3) mapped to:  DO0 (CLB)
"$1I540" (STARTUP) mapped to:  $1I540 (STARTUP)
"$1I542" (IBUF) mapped to:  RST- (IOB)
"$1I550" (OBUF) mapped to:  IZE- (IOB)
"$1I560" (PULLUP) mapped to:  RST- (IOB)
"A0.PAD" (X_IPAD) mapped to:  A0 (IOB)
"A1.PAD" (X_IPAD) mapped to:  A1 (IOB)
"ACOD0.PAD" (X_OPAD) mapped to:  ACOD0 (IOB)
"ACOD1.PAD" (X_OPAD) mapped to:  ACOD1 (IOB)
"ACOD2.PAD" (X_OPAD) mapped to:  ACOD2 (IOB)
"ACOD3.PAD" (X_OPAD) mapped to:  ACOD3 (IOB)
"ADCLK.PAD" (X_OPAD) mapped to:  ADCLK (IOB)
"ARNE1" (AND4) mapped to:  CTLWRDUPL (CLB)
"CASIN1-.PAD" (X_IPAD) mapped to:  CASIN1- (IOB)
"CASIN2-.PAD" (X_IPAD) mapped to:  CASIN2- (IOB)
"CPUCLK.PAD" (X_IPAD) mapped to:  CPUCLK (CLKIOB)
"CTL/Q0" (INFF) mapped to:  DBUS0 (IOB)
"CTL/Q1" (INFF) mapped to:  DBUS1 (IOB)
"CTL/Q2" (INFF) mapped to:  DBUS2 (IOB)
"CTL/Q3" (INFF) mapped to:  DBUS3 (IOB)
"CTL/Q4" (INFF) mapped to:  DBUS4 (IOB)
"CTL/Q5" (INFF) mapped to:  DBUS5 (IOB)
"CTL/Q6" (INFF) mapped to:  DBUS6 (IOB)
"CTL/Q7" (INFF) mapped to:  DBUS7 (IOB)
"CTL/Q8" (INFF) mapped to:  DBUS8 (IOB)
"CTL/Q9" (INFF) mapped to:  DBUS9 (IOB)
"DAHLD.PAD" (X_OPAD) mapped to:  DAHLD (IOB)
"DAKIN-.PAD" (X_IPAD) mapped to:  DAKIN- (IOB)
"DBLANK-.PAD" (X_OPAD) mapped to:  DBLANK- (IOB)
"DBUS0.PAD" (X_BPAD) mapped to:  DBUS0 (IOB)
"DBUS1.PAD" (X_BPAD) mapped to:  DBUS1 (IOB)
"DBUS10.PAD" (X_OPAD) mapped to:  DBUS10 (IOB)
"DBUS11.PAD" (X_OPAD) mapped to:  DBUS11 (IOB)
"DBUS12.PAD" (X_OPAD) mapped to:  DBUS12 (IOB)
"DBUS13.PAD" (X_OPAD) mapped to:  DBUS13 (IOB)
"DBUS14.PAD" (X_OPAD) mapped to:  DBUS14 (IOB)
"DBUS15.PAD" (X_OPAD) mapped to:  DBUS15 (IOB)
"DBUS16.PAD" (X_OPAD) mapped to:  DBUS16 (IOB)
"DBUS17.PAD" (X_OPAD) mapped to:  DBUS17 (IOB)
"DBUS18.PAD" (X_OPAD) mapped to:  DBUS18 (IOB)
"DBUS19.PAD" (X_OPAD) mapped to:  DBUS19 (IOB)
"DBUS2.PAD" (X_BPAD) mapped to:  DBUS2 (IOB)
"DBUS20.PAD" (X_OPAD) mapped to:  DBUS20 (IOB)
"DBUS21.PAD" (X_OPAD) mapped to:  DBUS21 (IOB)
"DBUS22.PAD" (X_OPAD) mapped to:  DBUS22 (IOB)
"DBUS23.PAD" (X_OPAD) mapped to:  DBUS23 (IOB)
"DBUS24.PAD" (X_OPAD) mapped to:  DBUS24 (IOB)
"DBUS25.PAD" (X_OPAD) mapped to:  DBUS25 (IOB)
"DBUS26.PAD" (X_OPAD) mapped to:  DBUS26 (IOB)
"DBUS27.PAD" (X_OPAD) mapped to:  DBUS27 (IOB)
"DBUS28.PAD" (X_OPAD) mapped to:  DBUS28 (IOB)
"DBUS29.PAD" (X_OPAD) mapped to:  DBUS29 (IOB)
"DBUS3.PAD" (X_BPAD) mapped to:  DBUS3 (IOB)
"DBUS30.PAD" (X_OPAD) mapped to:  DBUS30 (IOB)
"DBUS31.PAD" (X_OPAD) mapped to:  DBUS31 (IOB)
"DBUS4.PAD" (X_BPAD) mapped to:  DBUS4 (IOB)
"DBUS5.PAD" (X_BPAD) mapped to:  DBUS5 (IOB)
"DBUS6.PAD" (X_BPAD) mapped to:  DBUS6 (IOB)
"DBUS7.PAD" (X_BPAD) mapped to:  DBUS7 (IOB)
"DBUS8.PAD" (X_BPAD) mapped to:  DBUS8 (IOB)
"DBUS9.PAD" (X_BPAD) mapped to:  DBUS9 (IOB)
"DFLDO.PAD" (X_OPAD) mapped to:  DFLDO (IOB)
"DRQOUT-.PAD" (X_OPAD) mapped to:  DRQOUT- (IOB)
"DSYNC-.PAD" (X_OPAD) mapped to:  DSYNC- (IOB)
"HDRV-.PAD" (X_OPAD) mapped to:  HDRV- (IOB)
"HIRQ-.PAD" (X_OPAD) mapped to:  HIRQ- (IOB)
"HSYNC-.PAD" (X_OPAD) mapped to:  HSYNC- (IOB)
"IZE-.PAD" (X_OPAD) mapped to:  IZE- (IOB)
"KEY.PAD" (X_OPAD) mapped to:  KEY (IOB)
"LDEN.PAD" (X_OPAD) mapped to:  LDEN (IOB)
"PELD0.PAD" (X_IPAD) mapped to:  PELD0 (IOB)
"PELD1.PAD" (X_IPAD) mapped to:  PELD1 (IOB)
"PELD2.PAD" (X_IPAD) mapped to:  PELD2 (IOB)
"PELD3.PAD" (X_IPAD) mapped to:  PELD3 (IOB)
"PELD4.PAD" (X_IPAD) mapped to:  PELD4 (IOB)
"PELD5.PAD" (X_IPAD) mapped to:  PELD5 (IOB)
"PELD6.PAD" (X_IPAD) mapped to:  PELD6 (IOB)
"PELD7.PAD" (X_IPAD) mapped to:  PELD7 (IOB)
"PELFIFO/$1I11" (AND2) mapped to:  CRN (CLB)
"PELFIFO/$1I164" (OR3) mapped to:  PELFIFO/RQS (CLB)
"PELFIFO/$1I170" (IBUF) mapped to:  CASIN1- (IOB)
"PELFIFO/$1I183" (INV) mapped to:  PELFIFO/FDIS (CLB)
"PELFIFO/$1I211" (IBUF) mapped to:  DAKIN- (IOB)
"PELFIFO/$1I215" (OBUF) mapped to:  DRQOUT- (IOB)
"PELFIFO/$1I238" (OR2) mapped to:  PELFIFO/FDIS (CLB)
"PELFIFO/$1I245" (OR2) mapped to:  PELFIFO/FULL (CLB)
"PELFIFO/$1I253" (AND2) mapped to:  PELFIFO/FULL (CLB)
"PELFIFO/$1I264" (AND3) mapped to:  PELFIFO/RQS (CLB)
"PELFIFO/$1I277" (AND4) mapped to:  PELFIFO/FDIS (CLB)
"PELFIFO/$1I310" (OR2) mapped to:  PELFIFO/POP (CLB)
"PELFIFO/$1I311" (AND3) mapped to:  PELFIFO/POP (CLB)
"PELFIFO/$1I312" (AND2) mapped to:  PELFIFO/POP (CLB)
"PELFIFO/$1I341" (BUFGS) mapped to:  PELFIFO/$1I341 (SEC-CLK)
"PELFIFO/$1I39" (AND3) mapped to:  PELFIFO/POPWT (CLB)
"PELFIFO/$1I4" (AND2) mapped to:  CRN (CLB)
"PELFIFO/$1I51" (OR2) mapped to:  PELFIFO/POPWT (CLB)
"PELFIFO/$1I7" (AND3) mapped to:  PELFIFO/POPWT (CLB)
"PELFIFO/AR0/Q0" (INFF) mapped to:  PELD0 (IOB)
"PELFIFO/AR0/Q1" (INFF) mapped to:  PELD1 (IOB)
"PELFIFO/AR0/Q2" (INFF) mapped to:  PELD2 (IOB)
"PELFIFO/AR0/Q3" (INFF) mapped to:  PELD3 (IOB)
"PELFIFO/AR0/Q4" (INFF) mapped to:  PELD4 (IOB)
"PELFIFO/AR0/Q5" (INFF) mapped to:  PELD5 (IOB)
"PELFIFO/AR0/Q6" (INFF) mapped to:  PELD6 (IOB)
"PELFIFO/AR0/Q7" (INFF) mapped to:  PELD7 (IOB)
"PELFIFO/AR1/Q0/$1I1" (DFF) mapped to:  PELFIFO/DI8 (CLB)
"PELFIFO/AR1/Q1/$1I1" (DFF) mapped to:  PELFIFO/DI8 (CLB)
"PELFIFO/AR1/Q2/$1I1" (DFF) mapped to:  PELFIFO/DI10 (CLB)
"PELFIFO/AR1/Q3/$1I1" (DFF) mapped to:  PELFIFO/DI10 (CLB)
"PELFIFO/AR1/Q4/$1I1" (DFF) mapped to:  PELFIFO/DI12 (CLB)
"PELFIFO/AR1/Q5/$1I1" (DFF) mapped to:  PELFIFO/DI12 (CLB)
"PELFIFO/AR1/Q6/$1I1" (DFF) mapped to:  PELFIFO/DI14 (CLB)
"PELFIFO/AR1/Q7/$1I1" (DFF) mapped to:  PELFIFO/DI14 (CLB)
"PELFIFO/AR2/Q0/$1I1" (DFF) mapped to:  PELFIFO/DI16 (CLB)
"PELFIFO/AR2/Q1/$1I1" (DFF) mapped to:  PELFIFO/DI16 (CLB)
"PELFIFO/AR2/Q2/$1I1" (DFF) mapped to:  PELFIFO/DI18 (CLB)
"PELFIFO/AR2/Q3/$1I1" (DFF) mapped to:  PELFIFO/DI18 (CLB)
"PELFIFO/AR2/Q4/$1I1" (DFF) mapped to:  PELFIFO/DO13 (CLB)
"PELFIFO/AR2/Q5/$1I1" (DFF) mapped to:  PELFIFO/DO13 (CLB)
"PELFIFO/AR2/Q6/$1I1" (DFF) mapped to:  PELFIFO/DO15 (CLB)
"PELFIFO/AR2/Q7/$1I1" (DFF) mapped to:  PELFIFO/DO15 (CLB)
"PELFIFO/AR3/Q0/$1I1" (DFF) mapped to:  PELFIFO/DO17 (CLB)
"PELFIFO/AR3/Q1/$1I1" (DFF) mapped to:  PELFIFO/DO17 (CLB)
"PELFIFO/AR3/Q2/$1I1" (DFF) mapped to:  PELFIFO/DI26 (CLB)
"PELFIFO/AR3/Q3/$1I1" (DFF) mapped to:  PELFIFO/DI26 (CLB)
"PELFIFO/AR3/Q4/$1I1" (DFF) mapped to:  PELFIFO/DO21 (CLB)
"PELFIFO/AR3/Q5/$1I1" (DFF) mapped to:  PELFIFO/DO21 (CLB)
"PELFIFO/AR3/Q6/$1I1" (DFF) mapped to:  PELFIFO/DI30 (CLB)
"PELFIFO/AR3/Q7/$1I1" (DFF) mapped to:  PELFIFO/DI30 (CLB)
"PELFIFO/AS1/$1I1" (DFF) mapped to:  CRN (CLB)
"PELFIFO/AS2/$1I1" (DFF) mapped to:  CRN (CLB)
"PELFIFO/CASD/$1I37" (INFF) mapped to:  CASIN2- (IOB)
"PELFIFO/DREG/Q0/$1I1" (DFF) mapped to:  PELFIFO/DO1 (CLB)
"PELFIFO/DREG/Q1/$1I1" (DFF) mapped to:  DO1 (CLB)
"PELFIFO/DREG/Q2/$1I1" (DFF) mapped to:  PELFIFO/DO3 (CLB)
"PELFIFO/DREG/Q3/$1I1" (DFF) mapped to:  DO3/2.0 (CLB)
"PELFIFO/DREG/Q4/$1I1" (DFF) mapped to:  PELFIFO/DO5 (CLB)
"PELFIFO/DREG/Q5/$1I1" (DFF) mapped to:  DO3/2.0 (CLB)
"PELFIFO/DREG/Q6/$1I1" (DFF) mapped to:  PELFIFO/DO7 (CLB)
"PELFIFO/DREG/Q7/$1I1" (DFF) mapped to:  DO7/2.0 (CLB)
"PELFIFO/DREG/Q8/$1I1" (DFF) mapped to:  PELFIFO/DO9 (CLB)
"PELFIFO/DREG/Q9/$1I1" (DFF) mapped to:  DO9/2.0 (CLB)
"PELFIFO/DREGO/O0/$1I15" (OUTFFT) mapped to:  DBUS10 (IOB)
"PELFIFO/DREGO/O1/$1I15" (OUTFFT) mapped to:  DBUS11 (IOB)
"PELFIFO/DREGO/O10/$1I15" (OUTFFT) mapped to:  DBUS20 (IOB)
"PELFIFO/DREGO/O11/$1I15" (OUTFFT) mapped to:  DBUS21 (IOB)
"PELFIFO/DREGO/O12/$1I15" (OUTFFT) mapped to:  DBUS22 (IOB)
"PELFIFO/DREGO/O13/$1I15" (OUTFFT) mapped to:  DBUS23 (IOB)
"PELFIFO/DREGO/O14/$1I15" (OUTFFT) mapped to:  DBUS24 (IOB)
"PELFIFO/DREGO/O15/$1I15" (OUTFFT) mapped to:  DBUS25 (IOB)
"PELFIFO/DREGO/O16/$1I15" (OUTFFT) mapped to:  DBUS26 (IOB)
"PELFIFO/DREGO/O17/$1I15" (OUTFFT) mapped to:  DBUS27 (IOB)
"PELFIFO/DREGO/O18/$1I15" (OUTFFT) mapped to:  DBUS28 (IOB)
"PELFIFO/DREGO/O19/$1I15" (OUTFFT) mapped to:  DBUS29 (IOB)
"PELFIFO/DREGO/O2/$1I15" (OUTFFT) mapped to:  DBUS12 (IOB)
"PELFIFO/DREGO/O20/$1I15" (OUTFFT) mapped to:  DBUS30 (IOB)
"PELFIFO/DREGO/O21/$1I15" (OUTFFT) mapped to:  DBUS31 (IOB)
"PELFIFO/DREGO/O3/$1I15" (OUTFFT) mapped to:  DBUS13 (IOB)
"PELFIFO/DREGO/O4/$1I15" (OUTFFT) mapped to:  DBUS14 (IOB)
"PELFIFO/DREGO/O5/$1I15" (OUTFFT) mapped to:  DBUS15 (IOB)
"PELFIFO/DREGO/O6/$1I15" (OUTFFT) mapped to:  DBUS16 (IOB)
"PELFIFO/DREGO/O7/$1I15" (OUTFFT) mapped to:  DBUS17 (IOB)
"PELFIFO/DREGO/O8/$1I15" (OUTFFT) mapped to:  DBUS18 (IOB)
"PELFIFO/DREGO/O9/$1I15" (OUTFFT) mapped to:  DBUS19 (IOB)
"PELFIFO/DRQF/$1I30" (DFF) mapped to:  PELFIFO/RQS (CLB)
"PELFIFO/FIFO/$1I2869" (AND2) mapped to:  PELFIFO/FIFO/CE_WR (CLB)
"PELFIFO/FIFO/$1I2928" (AND2) mapped to:  PELFIFO/FIFO/LAST (CLB)
"PELFIFO/FIFO/$1I2949" (AND2) mapped to:  PELFIFO/FIFO/LAST (CLB)
"PELFIFO/FIFO/$1I2952" (AND4) mapped to:  PELFIFO/FIFO/A (CLB)
"PELFIFO/FIFO/$1I3320" (AND2) mapped to:  PELFIFO/FIFO/CE_RD (CLB)
"PELFIFO/FIFO/$1I3329" (AND2) mapped to:  PELFIFO/FULL (CLB)
"PELFIFO/FIFO/$1I3338/$1I30" (DFF) mapped to:  PELFIFO/FIFO/LAST (CLB)
"PELFIFO/FIFO/$1I3339/$1I30" (DFF) mapped to:  PELFIFO/FIFO/LAST (CLB)
"PELFIFO/FIFO/$1I3351/$1I30" (DFF) mapped to:  PELFIFO/FULL (CLB)
"PELFIFO/FIFO/$1I3354" (AND2) mapped to:  PELFIFO/FULL (CLB)
"PELFIFO/FIFO/$1I3355" (OR3) mapped to:  PELFIFO/FIFO/LAST (CLB)
"PELFIFO/FIFO/$1I3364" (OR2) mapped to:  PELFIFO/FULL (CLB)
"PELFIFO/FIFO/$1I3376" (OR2) mapped to:  PELFIFO/FIFO/LAST (CLB)
"PELFIFO/FIFO/$1I3378" (AND2) mapped to:  PELFIFO/FIFO/LAST (CLB)
"PELFIFO/FIFO/$1I3434" (AND3) mapped to:  PELFIFO/FIFO/A (CLB)
"PELFIFO/FIFO/$1I3439" (AND3) mapped to:  PELFIFO/FIFO/LAST (CLB)
"PELFIFO/FIFO/$1I3440" (AND3) mapped to:  PELFIFO/FIFO/LAST (CLB)
"PELFIFO/FIFO/$1I3457" (OR3) mapped to:  PELFIFO/RQS (CLB)
"PELFIFO/FIFO/APRD/$1I2644" (DFF) mapped to:  PELFIFO/FIFO/AR0 (CLB)
"PELFIFO/FIFO/APRD/$1I2654" (DFF) mapped to:  PELFIFO/FIFO/AR0 (CLB)
"PELFIFO/FIFO/APRD/$1I2659" (XOR2) mapped to:  PELFIFO/FIFO/AR0 (CLB)
"PELFIFO/FIFO/APRD/$1I2666" (DFF) mapped to:  PELFIFO/FIFO/AR2 (CLB)
"PELFIFO/FIFO/APRD/$1I2667" (XOR2) mapped to:  PELFIFO/FIFO/AR2 (CLB)
"PELFIFO/FIFO/APRD/$1I2676" (AND2) mapped to:  PELFIFO/FIFO/AR2 (CLB)
"PELFIFO/FIFO/APRD/$1I2683" (XOR2) mapped to:  PELFIFO/FIFO/AR2 (CLB)
"PELFIFO/FIFO/APRD/$1I2684" (DFF) mapped to:  PELFIFO/FIFO/AR2 (CLB)
"PELFIFO/FIFO/APRD/$1I2690" (AND3) mapped to:  PELFIFO/FIFO/AR2 (CLB)
"PELFIFO/FIFO/APRD/$1I2708" (INV) mapped to:  PELFIFO/FIFO/AR0 (CLB)
"PELFIFO/FIFO/APWR/$1I2644" (DFF) mapped to:  PELFIFO/FIFO/AW0 (CLB)
"PELFIFO/FIFO/APWR/$1I2654" (DFF) mapped to:  PELFIFO/FIFO/AW0 (CLB)
"PELFIFO/FIFO/APWR/$1I2659" (XOR2) mapped to:  PELFIFO/FIFO/AW0 (CLB)
"PELFIFO/FIFO/APWR/$1I2666" (DFF) mapped to:  PELFIFO/FIFO/AW2 (CLB)
"PELFIFO/FIFO/APWR/$1I2667" (XOR2) mapped to:  PELFIFO/FIFO/AW2 (CLB)
"PELFIFO/FIFO/APWR/$1I2676" (AND2) mapped to:  PELFIFO/FIFO/AW2 (CLB)
"PELFIFO/FIFO/APWR/$1I2683" (XOR2) mapped to:  PELFIFO/FIFO/AW2 (CLB)
"PELFIFO/FIFO/APWR/$1I2684" (DFF) mapped to:  PELFIFO/FIFO/AW2 (CLB)
"PELFIFO/FIFO/APWR/$1I2690" (AND3) mapped to:  PELFIFO/FIFO/AW2 (CLB)
"PELFIFO/FIFO/APWR/$1I2708" (INV) mapped to:  PELFIFO/FIFO/AW0 (CLB)
"PELFIFO/FIFO/C4UD/$1I2945/$1I30" (DFF) mapped to:  PELFIFO/FIFO/CE_RD (CLB)
"PELFIFO/FIFO/C4UD/$1I2975" (OR2) mapped to:  PELFIFO/FIFO/C4UD/$1N2959 (CLB)
"PELFIFO/FIFO/C4UD/$1I2977/$1I30" (DFF) mapped to:  
     PELFIFO/FIFO/C4UD/$1N2959 (CLB)
"PELFIFO/FIFO/C4UD/$1I2979" (XOR2) mapped to:  PELFIFO/FIFO/C4UD/$1N2959 (CLB)
"PELFIFO/FIFO/C4UD/$1I2998" (XOR2) mapped to:  PELFIFO/FIFO/Q1 (CLB)
"PELFIFO/FIFO/C4UD/$1I3000/$1I30" (DFF) mapped to:  PELFIFO/FIFO/Q1 (CLB)
"PELFIFO/FIFO/C4UD/$1I3002" (OR2) mapped to:  PELFIFO/FIFO/Q1 (CLB)
"PELFIFO/FIFO/C4UD/$1I3015" (XOR2) mapped to:  PELFIFO/FIFO/CE_WR (CLB)
"PELFIFO/FIFO/C4UD/$1I3017/$1I30" (DFF) mapped to:  PELFIFO/FIFO/Q1 (CLB)
"PELFIFO/FIFO/C4UD/$1I3019" (XOR2) mapped to:  PELFIFO/FIFO/CE_WR (CLB)
"PELFIFO/FIFO/C4UD/$1I3039" (AND3) mapped to:  PELFIFO/FIFO/Q1 (CLB)
"PELFIFO/FIFO/C4UD/$1I3040" (AND3) mapped to:  PELFIFO/FIFO/Q1 (CLB)
"PELFIFO/FIFO/C4UD/$1I3043" (AND4) mapped to:  PELFIFO/FIFO/C4UD/$1N2959 (CLB)
"PELFIFO/FIFO/C4UD/$1I3044" (AND4) mapped to:  PELFIFO/FIFO/C4UD/$1N2959 (CLB)
"PELFIFO/FIFO/C4UD/$1I3048" (AND3) mapped to:  PELFIFO/FIFO/C4UD/F (CLB)
"PELFIFO/FIFO/C4UD/$1I3049" (AND3) mapped to:  PELFIFO/FIFO/C4UD/$1N2959 (CLB)
"PELFIFO/FIFO/C4UD/$1I3052/$1I7" (AND2) mapped to:  PELFIFO/FIFO/CE_RD (CLB)
"PELFIFO/FIFO/C4UD/$1I3052/$1I8" (OR2) mapped to:  PELFIFO/FIFO/CE_RD (CLB)
"PELFIFO/FIFO/C4UD/$1I3052/$1I9" (AND2) mapped to:  PELFIFO/FIFO/CE_RD (CLB)
"PELFIFO/FIFO/C4UD/$1I3053/$1I7" (AND2) mapped to:  PELFIFO/FIFO/C4UD/F (CLB)
"PELFIFO/FIFO/C4UD/$1I3053/$1I8" (OR2) mapped to:  PELFIFO/FIFO/C4UD/F (CLB)
"PELFIFO/FIFO/C4UD/$1I3053/$1I9" (AND2) mapped to:  PELFIFO/FIFO/C4UD/F (CLB)
"PELFIFO/FIFO/C4UD/$1I3054/$1I7" (AND2) mapped to:  PELFIFO/FIFO/CE_RD (CLB)
"PELFIFO/FIFO/C4UD/$1I3054/$1I8" (OR2) mapped to:  PELFIFO/FIFO/CE_RD (CLB)
"PELFIFO/FIFO/C4UD/$1I3054/$1I9" (AND2) mapped to:  PELFIFO/FIFO/CE_RD (CLB)
"PELFIFO/FIFO/C4UD/$1I3066" (XOR2) mapped to:  PELFIFO/FIFO/C4UD/F (CLB)
"PELFIFO/FIFO/C4UD/$1I3067" (XOR2) mapped to:  PELFIFO/FIFO/CE_RD (CLB)
"PELFIFO/FIFO/MUX/$1I89/$1I7" (AND2) mapped to:  PELFIFO/FIFO/A3 (CLB)
"PELFIFO/FIFO/MUX/$1I89/$1I8" (OR2) mapped to:  PELFIFO/FIFO/A3 (CLB)
"PELFIFO/FIFO/MUX/$1I89/$1I9" (AND2) mapped to:  PELFIFO/FIFO/A3 (CLB)
"PELFIFO/FIFO/MUX/$1I90/$1I7" (AND2) mapped to:  PELFIFO/FIFO/A3 (CLB)
"PELFIFO/FIFO/MUX/$1I90/$1I8" (OR2) mapped to:  PELFIFO/FIFO/A3 (CLB)
"PELFIFO/FIFO/MUX/$1I90/$1I9" (AND2) mapped to:  PELFIFO/FIFO/A3 (CLB)
"PELFIFO/FIFO/MUX/$1I91/$1I7" (AND2) mapped to:  PELFIFO/FIFO/A1 (CLB)
"PELFIFO/FIFO/MUX/$1I91/$1I8" (OR2) mapped to:  PELFIFO/FIFO/A1 (CLB)
"PELFIFO/FIFO/MUX/$1I91/$1I9" (AND2) mapped to:  PELFIFO/FIFO/A1 (CLB)
"PELFIFO/FIFO/MUX/$1I92/$1I7" (AND2) mapped to:  PELFIFO/FIFO/A1 (CLB)
"PELFIFO/FIFO/MUX/$1I92/$1I8" (OR2) mapped to:  PELFIFO/FIFO/A1 (CLB)
"PELFIFO/FIFO/MUX/$1I92/$1I9" (AND2) mapped to:  PELFIFO/FIFO/A1 (CLB)
"PELFIFO/FIFO/MUX/$2I104" (FMAP) mapped to:  PELFIFO/FIFO/A3 (CLB)
"PELFIFO/FIFO/MUX/$2I105" (FMAP) mapped to:  PELFIFO/FIFO/A3 (CLB)
"PELFIFO/FIFO/MUX/$2I106" (FMAP) mapped to:  PELFIFO/FIFO/A1 (CLB)
"PELFIFO/FIFO/MUX/$2I107" (FMAP) mapped to:  PELFIFO/FIFO/A1 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I107" (RAM16X1S) mapped to:  PELFIFO/DO29 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I108" (RAM16X1S) mapped to:  PELFIFO/DO29 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I109" (RAM16X1S) mapped to:  PELFIFO/DO31 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I110" (RAM16X1S) mapped to:  PELFIFO/DO31 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I138" (RAM16X1S) mapped to:  PELFIFO/DO18 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I142" (RAM16X1S) mapped to:  PELFIFO/DO24 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I143" (RAM16X1S) mapped to:  PELFIFO/DO24 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I144" (RAM16X1S) mapped to:  PELFIFO/DO26 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I145" (RAM16X1S) mapped to:  PELFIFO/DO26 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I146" (RAM16X1S) mapped to:  PELFIFO/DO18 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I147" (RAM16X1S) mapped to:  PELFIFO/DO17 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I148" (RAM16X1S) mapped to:  PELFIFO/DO17 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I89" (RAM16X1S) mapped to:  PELFIFO/DO21 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I90" (RAM16X1S) mapped to:  PELFIFO/DO21 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I91" (RAM16X1S) mapped to:  PELFIFO/DO22 (CLB)
"PELFIFO/FIFO/RAMS/RAMSH/$1I92" (RAM16X1S) mapped to:  PELFIFO/DO22 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I107" (RAM16X1S) mapped to:  PELFIFO/DO13 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I108" (RAM16X1S) mapped to:  PELFIFO/DO13 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I109" (RAM16X1S) mapped to:  PELFIFO/DO15 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I110" (RAM16X1S) mapped to:  PELFIFO/DO15 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I138" (RAM16X1S) mapped to:  PELFIFO/DO3 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I142" (RAM16X1S) mapped to:  PELFIFO/DO9 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I143" (RAM16X1S) mapped to:  PELFIFO/DO9 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I144" (RAM16X1S) mapped to:  PELFIFO/DO10 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I145" (RAM16X1S) mapped to:  PELFIFO/DO10 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I146" (RAM16X1S) mapped to:  PELFIFO/DO3 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I147" (RAM16X1S) mapped to:  PELFIFO/DO1 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I148" (RAM16X1S) mapped to:  PELFIFO/DO1 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I89" (RAM16X1S) mapped to:  PELFIFO/DO5 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I90" (RAM16X1S) mapped to:  PELFIFO/DO5 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I91" (RAM16X1S) mapped to:  PELFIFO/DO7 (CLB)
"PELFIFO/FIFO/RAMS/RAMSL/$1I92" (RAM16X1S) mapped to:  PELFIFO/DO7 (CLB)
"PELFIFO/OVRN/$1I30" (DFF) mapped to:  PELFIFO/FULL (CLB)
"PELFIFO/POP/$1I30" (DFF) mapped to:  PELFIFO/POP (CLB)
"PELFIFO/POPWT/$1I30" (DFF) mapped to:  PELFIFO/POPWT (CLB)
"PELFIFO/PUSH/$1I30" (DFF) mapped to:  PELFIFO/POPWT (CLB)
"PELFIFO/RUND/$1I30" (DFF) mapped to:  DO9/2.0 (CLB)
"REGSA/$1I17" (IBUF) mapped to:  A0 (IOB)
"REGSA/$1I2" (IBUF) mapped to:  STRB- (IOB)
"REGSA/$1I23" (IBUF) mapped to:  A1 (IOB)
"REGSA/$1I40" (AND2) mapped to:  DOEN- (CLB)
"REGSA/$1I44" (AND4) mapped to:  DOEN- (CLB)
"REGSA/$1I50" (AND2) mapped to:  CTLWRDUPL (CLB)
"REGSA/$1I54" (AND2) mapped to:  RS1 (CLB)
"REGSA/$1I9" (IBUF) mapped to:  WR- (IOB)
"RST-.PAD" (X_IPAD) mapped to:  RST- (IOB)
"STRB-.PAD" (X_IPAD) mapped to:  STRB- (IOB)
"VDRV-.PAD" (X_OPAD) mapped to:  VDRV- (IOB)
"VGA.PAD" (X_OPAD) mapped to:  VGA (IOB)
"VGCLK.PAD" (X_OPAD) mapped to:  VGCLK (IOB)
"VIDTIM/$1I228" (NAND2) mapped to:  VIDTIM/PIRQ- (CLB)
"VIDTIM/$1I231" (AND2) mapped to:  CRN (CLB)
"VIDTIM/$1I232/$1I7" (AND2) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/$1I232/$1I8" (OR2) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/$1I232/$1I9" (AND2) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/$1I241/$1I7" (AND2) mapped to:  VIDTIM/NVDR (CLB)
"VIDTIM/$1I241/$1I8" (OR2) mapped to:  VIDTIM/NVDR (CLB)
"VIDTIM/$1I241/$1I9" (AND2) mapped to:  VIDTIM/NVDR (CLB)
"VIDTIM/$1I242" (AND2) mapped to:  VIDTIM/NVDR (CLB)
"VIDTIM/$1I248" (OR2) mapped to:  VIDTIM/NVDR (CLB)
"VIDTIM/$1I279/Q0/$1I37" (OUTFF) mapped to:  LDEN (IOB)
"VIDTIM/$1I279/Q1/$1I37" (OUTFF) mapped to:  HDRV- (IOB)
"VIDTIM/$1I279/Q2/$1I37" (OUTFF) mapped to:  KEY (IOB)
"VIDTIM/$1I279/Q3/$1I37" (OUTFF) mapped to:  HSYNC- (IOB)
"VIDTIM/$1I318" (AND2) mapped to:  VIDTIM/LDEND (CLB)
"VIDTIM/$1I329" (OR2) mapped to:  VIDTIM/LDEND (CLB)
"VIDTIM/$1I345" (AND2) mapped to:  VIDTIM/LDEND (CLB)
"VIDTIM/$1I359/Q0/$1I37" (OUTFF) mapped to:  HIRQ- (IOB)
"VIDTIM/$1I359/Q1/$1I37" (OUTFF) mapped to:  VGCLK (IOB)
"VIDTIM/$1I359/Q2/$1I37" (OUTFF) mapped to:  VDRV- (IOB)
"VIDTIM/$1I359/Q3/$1I37" (OUTFF) mapped to:  VSYNC- (IOB)
"VIDTIM/$1I408" (AND2) mapped to:  VIDTIM/IKE (CLB)
"VIDTIM/$1I430" (OR2) mapped to:  VIDTIM/IKE (CLB)
"VIDTIM/$1I456" (OR2) mapped to:  VIDTIM/IKE (CLB)
"VIDTIM/$1I466/$1I37" (OUTFF) mapped to:  VSCLK (IOB)
"VIDTIM/$1I487" (AND3) mapped to:  VIDTIM/PVSK (CLB)
"VIDTIM/$1I515/$1I37" (OUTFF) mapped to:  DBLANK- (IOB)
"VIDTIM/$1I524/$1I7" (AND2) mapped to:  VIDTIM/PRLDEN (CLB)
"VIDTIM/$1I524/$1I8" (OR2) mapped to:  VIDTIM/PRLDEN (CLB)
"VIDTIM/$1I524/$1I9" (AND2) mapped to:  VIDTIM/PRLDEN (CLB)
"VIDTIM/$1I525/$1I37" (OUTFF) mapped to:  ADCLK (IOB)
"VIDTIM/$1I547/$1I37" (OUTFF) mapped to:  DSYNC- (IOB)
"VIDTIM/$1I555" (AND2) mapped to:  VIDTIM/PRLDEN (CLB)
"VIDTIM/$1I566" (BUFGS) mapped to:  VIDTIM/$1I566 (SEC-CLK)
"VIDTIM/CSYNC/$1I30" (AND3) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/CSYNC/$1I35" (AND3) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/CSYNC/$1I40" (AND3) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/CSYNC/$1I47" (OR3) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/DR2/$1I1" (DFF) mapped to:  VIDTIM/NVDR (CLB)
"VIDTIM/DR3/$1I1" (DFF) mapped to:  PELFIFO/RQS (CLB)
"VIDTIM/HTIME/$1I115/AND1" (AND4) mapped to:  VIDTIM/HTIME/$1I115/AND1 (CLB)
"VIDTIM/HTIME/$1I115/AND2" (AND3) mapped to:  VIDTIM/HTIME/NHSR/2.0 (CLB)
"VIDTIM/HTIME/$1I115/NHSR" (AND3) mapped to:  VIDTIM/HTIME/NHSR/2.0 (CLB)
     VIDTIM/NHS (CLB)
"VIDTIM/HTIME/$1I121/AND1" (AND4) mapped to:  VIDTIM/HTIME/DHRR (CLB)
"VIDTIM/HTIME/$1I121/AND2" (AND3) mapped to:  VIDTIM/HTIME/DHRR (CLB)
"VIDTIM/HTIME/$1I121/DHRR" (AND3) mapped to:  VIDTIM/HTIME/DHRR (CLB)
"VIDTIM/HTIME/$1I13/AND1" (AND4) mapped to:  VIDTIM/HTIME/$1I115/AND1 (CLB)
"VIDTIM/HTIME/$1I13/AND2" (AND3) mapped to:  VIDTIM/HTIME/NHSR/2.0 (CLB)
"VIDTIM/HTIME/$1I13/VGSR" (AND3) mapped to:  VIDTIM/HTIME/NHSR/2.0 (CLB)
     VIDTIM/NHS (CLB)
"VIDTIM/HTIME/$1I134/AND1" (AND4) mapped to:  VIDTIM/HTIME/HDVS (CLB)
"VIDTIM/HTIME/$1I134/AND2" (AND3) mapped to:  VIDTIM/HTIME/HDVS (CLB)
"VIDTIM/HTIME/$1I134/HDVS2" (AND3) mapped to:  VIDTIM/HTIME/HDVS (CLB)
"VIDTIM/HTIME/$1I138/AND1" (AND4) mapped to:  VIDTIM/HTIME/$1I138/AND1 (CLB)
"VIDTIM/HTIME/$1I138/AND2" (AND3) mapped to:  VIDTIM/HTIME/HDVR/2.0 (CLB)
"VIDTIM/HTIME/$1I138/HDVR" (AND3) mapped to:  VIDTIM/CHR (CLB)
     VIDTIM/HTIME/HDVR/2.0 (CLB)
"VIDTIM/HTIME/$1I139" (AND2) mapped to:  VIDTIM/HTIME/HDVS (CLB)
"VIDTIM/HTIME/$1I156" (AND3) mapped to:  VIDTIM/HTIME/L2HM1 (CLB)
"VIDTIM/HTIME/$1I171/AND1" (AND4) mapped to:  VIDTIM/HTIME/CHRR (CLB)
"VIDTIM/HTIME/$1I171/AND2" (AND3) mapped to:  VIDTIM/HTIME/CHRR (CLB)
"VIDTIM/HTIME/$1I171/CHRR2" (AND3) mapped to:  VIDTIM/HTIME/CHRR (CLB)
"VIDTIM/HTIME/$1I173" (AND2) mapped to:  VIDTIM/HTIME/CHRR (CLB)
"VIDTIM/HTIME/$1I176/AND1" (AND4) mapped to:  VIDTIM/HTIME/$1I138/AND1 (CLB)
"VIDTIM/HTIME/$1I176/AND2" (AND3) mapped to:  VIDTIM/HTIME/HDVR/2.0 (CLB)
"VIDTIM/HTIME/$1I176/CHRS" (AND3) mapped to:  VIDTIM/CHR (CLB)
     VIDTIM/HTIME/HDVR/2.0 (CLB)
"VIDTIM/HTIME/$1I212" (AND4) mapped to:  VIDTIM/HTIME/L2HM1 (CLB)
"VIDTIM/HTIME/$1I223" (AND5) mapped to:  VIDTIM/HTIME/KEY2/4.0 (CLB)
     VIDTIM/HTIME/L2HM1 (CLB)
"VIDTIM/HTIME/$1I70/AND1" (AND4) mapped to:  VIDTIM/HTIME/$1I70/AND1 (CLB)
"VIDTIM/HTIME/$1I70/AND2" (AND3) mapped to:  VIDTIM/HTIME/KEY2/4.0 (CLB)
"VIDTIM/HTIME/$1I70/HEQR" (AND3) mapped to:  VIDTIM/HEQ (CLB)
     VIDTIM/HTIME/KEY2/4.0 (CLB)
"VIDTIM/HTIME/$1I74/AND1" (AND4) mapped to:  VIDTIM/HTIME/$1I70/AND1 (CLB)
"VIDTIM/HTIME/$1I74/AND2" (AND3) mapped to:  VIDTIM/HTIME/HVSR/2.0 (CLB)
"VIDTIM/HTIME/$1I74/HVSR" (AND3) mapped to:  VIDTIM/HST (CLB)
     VIDTIM/HTIME/HVSR/2.0 (CLB)
"VIDTIM/HTIME/$1I87/AND1" (AND4) mapped to:  VIDTIM/HTIME/$1I87/AND1 (CLB)
"VIDTIM/HTIME/$1I87/AND2" (AND3) mapped to:  VIDTIM/HTIME/HVSR/2.0 (CLB)
"VIDTIM/HTIME/$1I87/DHRS" (AND3) mapped to:  VIDTIM/HTIME/$1I87/AND1 (CLB)
     VIDTIM/HTIME/HVSR/2.0 (CLB)
"VIDTIM/HTIME/$1I97" (AND2) mapped to:  VIDTIM/HST (CLB)
"VIDTIM/HTIME/CHRN/$1I70" (AND2) mapped to:  VIDTIM/CHR (CLB)
"VIDTIM/HTIME/CHRN/$1I71" (OR2) mapped to:  VIDTIM/CHR (CLB)
"VIDTIM/HTIME/CHRN/$1I72" (AND2) mapped to:  VIDTIM/CHR (CLB)
"VIDTIM/HTIME/CHRN/$1I73" (DFF) mapped to:  VIDTIM/CHR (CLB)
"VIDTIM/HTIME/DHRN/$1I70" (AND2) mapped to:  VIDTIM/HTIME/$1I87/AND1 (CLB)
"VIDTIM/HTIME/DHRN/$1I71" (OR2) mapped to:  VIDTIM/HTIME/$1I87/AND1 (CLB)
"VIDTIM/HTIME/DHRN/$1I72" (AND2) mapped to:  VIDTIM/HTIME/$1I87/AND1 (CLB)
"VIDTIM/HTIME/DHRN/$1I73" (DFF) mapped to:  VIDTIM/HTIME/$1I87/AND1 (CLB)
"VIDTIM/HTIME/HCNT_1/AND1_REG_ffx_0" (AND2) mapped to:  
     VIDTIM/HTIME/HCOUNT<0> (CLB)
"VIDTIM/HTIME/HCNT_1/AND2_REG_ffy_0" (AND2) mapped to:  
     VIDTIM/HTIME/HCOUNT<0> (CLB)
"VIDTIM/HTIME/HCNT_1/AND3_REG_ffx_1" (AND2) mapped to:  
     VIDTIM/HTIME/HCOUNT<2> (CLB)
"VIDTIM/HTIME/HCNT_1/AND4_REG_ffy_1" (AND2) mapped to:  
     VIDTIM/HTIME/HCOUNT<2> (CLB)
"VIDTIM/HTIME/HCNT_1/AND5_REG_ffx_2" (AND2) mapped to:  
     VIDTIM/HTIME/HCOUNT<4> (CLB)
"VIDTIM/HTIME/HCNT_1/AND6_REG_ffy_2" (AND2) mapped to:  
     VIDTIM/HTIME/HCOUNT<4> (CLB)
"VIDTIM/HTIME/HCNT_1/AND7_REG_ffx_3" (AND2) mapped to:  
     VIDTIM/HTIME/HCOUNT<6> (CLB)
"VIDTIM/HTIME/HCNT_1/AND8_REG_ffy_3" (AND2) mapped to:  
     VIDTIM/HTIME/HCOUNT<6> (CLB)
"VIDTIM/HTIME/HCNT_1/CY4_0" (HIERCY4_19) mapped to:  VIDTIM/HTIME/HCOUNT<0> (CLB)
"VIDTIM/HTIME/HCNT_1/CY4_1" (HIERCY4_18) mapped to:  VIDTIM/HTIME/HCOUNT<2> (CLB)
"VIDTIM/HTIME/HCNT_1/CY4_2" (HIERCY4_18) mapped to:  VIDTIM/HTIME/HCOUNT<4> (CLB)
"VIDTIM/HTIME/HCNT_1/CY4_3" (HIERCY4_17) mapped to:  VIDTIM/HTIME/HCOUNT<6> (CLB)
"VIDTIM/HTIME/HCNT_1/FF_ffx_0" (DFF) mapped to:  VIDTIM/HTIME/HCOUNT<0> (CLB)
"VIDTIM/HTIME/HCNT_1/FF_ffx_1" (DFF) mapped to:  VIDTIM/HTIME/HCOUNT<2> (CLB)
"VIDTIM/HTIME/HCNT_1/FF_ffx_2" (DFF) mapped to:  VIDTIM/HTIME/HCOUNT<4> (CLB)
"VIDTIM/HTIME/HCNT_1/FF_ffx_3" (DFF) mapped to:  VIDTIM/HTIME/HCOUNT<6> (CLB)
"VIDTIM/HTIME/HCNT_1/FF_ffy_0" (DFF) mapped to:  VIDTIM/HTIME/HCOUNT<0> (CLB)
"VIDTIM/HTIME/HCNT_1/FF_ffy_1" (DFF) mapped to:  VIDTIM/HTIME/HCOUNT<2> (CLB)
"VIDTIM/HTIME/HCNT_1/FF_ffy_2" (DFF) mapped to:  VIDTIM/HTIME/HCOUNT<4> (CLB)
"VIDTIM/HTIME/HCNT_1/FF_ffy_3" (DFF) mapped to:  VIDTIM/HTIME/HCOUNT<6> (CLB)
"VIDTIM/HTIME/HCNT_1/FMAP1_0_f" (FMAP) mapped to:  VIDTIM/HTIME/HCOUNT<0> (CLB)
"VIDTIM/HTIME/HCNT_1/FMAP2_0_g" (FMAP) mapped to:  VIDTIM/HTIME/HCOUNT<0> (CLB)
"VIDTIM/HTIME/HCNT_1/FMAP3_1_f" (FMAP) mapped to:  VIDTIM/HTIME/HCOUNT<2> (CLB)
"VIDTIM/HTIME/HCNT_1/FMAP4_1_g" (FMAP) mapped to:  VIDTIM/HTIME/HCOUNT<2> (CLB)
"VIDTIM/HTIME/HCNT_1/FMAP5_2_f" (FMAP) mapped to:  VIDTIM/HTIME/HCOUNT<4> (CLB)
"VIDTIM/HTIME/HCNT_1/FMAP6_2_g" (FMAP) mapped to:  VIDTIM/HTIME/HCOUNT<4> (CLB)
"VIDTIM/HTIME/HCNT_1/FMAP7_3_f" (FMAP) mapped to:  VIDTIM/HTIME/HCOUNT<6> (CLB)
"VIDTIM/HTIME/HCNT_1/FMAP8_3_g" (FMAP) mapped to:  VIDTIM/HTIME/HCOUNT<6> (CLB)
"VIDTIM/HTIME/HCNT_1/XOR1_G_SUM_0" (XOR2) mapped to:  
     VIDTIM/HTIME/HCOUNT<0> (CLB)
"VIDTIM/HTIME/HCNT_1/XOR2_F_SUM_1" (XOR2) mapped to:  
     VIDTIM/HTIME/HCOUNT<2> (CLB)
"VIDTIM/HTIME/HCNT_1/XOR3_G_SUM_1" (XOR2) mapped to:  
     VIDTIM/HTIME/HCOUNT<2> (CLB)
"VIDTIM/HTIME/HCNT_1/XOR4_F_SUM_2" (XOR2) mapped to:  
     VIDTIM/HTIME/HCOUNT<4> (CLB)
"VIDTIM/HTIME/HCNT_1/XOR5_G_SUM_2" (XOR2) mapped to:  
     VIDTIM/HTIME/HCOUNT<4> (CLB)
"VIDTIM/HTIME/HCNT_1/XOR6_F_SUM_3" (XOR2) mapped to:  
     VIDTIM/HTIME/HCOUNT<6> (CLB)
"VIDTIM/HTIME/HCNT_1/XOR7_G_SUM_3" (XOR2) mapped to:  
     VIDTIM/HTIME/HCOUNT<6> (CLB)
"VIDTIM/HTIME/HDV/$1I70" (AND2) mapped to:  VIDTIM/CHR (CLB)
"VIDTIM/HTIME/HDV/$1I71" (OR2) mapped to:  VIDTIM/CHR (CLB)
"VIDTIM/HTIME/HDV/$1I72" (AND2) mapped to:  VIDTIM/CHR (CLB)
"VIDTIM/HTIME/HDV/$1I73" (DFF) mapped to:  VIDTIM/CHR (CLB)
"VIDTIM/HTIME/HEQ/$1I70" (AND2) mapped to:  VIDTIM/HEQ (CLB)
"VIDTIM/HTIME/HEQ/$1I71" (OR2) mapped to:  VIDTIM/HEQ (CLB)
"VIDTIM/HTIME/HEQ/$1I72" (AND2) mapped to:  VIDTIM/HEQ (CLB)
"VIDTIM/HTIME/HEQ/$1I73" (DFF) mapped to:  VIDTIM/HEQ (CLB)
"VIDTIM/HTIME/HLN/$1I32" (XOR2) mapped to:  VIDTIM/HEQ (CLB)
"VIDTIM/HTIME/HLN/$1I35" (DFF) mapped to:  VIDTIM/HEQ (CLB)
"VIDTIM/HTIME/HST/$1I1" (DFF) mapped to:  VIDTIM/HST (CLB)
"VIDTIM/HTIME/HVS/$1I70" (AND2) mapped to:  VIDTIM/HST (CLB)
"VIDTIM/HTIME/HVS/$1I71" (OR2) mapped to:  VIDTIM/HST (CLB)
"VIDTIM/HTIME/HVS/$1I72" (AND2) mapped to:  VIDTIM/HST (CLB)
"VIDTIM/HTIME/HVS/$1I73" (DFF) mapped to:  VIDTIM/HST (CLB)
"VIDTIM/HTIME/HX2/$1I1" (DFF) mapped to:  VIDTIM/HTIME/L2HM1 (CLB)
"VIDTIM/HTIME/KEY/$1I1" (DFF) mapped to:  VIDTIM/HTIME/L2HM1 (CLB)
"VIDTIM/HTIME/NHS/$1I70" (AND2) mapped to:  VIDTIM/NHS (CLB)
"VIDTIM/HTIME/NHS/$1I71" (OR2) mapped to:  VIDTIM/NHS (CLB)
"VIDTIM/HTIME/NHS/$1I72" (AND2) mapped to:  VIDTIM/NHS (CLB)
"VIDTIM/HTIME/NHS/$1I73" (DFF) mapped to:  VIDTIM/NHS (CLB)
"VIDTIM/HTIME/VHS/$1I70" (AND2) mapped to:  VIDTIM/NHS (CLB)
"VIDTIM/HTIME/VHS/$1I71" (OR2) mapped to:  VIDTIM/NHS (CLB)
"VIDTIM/HTIME/VHS/$1I72" (AND2) mapped to:  VIDTIM/NHS (CLB)
"VIDTIM/HTIME/VHS/$1I73" (DFF) mapped to:  VIDTIM/NHS (CLB)
"VIDTIM/IKE/$1I1" (DFF) mapped to:  VIDTIM/IKE (CLB)
"VIDTIM/LDE" (DFF) mapped to:  VIDTIM/LDEND (CLB)
"VIDTIM/PBL/$1I1" (DFF) mapped to:  PELFIFO/FIFO/CE_RD (CLB)
"VIDTIM/PRELD/$1I37" (DFF) mapped to:  VIDTIM/PRLDEN (CLB)
"VIDTIM/T1/$1I32" (INV) mapped to:  VIDTIM/T1 (CLB)
"VIDTIM/T1/$1I35/$1I30" (DFF) mapped to:  VIDTIM/T1 (CLB)
"VIDTIM/T2/$1I32" (XOR2) mapped to:  VIDTIM/T1 (CLB)
"VIDTIM/T2/$1I35/$1I30" (DFF) mapped to:  VIDTIM/T1 (CLB)
"VIDTIM/VGK/$1I37" (DFF) mapped to:  VIDTIM/IKE (CLB)
"VIDTIM/VKE/$1I37" (DFF) mapped to:  VIDTIM/LDEND (CLB)
"VIDTIM/VRD1/$1I1" (DFF) mapped to:  VIDTIM/VRD1 (CLB)
"VIDTIM/VRD2/$1I1" (DFF) mapped to:  VIDTIM/VRD1 (CLB)
"VIDTIM/VSK/$1I37" (DFF) mapped to:  VIDTIM/PVSK (CLB)
"VIDTIM/VTIME2/$1I197/AND1" (AND4) mapped to:  VIDTIM/VTIME2/$1I197/AND1 (CLB)
"VIDTIM/VTIME2/$1I197/AND2" (AND4) mapped to:  VIDTIM/VTIME2/$1I197/AND2 (CLB)
"VIDTIM/VTIME2/$1I197/AND3" (AND3) mapped to:  VIDTIM/VTIME2/LASTV (CLB)
"VIDTIM/VTIME2/$1I197/MAXLO" (AND2) mapped to:  VIDTIM/VTIME2/LASTV (CLB)
"VIDTIM/VTIME2/$1I402/$1I7" (AND2) mapped to:  VIDTIM/VTIME2/LASTV (CLB)
"VIDTIM/VTIME2/$1I402/$1I8" (OR2) mapped to:  VIDTIM/VTIME2/LASTV (CLB)
"VIDTIM/VTIME2/$1I402/$1I9" (AND2) mapped to:  VIDTIM/VTIME2/LASTV (CLB)
"VIDTIM/VTIME2/$1I426" (OR2) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/VTIME2/$1I429" (AND2) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/VTIME2/$1I437" (OR2) mapped to:  VIDTIM/VTIME2/$1I197/AND1 (CLB)
"VIDTIM/VTIME2/$1I441" (AND3) mapped to:  VIDTIM/NVDR (CLB)
"VIDTIM/VTIME2/$1I457" (AND3) mapped to:  VIDTIM/VTIME2/NVRS (CLB)
"VIDTIM/VTIME2/$1I485" (AND2) mapped to:  VIDTIM/VTIME2/L0_63 (CLB)
"VIDTIM/VTIME2/$1I494" (AND2) mapped to:  IFD (CLB)
"VIDTIM/VTIME2/$1I495" (AND2) mapped to:  IFD (CLB)
"VIDTIM/VTIME2/$1I496" (OR2) mapped to:  IFD (CLB)
"VIDTIM/VTIME2/$1I511" (AND2) mapped to:  VIDTIM/VTIME2/VINC (CLB)
"VIDTIM/VTIME2/$1I528" (AND2) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/VTIME2/$1I533" (AND4) mapped to:  VIDTIM/VTIME2/L0_63 (CLB)
"VIDTIM/VTIME2/$1I539" (AND5) mapped to:  VIDTIM/VTIME2/$1I197/AND2 (CLB)
     VIDTIM/VTIME2/VINC (CLB)
"VIDTIM/VTIME2/$1I549" (AND5) mapped to:  VIDTIM/VTIME2/LASTV (CLB)
     VIDTIM/VTIME2/NVRS (CLB)
"VIDTIM/VTIME2/$1I559" (AND5) mapped to:  VIDTIM/VTIME2/L0_63 (CLB)
"VIDTIM/VTIME2/$1I567" (AND2) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/VTIME2/$1I571" (AND5) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
     VIDTIM/VTIME2/NVRS (CLB)
"VIDTIM/VTIME2/$1I578" (AND4) mapped to:  VIDTIM/VTIME2/$1I197/AND1 (CLB)
"VIDTIM/VTIME2/$1I584" (AND3) mapped to:  VIDTIM/VTIME2/$1I197/AND1 (CLB)
"VIDTIM/VTIME2/CVRN/$1I70" (AND2) mapped to:  VIDTIM/PVSK (CLB)
"VIDTIM/VTIME2/CVRN/$1I71" (OR2) mapped to:  VIDTIM/PVSK (CLB)
"VIDTIM/VTIME2/CVRN/$1I72" (AND2) mapped to:  VIDTIM/PVSK (CLB)
"VIDTIM/VTIME2/CVRN/$1I73" (DFF) mapped to:  VIDTIM/PVSK (CLB)
"VIDTIM/VTIME2/DVRN/$1I70" (AND2) mapped to:  VIDTIM/VTIME2/VINC (CLB)
"VIDTIM/VTIME2/DVRN/$1I71" (OR2) mapped to:  VIDTIM/VTIME2/VINC (CLB)
"VIDTIM/VTIME2/DVRN/$1I72" (AND2) mapped to:  VIDTIM/VTIME2/VINC (CLB)
"VIDTIM/VTIME2/DVRN/$1I73" (DFF) mapped to:  VIDTIM/VTIME2/VINC (CLB)
"VIDTIM/VTIME2/IFD/$1I1" (DFF) mapped to:  IFD (CLB)
"VIDTIM/VTIME2/MAXHI/$1I1" (DFF) mapped to:  VIDTIM/VTIME2/LASTV (CLB)
"VIDTIM/VTIME2/VCNT_1/AND10_REG_ffy_4" (AND2) mapped to:  VD7 (CLB)
"VIDTIM/VTIME2/VCNT_1/AND1_REG_ffx_0" (AND2) mapped to:  
     VIDTIM/VTIME2/VCOUNT<0> (CLB)
"VIDTIM/VTIME2/VCNT_1/AND2_REG_ffy_0" (AND2) mapped to:  
     VIDTIM/VTIME2/VCOUNT<0> (CLB)
"VIDTIM/VTIME2/VCNT_1/AND3_REG_ffx_1" (AND2) mapped to:  VD1 (CLB)
"VIDTIM/VTIME2/VCNT_1/AND4_REG_ffy_1" (AND2) mapped to:  VD1 (CLB)
"VIDTIM/VTIME2/VCNT_1/AND5_REG_ffx_2" (AND2) mapped to:  VD3 (CLB)
"VIDTIM/VTIME2/VCNT_1/AND6_REG_ffy_2" (AND2) mapped to:  VD3 (CLB)
"VIDTIM/VTIME2/VCNT_1/AND7_REG_ffx_3" (AND2) mapped to:  VD5 (CLB)
"VIDTIM/VTIME2/VCNT_1/AND8_REG_ffy_3" (AND2) mapped to:  VD5 (CLB)
"VIDTIM/VTIME2/VCNT_1/AND9_REG_ffx_4" (AND2) mapped to:  VD7 (CLB)
"VIDTIM/VTIME2/VCNT_1/CY4_0" (HIERCY4_19) mapped to:  
     VIDTIM/VTIME2/VCOUNT<0> (CLB)
"VIDTIM/VTIME2/VCNT_1/CY4_1" (HIERCY4_18) mapped to:  VD1 (CLB)
"VIDTIM/VTIME2/VCNT_1/CY4_2" (HIERCY4_18) mapped to:  VD3 (CLB)
"VIDTIM/VTIME2/VCNT_1/CY4_3" (HIERCY4_18) mapped to:  VD5 (CLB)
"VIDTIM/VTIME2/VCNT_1/CY4_4" (HIERCY4_17) mapped to:  VD7 (CLB)
"VIDTIM/VTIME2/VCNT_1/FF_ffx_0" (DFF) mapped to:  VIDTIM/VTIME2/VCOUNT<0> (CLB)
"VIDTIM/VTIME2/VCNT_1/FF_ffx_1" (DFF) mapped to:  VD1 (CLB)
"VIDTIM/VTIME2/VCNT_1/FF_ffx_2" (DFF) mapped to:  VD3 (CLB)
"VIDTIM/VTIME2/VCNT_1/FF_ffx_3" (DFF) mapped to:  VD5 (CLB)
"VIDTIM/VTIME2/VCNT_1/FF_ffx_4" (DFF) mapped to:  VD7 (CLB)
"VIDTIM/VTIME2/VCNT_1/FF_ffy_0" (DFF) mapped to:  VIDTIM/VTIME2/VCOUNT<0> (CLB)
"VIDTIM/VTIME2/VCNT_1/FF_ffy_1" (DFF) mapped to:  VD1 (CLB)
"VIDTIM/VTIME2/VCNT_1/FF_ffy_2" (DFF) mapped to:  VD3 (CLB)
"VIDTIM/VTIME2/VCNT_1/FF_ffy_3" (DFF) mapped to:  VD5 (CLB)
"VIDTIM/VTIME2/VCNT_1/FF_ffy_4" (DFF) mapped to:  VD7 (CLB)
"VIDTIM/VTIME2/VCNT_1/FMAP10_4_g" (FMAP) mapped to:  VD7 (CLB)
"VIDTIM/VTIME2/VCNT_1/FMAP1_0_f" (FMAP) mapped to:  VIDTIM/VTIME2/VCOUNT<0> (CLB)
"VIDTIM/VTIME2/VCNT_1/FMAP2_0_g" (FMAP) mapped to:  VIDTIM/VTIME2/VCOUNT<0> (CLB)
"VIDTIM/VTIME2/VCNT_1/FMAP3_1_f" (FMAP) mapped to:  VD1 (CLB)
"VIDTIM/VTIME2/VCNT_1/FMAP4_1_g" (FMAP) mapped to:  VD1 (CLB)
"VIDTIM/VTIME2/VCNT_1/FMAP5_2_f" (FMAP) mapped to:  VD3 (CLB)
"VIDTIM/VTIME2/VCNT_1/FMAP6_2_g" (FMAP) mapped to:  VD3 (CLB)
"VIDTIM/VTIME2/VCNT_1/FMAP7_3_f" (FMAP) mapped to:  VD5 (CLB)
"VIDTIM/VTIME2/VCNT_1/FMAP8_3_g" (FMAP) mapped to:  VD5 (CLB)
"VIDTIM/VTIME2/VCNT_1/FMAP9_4_f" (FMAP) mapped to:  VD7 (CLB)
"VIDTIM/VTIME2/VCNT_1/XOR1_G_SUM_0" (XOR2) mapped to:  
     VIDTIM/VTIME2/VCOUNT<0> (CLB)
"VIDTIM/VTIME2/VCNT_1/XOR2_F_SUM_1" (XOR2) mapped to:  VD1 (CLB)
"VIDTIM/VTIME2/VCNT_1/XOR3_G_SUM_1" (XOR2) mapped to:  VD1 (CLB)
"VIDTIM/VTIME2/VCNT_1/XOR4_F_SUM_2" (XOR2) mapped to:  VD3 (CLB)
"VIDTIM/VTIME2/VCNT_1/XOR5_G_SUM_2" (XOR2) mapped to:  VD3 (CLB)
"VIDTIM/VTIME2/VCNT_1/XOR6_F_SUM_3" (XOR2) mapped to:  VD5 (CLB)
"VIDTIM/VTIME2/VCNT_1/XOR7_G_SUM_3" (XOR2) mapped to:  VD5 (CLB)
"VIDTIM/VTIME2/VCNT_1/XOR8_F_SUM_4" (XOR2) mapped to:  VD7 (CLB)
"VIDTIM/VTIME2/VCNT_1/XOR9_G_SUM_4" (XOR2) mapped to:  VD7 (CLB)
"VIDTIM/VTIME2/VDV/$1I70" (AND2) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/VTIME2/VDV/$1I71" (OR2) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/VTIME2/VDV/$1I72" (AND2) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/VTIME2/VDV/$1I73" (DFF) mapped to:  VIDTIM/CSY- (CLB)
     VIDTIM/CSYNC/M0/2.0 (CLB), VIDTIM/VTIME2/LX0_17 (CLB)
"VIDTIM/VTIME2/VSY/$1I1" (DFF) mapped to:  VIDTIM/VTIME2/L0_63 (CLB)
"VSCLK.PAD" (X_OPAD) mapped to:  VSCLK (IOB)
"VSYNC-.PAD" (X_OPAD) mapped to:  VSYNC- (IOB)
"WR-.PAD" (X_IPAD) mapped to:  WR- (IOB)

Section:  Physical Design Log
-----------------------------


Section:  Physical Design Errors and Warnings
---------------------------------------------


Section:  IOB Properties
------------------------

"DBUS0" (IOB) : SLEW=SLOW FF/LATCH=DELAY
"DBUS1" (IOB) : SLEW=SLOW FF/LATCH=DELAY
"DBUS2" (IOB) : SLEW=SLOW FF/LATCH=DELAY
"DBUS3" (IOB) : SLEW=SLOW FF/LATCH=DELAY
"DBUS7" (IOB) : SLEW=SLOW FF/LATCH=DELAY
"DBUS6" (IOB) : SLEW=SLOW FF/LATCH=DELAY
"DBUS5" (IOB) : SLEW=SLOW FF/LATCH=DELAY
"DBUS4" (IOB) : SLEW=SLOW FF/LATCH=DELAY
"DBUS8" (IOB) : SLEW=SLOW FF/LATCH=DELAY
"DBUS9" (IOB) : SLEW=SLOW FF/LATCH=DELAY
"DFLDO" (IOB) : SLEW=SLOW
"VGA" (IOB) : SLEW=SLOW
"DAHLD" (IOB) : SLEW=SLOW
"ACOD3" (IOB) : SLEW=SLOW
"ACOD2" (IOB) : SLEW=SLOW
"ACOD1" (IOB) : SLEW=SLOW
"ACOD0" (IOB) : SLEW=SLOW
"RST-" (IOB) : PULLUP
"IZE-" (IOB) : SLEW=SLOW
"DRQOUT-" (IOB) : SLEW=FAST
"PELD0" (IOB) : FF/LATCH=DELAY
"PELD1" (IOB) : FF/LATCH=DELAY
"PELD2" (IOB) : FF/LATCH=DELAY
"PELD3" (IOB) : FF/LATCH=DELAY
"PELD4" (IOB) : FF/LATCH=DELAY
"PELD5" (IOB) : FF/LATCH=DELAY
"PELD6" (IOB) : FF/LATCH=DELAY
"PELD7" (IOB) : FF/LATCH=DELAY
"CASIN2-" (IOB) : FF/LATCH=DELAY
"DBUS10" (IOB) : SLEW=SLOW
"DBUS11" (IOB) : SLEW=SLOW
"DBUS20" (IOB) : SLEW=SLOW
"DBUS21" (IOB) : SLEW=SLOW
"DBUS22" (IOB) : SLEW=SLOW
"DBUS23" (IOB) : SLEW=SLOW
"DBUS24" (IOB) : SLEW=SLOW
"DBUS25" (IOB) : SLEW=SLOW
"DBUS26" (IOB) : SLEW=SLOW
"DBUS27" (IOB) : SLEW=SLOW
"DBUS28" (IOB) : SLEW=SLOW
"DBUS29" (IOB) : SLEW=SLOW
"DBUS12" (IOB) : SLEW=SLOW
"DBUS30" (IOB) : SLEW=SLOW
"DBUS31" (IOB) : SLEW=SLOW
"DBUS13" (IOB) : SLEW=SLOW
"DBUS14" (IOB) : SLEW=SLOW
"DBUS15" (IOB) : SLEW=SLOW
"DBUS16" (IOB) : SLEW=SLOW
"DBUS17" (IOB) : SLEW=SLOW
"DBUS18" (IOB) : SLEW=SLOW
"DBUS19" (IOB) : SLEW=SLOW
"LDEN" (IOB) : SLEW=FAST
"HDRV-" (IOB) : SLEW=SLOW
"KEY" (IOB) : SLEW=SLOW
"HSYNC-" (IOB) : SLEW=SLOW
"HIRQ-" (IOB) : SLEW=SLOW
"VGCLK" (IOB) : SLEW=FAST
"VDRV-" (IOB) : SLEW=SLOW
"VSYNC-" (IOB) : SLEW=SLOW
"VSCLK" (IOB) : SLEW=FAST
"DBLANK-" (IOB) : SLEW=SLOW
"ADCLK" (IOB) : SLEW=FAST
"DSYNC-" (IOB) : SLEW=SLOW

Section:  RPMs
--------------

VIDTIM/HTIME/HCNT_1/hset                 - 4 comps
VIDTIM/VTIME2/VCNT_1/hset                - 5 comps
PELFIFO/FIFO/HSET                        - 27 comps

Section:  Guide Report
----------------------

Guide not run on this design.

Section:  Design Summary
------------------------

   Number of warnings:     0
   Number of errors:       0
   Number of CLBs:             99 out of  196
      Flops/latches:     105
      4 input LUTs:      174
      3 input LUTs:      41
   Number of bonded IOBs:      70 out of   77
   Number of clock IOBs:        1 out of    8
      IO flops/latches:  53
   Number of primary CLKs:      1 out of    4
   Number of secondary CLKs:    2 out of    4
   Number of RPM macros:        3
   Number of STARTUPs:          1