XACT: version M1.5.19 Xilinx Inc. Fitter Report Design Name: calc_b Fitting Status: Successful Date: 10-25-1998, 0:36AM **************************** Resource Summary **************************** Design Device Macrocells Product Terms Pins Name Used Used Used Used calc_b XC9572XL-7-TQ100 66 /72 ( 91%) 252/360 ( 70%) 26 /72 ( 36%) PIN RESOURCES: Signal Type Required Mapped | Pin Type Used Remaining ------------------------------------|--------------------------------------- Input : 10 10 | I/O : 26 40 Output : 16 16 | GCK/IO : 0 3 Bidirectional : 0 0 | GTS/IO : 0 2 GCK : 0 0 | GSR/IO : 0 1 GTS : 0 0 | GSR : 0 0 | ---- ---- Total 26 26 GLOBAL RESOURCES: Global clock net(s) unused. Global output enable net(s) unused. Global set/reset net(s) unused. POWER DATA: There are 66 macrocells in high performance mode (MCHP). There are 0 macrocells in low power mode (MCLP). There are a total of 66 macrocells used (MC). End of Resource Summary ***************Resources Used by Successfully Mapped Logic****************** ** LOGIC ** Signal Total Signals Loc Pwr Slew Pin Pin Pin Name Pt Used Mode Rate # Type Use $OpTx$CE_ALU/CE_ALU_D2_INV$1086 4 8 FB1_11 STD 23 GCK/I/O (b) $OpTx$FX_DC$711 2 2 FB4_17 STD 90 I/O I $OpTx$FX_SC$714 4 8 FB1_10 STD 28 I/O (b) $OpTx$FX_SC$715 4 9 FB1_9 STD 22 GCK/I/O (b) $OpTx$FX_SC$716 2 9 FB1_3 STD 18 I/O (b) $OpTx$H5/ADDSUB1/$Net00002_/H5/ADDSUB1/$Net00002__D2_INV$1082 7 8 FB2_9 STD 99 GSR/I/O (b) $OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084 2 4 FB4_16 STD 86 I/O (b) $OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085 2 4 FB4_15 STD 89 I/O I $OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083 2 4 FB4_14 STD 78 I/O I A 4 4 FB2_5 STD FAST 95 I/O O ADDRESS<0> 10 15 FB1_1 STD 16 I/O (b) ADDRESS<1> 6 15 FB1_12 STD 33 I/O (b) ALUVAL<0> 9 9 FB2_1 STD 87 I/O (b) ALUVAL<1> 9 10 FB2_15 STD 11 I/O (b) ALUVAL<2> 9 10 FB2_13 STD 8 I/O (b) ALUVAL<3> 9 10 FB2_11 STD 4 GTS/I/O (b) B 4 4 FB2_6 STD FAST 96 I/O O C 3 4 FB2_14 STD FAST 9 I/O O D 4 4 FB2_8 STD FAST 97 I/O O E 3 4 FB2_16 STD FAST 10 I/O O F 4 4 FB2_12 STD FAST 6 I/O O G 3 4 FB2_17 STD FAST 12 I/O O GAUGE0 4 15 FB1_2 STD FAST 13 I/O O GAUGE1 2 3 FB3_10 STD FAST 60 I/O O GAUGE2 1 2 FB3_17 STD FAST 58 I/O O GAUGE3 1 3 FB3_14 STD FAST 55 I/O O H3/$Net00001_ 2 3 FB4_13 STD 85 I/O (b) H3/DELAY2 2 3 FB4_12 STD 82 I/O (b) H3/DELAY3 2 3 FB4_11 STD 74 I/O I H5/ADDSUB1/S1/$Net00266_/H5/ADDSUB1/S1/$Net00266__D2 5 4 FB2_7 STD 3 GTS/I/O (b) H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2 3 3 FB4_18 STD 79 I/O (b) H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2 5 5 FB2_4 STD 93 I/O (b) H5/DATA0/H5/DATA0_D2 7 11 FB1_18 STD 40 I/O (b) H5/DATA1/H5/DATA1_D2 7 11 FB1_17 STD 30 I/O I H5/DATA2/H5/DATA2_D2 7 11 FB1_15 STD 29 I/O I H5/DATA3/H5/DATA3_D2 7 11 FB1_14 STD 27 GCK/I/O (b) H5/QRESET/H5/QRESET_D2 1 6 FB2_3 STD 91 I/O (b) H6/H8/$Net00021_ 3 7 FB1_7 STD 25 I/O (b) H6/H8/$Net00022_ 3 7 FB3_18 STD 59 I/O (b) H6/H8/$Net00023_ 3 7 FB3_16 STD 64 I/O (b) H6/H8/$Net00024_ 3 7 FB3_15 STD 56 I/O (b) H6/H8/$Net00025_ 3 7 FB1_5 STD 14 I/O (b) H6/H8/$Net00026_ 3 7 FB3_13 STD 63 I/O (b) H6/H8/$Net00027_ 3 7 FB3_12 STD 61 I/O (b) H6/H8/$Net00028_ 3 7 FB3_11 STD 52 I/O I H6/H8/$Net00029_ 3 7 FB1_4 STD 20 I/O (b) H6/H8/$Net00030_ 3 7 FB3_9 STD 42 I/O I H6/H8/$Net00031_ 3 7 FB3_8 STD 37 I/O I H6/H8/$Net00033_ 3 7 FB3_7 STD 54 I/O (b) H6/H8/$Net00034_ 3 7 FB3_5 STD 35 I/O I H6/H8/$Net00035_ 3 7 FB3_4 STD 50 I/O (b) H6/H8/$Net00036_ 3 7 FB3_3 STD 49 I/O (b) H6/H8/$Net00037_ 3 7 FB3_1 STD 41 I/O (b) H6/STATMACH1/STATE 4 15 FB1_8 STD 17 I/O (b) OFL 8 13 FB2_2 STD FAST 94 I/O O STACKLED0 4 7 FB3_2 STD FAST 32 I/O O STACKLED1 4 7 FB1_6 STD FAST 15 I/O O STACKLED2 4 7 FB1_13 STD FAST 36 I/O O STACKLED3 4 7 FB3_6 STD FAST 53 I/O O SWI<0> 2 3 FB4_10 STD 81 I/O (b) SWI<1> 2 3 FB4_9 STD 66 I/O (b) SWI<2> 2 3 FB4_8 STD 70 I/O (b) SWI<3> 2 3 FB4_7 STD 77 I/O (b) SWI<4> 2 3 FB4_6 STD 76 I/O (b) SWI<5> 2 3 FB4_5 STD 68 I/O (b) SWI<6> 2 3 FB4_4 STD 72 I/O (b) ** INPUTS ** Signal Loc Pin Pin Pin Name # Type Use $Net00015_ FB3_8 37 I/O I $Net00016_ FB1_15 29 I/O I &__A__1 FB4_11 74 I/O I &__A__2 FB3_11 52 I/O I &__A__3 FB4_14 78 I/O I &__A__4 FB3_9 42 I/O I &__A__5 FB4_15 89 I/O I &__A__6 FB4_17 90 I/O I &__A__7 FB3_5 35 I/O I &__A__8 FB1_17 30 I/O I End of Resources Used by Successfully Mapped Logic *********************Function Block Resource Summary*********************** Function # of FB Inputs Signals Total O/IO IO Block Macrocells Used Used Pt Used Req Avail FB1 17 33 33 83 3/0 18 FB2 16 31 31 87 8/0 18 FB3 18 26 26 51 5/0 18 FB4 15 22 22 31 0/0 18 ---- ----- ----- ----- 66 252 16/0 72 *********************************** FB1 *********************************** Number of function block inputs used/remaining: 33/21 Number of signals used by logic mapping into function block: 33 Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin Name Pt Pt Pt Pt Mode # Type Use ADDRESS<0> 10 5<- 0 0 FB1_1 STD 16 I/O (b) GAUGE0 4 3<- /\4 0 FB1_2 STD 13 I/O O $OpTx$FX_SC$716 2 0 /\3 0 FB1_3 STD 18 I/O (b) H6/H8/$Net00029_ 3 0 0 2 FB1_4 STD 20 I/O (b) H6/H8/$Net00025_ 3 0 0 2 FB1_5 STD 14 I/O (b) STACKLED1 4 0 0 1 FB1_6 STD 15 I/O O H6/H8/$Net00021_ 3 0 0 2 FB1_7 STD 25 I/O (b) H6/STATMACH1/STATE 4 0 \/1 0 FB1_8 STD 17 I/O (b) $OpTx$FX_SC$715 4 1<- \/2 0 FB1_9 STD 22 GCK/I/O (b) $OpTx$FX_SC$714 4 2<- \/3 0 FB1_10 STD 28 I/O (b) $OpTx$CE_ALU/CE_ALU_D2_INV$1086 4 3<- \/4 0 FB1_11 STD 23 GCK/I/O (b) ADDRESS<1> 6 4<- \/3 0 FB1_12 STD 33 I/O (b) STACKLED2 4 3<- \/4 0 FB1_13 STD 36 I/O O H5/DATA3/H5/DATA3_D2 7 4<- \/2 0 FB1_14 STD 27 GCK/I/O (b) H5/DATA2/H5/DATA2_D2 7 2<- 0 0 FB1_15 STD 29 I/O I (unused) 0 0 \/5 0 FB1_16 39 I/O (b) H5/DATA1/H5/DATA1_D2 7 5<- \/3 0 FB1_17 STD 30 I/O I H5/DATA0/H5/DATA0_D2 7 3<- \/1 0 FB1_18 STD 40 I/O (b) Signals Used by Logic in Function Block 1: $Net00015_ 12: H6/H8/$Net00023_ 23: H6/H8/$Net00035_ 2: $Net00016_ 13: H6/H8/$Net00024_ 24: H6/H8/$Net00036_ 3: ADDRESS<0> 14: H6/H8/$Net00025_ 25: H6/H8/$Net00037_ 4: ADDRESS<1> 15: H6/H8/$Net00026_ 26: H6/STATMACH1/STATE 5: ALUVAL<0> 16: H6/H8/$Net00027_ 27: SWI<0> 6: GAUGE0 17: H6/H8/$Net00028_ 28: SWI<1> 7: H3/$Net00001_ 18: H6/H8/$Net00029_ 29: SWI<2> 8: H3/DELAY2 19: H6/H8/$Net00030_ 30: SWI<3> 9: H3/DELAY3 20: H6/H8/$Net00031_ 31: SWI<4> 10: H6/H8/$Net00021_ 21: H6/H8/$Net00033_ 32: SWI<5> 11: H6/H8/$Net00022_ 22: H6/H8/$Net00034_ 33: SWI<6> Signal 1 2 3 4 Signals FB Name 0----+----0----+----0----+----0----+----0 Used Inputs ADDRESS<0> XXXX.XXXX................X.XXXXXX....... 15 15 GAUGE0 XXXX.XXXX................X.XXXXXX....... 15 15 $OpTx$FX_SC$716 ......XXX..................XXXXXX....... 9 9 H6/H8/$Net00029_ XXXXX............X.......X.............. 7 7 H6/H8/$Net00025_ XXXXX........X...........X.............. 7 7 STACKLED1 ..XX.X....X...X...X..X.................. 7 7 H6/H8/$Net00021_ XXXXX....X...............X.............. 7 7 H6/STATMACH1/STATE XXXX.XXXX................X.XXXXXX....... 15 15 $OpTx$FX_SC$715 ......XXX..................XXXXXX....... 9 9 $OpTx$FX_SC$714 ......XXX..................X.XXXX....... 8 8 $OpTx$CE_ALU/CE_ALU_D2_INV$1086 ......XXX..................X.XXXX....... 8 8 ADDRESS<1> XXXX.XXXX................X.XXXXXX....... 15 15 STACKLED2 ..XX.X.....X...X...X..X................. 7 7 H5/DATA3/H5/DATA3_D2 ..XX.X......X...X......XX....XXXX....... 11 11 H5/DATA2/H5/DATA2_D2 ..XX.X.....X...X...X..X.....X.XXX....... 11 11 H5/DATA1/H5/DATA1_D2 ..XX.X....X...X...X..X.....X..XXX....... 11 11 H5/DATA0/H5/DATA0_D2 ..XX.X...X...X...X..X.....X...XXX....... 11 11 0----+----1----+----2----+----3----+----4 0 0 0 0 Legend: Total Pt - Total product terms used by the macrocell signal Imp Pt - Product terms imported from other macrocells Exp Pt - Product terms exported to other macrocells in direction shown Unused Pt - Unused local product terms remaining in macrocell Loc - Location where logic was mapped in device Pwr Mode - Macrocell power mode Pin Type/Use - I - Input GCK/FCLK - Global clock O - Output GTS/FOE - Global 3state/output-enable (b) - Buried macrocell X(@) - Signal used as input (wire-AND input) to the macrocell logic. The number of Signals Used may exceed the number of FB Inputs Used due to wire-ANDing in the switch matrix. *********************************** FB2 *********************************** Number of function block inputs used/remaining: 31/23 Number of signals used by logic mapping into function block: 31 Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin Name Pt Pt Pt Pt Mode # Type Use ALUVAL<0> 9 4<- 0 0 FB2_1 STD 87 I/O (b) OFL 8 3<- 0 0 FB2_2 STD 94 I/O O H5/QRESET/H5/QRESET_D2 1 0 /\3 1 FB2_3 STD 91 I/O (b) H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2 5 0 0 0 FB2_4 STD 93 I/O (b) A 4 0 0 1 FB2_5 STD 95 I/O O B 4 0 \/1 0 FB2_6 STD 96 I/O O H5/ADDSUB1/S1/$Net00266_/H5/ADDSUB1/S1/$Net00266__D2 5 1<- \/1 0 FB2_7 STD 3 GTS/I/O (b) D 4 1<- \/2 0 FB2_8 STD 97 I/O O $OpTx$H5/ADDSUB1/$Net00002_/H5/ADDSUB1/$Net00002__D2_INV$1082 7 2<- 0 0 FB2_9 STD 99 GSR/I/O (b) (unused) 0 0 \/5 0 FB2_10 1 I/O (b) ALUVAL<3> 9 5<- \/1 0 FB2_11 STD 4 GTS/I/O (b) F 4 1<- \/2 0 FB2_12 STD 6 I/O O ALUVAL<2> 9 4<- 0 0 FB2_13 STD 8 I/O (b) C 3 0 /\2 0 FB2_14 STD 9 I/O O ALUVAL<1> 9 4<- 0 0 FB2_15 STD 11 I/O (b) E 3 2<- /\4 0 FB2_16 STD 10 I/O O G 3 0 /\2 0 FB2_17 STD 12 I/O O (unused) 0 0 \/4 1 FB2_18 92 I/O (b) Signals Used by Logic in Function Block 1: $Net00015_ 12: ALUVAL<0> 22: H5/DATA0/H5/DATA0_D2 2: $Net00016_ 13: ALUVAL<1> 23: H5/DATA1/H5/DATA1_D2 3: $OpTx$CE_ALU/CE_ALU_D2_INV$1086 14: ALUVAL<2> 24: H5/DATA2/H5/DATA2_D2 4: $OpTx$FX_DC$711 15: ALUVAL<3> 25: H5/DATA3/H5/DATA3_D2 5: $OpTx$FX_SC$714 16: H3/$Net00001_ 26: H5/QRESET/H5/QRESET_D2 6: $OpTx$FX_SC$715 17: H3/DELAY2 27: OFL 7: $OpTx$FX_SC$716 18: H3/DELAY3 28: SWI<3> 8: $OpTx$H5/ADDSUB1/$Net00002_/H5/ADDSUB1/$Net00002__D2_INV$1082 19: H5/ADDSUB1/S1/$Net00266_/H5/ADDSUB1/S1/$Net00266__D2 29: SWI<4> 9: $OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084 20: H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2 30: SWI<5> 10: $OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085 21: H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2 31: SWI<6> 11: $OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083 Signal 1 2 3 4 Signals FB Name 0----+----0----+----0----+----0----+----0 Used Inputs ALUVAL<0> XX..XXX.XX.X.........X.................. 9 9 OFL XXX....XXXX..XX....XX....XX............. 13 13 H5/QRESET/H5/QRESET_D2 ...............XXX..........XXX......... 6 6 H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2 .......X..X..X.....X....X............... 5 5 A ...........XXXX......................... 4 4 B ...........XXXX......................... 4 4 H5/ADDSUB1/S1/$Net00266_/H5/ADDSUB1/S1/$Net00266__D2 ..........XX.........XX................. 4 4 D ...........XXXX......................... 4 4 $OpTx$H5/ADDSUB1/$Net00002_/H5/ADDSUB1/$Net00002__D2_INV$1082 ...X.......XX........X.....XXXX......... 8 8 ALUVAL<3> XX..XXX.XX....X.....X...X............... 10 10 F ...........XXXX......................... 4 4 ALUVAL<2> XX..XXX.XX...X.....X...X................ 10 10 C ...........XXXX......................... 4 4 ALUVAL<1> XX..XXX.XX..X.....X...X................. 10 10 E ...........XXXX......................... 4 4 G ...........XXXX......................... 4 4 0----+----1----+----2----+----3----+----4 0 0 0 0 Legend: Total Pt - Total product terms used by the macrocell signal Imp Pt - Product terms imported from other macrocells Exp Pt - Product terms exported to other macrocells in direction shown Unused Pt - Unused local product terms remaining in macrocell Loc - Location where logic was mapped in device Pwr Mode - Macrocell power mode Pin Type/Use - I - Input GCK/FCLK - Global clock O - Output GTS/FOE - Global 3state/output-enable (b) - Buried macrocell X(@) - Signal used as input (wire-AND input) to the macrocell logic. The number of Signals Used may exceed the number of FB Inputs Used due to wire-ANDing in the switch matrix. *********************************** FB3 *********************************** Number of function block inputs used/remaining: 26/28 Number of signals used by logic mapping into function block: 26 Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin Name Pt Pt Pt Pt Mode # Type Use H6/H8/$Net00037_ 3 0 0 2 FB3_1 STD 41 I/O (b) STACKLED0 4 0 0 1 FB3_2 STD 32 I/O O H6/H8/$Net00036_ 3 0 0 2 FB3_3 STD 49 I/O (b) H6/H8/$Net00035_ 3 0 0 2 FB3_4 STD 50 I/O (b) H6/H8/$Net00034_ 3 0 0 2 FB3_5 STD 35 I/O I STACKLED3 4 0 0 1 FB3_6 STD 53 I/O O H6/H8/$Net00033_ 3 0 0 2 FB3_7 STD 54 I/O (b) H6/H8/$Net00031_ 3 0 0 2 FB3_8 STD 37 I/O I H6/H8/$Net00030_ 3 0 0 2 FB3_9 STD 42 I/O I GAUGE1 2 0 0 3 FB3_10 STD 60 I/O O H6/H8/$Net00028_ 3 0 0 2 FB3_11 STD 52 I/O I H6/H8/$Net00027_ 3 0 0 2 FB3_12 STD 61 I/O (b) H6/H8/$Net00026_ 3 0 0 2 FB3_13 STD 63 I/O (b) GAUGE3 1 0 0 4 FB3_14 STD 55 I/O O H6/H8/$Net00024_ 3 0 0 2 FB3_15 STD 56 I/O (b) H6/H8/$Net00023_ 3 0 0 2 FB3_16 STD 64 I/O (b) GAUGE2 1 0 0 4 FB3_17 STD 58 I/O O H6/H8/$Net00022_ 3 0 0 2 FB3_18 STD 59 I/O (b) Signals Used by Logic in Function Block 1: $Net00015_ 10: H6/H8/$Net00021_ 19: H6/H8/$Net00030_ 2: $Net00016_ 11: H6/H8/$Net00022_ 20: H6/H8/$Net00031_ 3: ADDRESS<0> 12: H6/H8/$Net00023_ 21: H6/H8/$Net00033_ 4: ADDRESS<1> 13: H6/H8/$Net00024_ 22: H6/H8/$Net00034_ 5: ALUVAL<0> 14: H6/H8/$Net00025_ 23: H6/H8/$Net00035_ 6: ALUVAL<1> 15: H6/H8/$Net00026_ 24: H6/H8/$Net00036_ 7: ALUVAL<2> 16: H6/H8/$Net00027_ 25: H6/H8/$Net00037_ 8: ALUVAL<3> 17: H6/H8/$Net00028_ 26: H6/STATMACH1/STATE 9: GAUGE0 18: H6/H8/$Net00029_ Signal 1 2 3 4 Signals FB Name 0----+----0----+----0----+----0----+----0 Used Inputs H6/H8/$Net00037_ XXXX...X................XX.............. 7 7 STACKLED0 ..XX....XX...X...X..X................... 7 7 H6/H8/$Net00036_ XXXX...X...............X.X.............. 7 7 H6/H8/$Net00035_ XXXX..X...............X..X.............. 7 7 H6/H8/$Net00034_ XXXX.X...............X...X.............. 7 7 STACKLED3 ..XX....X...X...X......XX............... 7 7 H6/H8/$Net00033_ XXXXX...............X....X.............. 7 7 H6/H8/$Net00031_ XXXX..X............X.....X.............. 7 7 H6/H8/$Net00030_ XXXX.X............X......X.............. 7 7 GAUGE1 ..XX....X............................... 3 3 H6/H8/$Net00028_ XXXX...X........X........X.............. 7 7 H6/H8/$Net00027_ XXXX..X........X.........X.............. 7 7 H6/H8/$Net00026_ XXXX.X........X..........X.............. 7 7 GAUGE3 ..XX....X............................... 3 3 H6/H8/$Net00024_ XXXX...X....X............X.............. 7 7 H6/H8/$Net00023_ XXXX..X....X.............X.............. 7 7 GAUGE2 ...X....X............................... 2 2 H6/H8/$Net00022_ XXXX.X....X..............X.............. 7 7 0----+----1----+----2----+----3----+----4 0 0 0 0 Legend: Total Pt - Total product terms used by the macrocell signal Imp Pt - Product terms imported from other macrocells Exp Pt - Product terms exported to other macrocells in direction shown Unused Pt - Unused local product terms remaining in macrocell Loc - Location where logic was mapped in device Pwr Mode - Macrocell power mode Pin Type/Use - I - Input GCK/FCLK - Global clock O - Output GTS/FOE - Global 3state/output-enable (b) - Buried macrocell X(@) - Signal used as input (wire-AND input) to the macrocell logic. The number of Signals Used may exceed the number of FB Inputs Used due to wire-ANDing in the switch matrix. *********************************** FB4 *********************************** Number of function block inputs used/remaining: 22/32 Number of signals used by logic mapping into function block: 22 Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin Name Pt Pt Pt Pt Mode # Type Use (unused) 0 0 0 5 FB4_1 65 I/O (unused) 0 0 0 5 FB4_2 67 I/O (unused) 0 0 0 5 FB4_3 71 I/O SWI<6> 2 0 0 3 FB4_4 STD 72 I/O (b) SWI<5> 2 0 0 3 FB4_5 STD 68 I/O (b) SWI<4> 2 0 0 3 FB4_6 STD 76 I/O (b) SWI<3> 2 0 0 3 FB4_7 STD 77 I/O (b) SWI<2> 2 0 0 3 FB4_8 STD 70 I/O (b) SWI<1> 2 0 0 3 FB4_9 STD 66 I/O (b) SWI<0> 2 0 0 3 FB4_10 STD 81 I/O (b) H3/DELAY3 2 0 0 3 FB4_11 STD 74 I/O I H3/DELAY2 2 0 0 3 FB4_12 STD 82 I/O (b) H3/$Net00001_ 2 0 0 3 FB4_13 STD 85 I/O (b) $OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083 2 0 0 3 FB4_14 STD 78 I/O I $OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085 2 0 0 3 FB4_15 STD 89 I/O I $OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084 2 0 0 3 FB4_16 STD 86 I/O (b) $OpTx$FX_DC$711 2 0 0 3 FB4_17 STD 90 I/O I H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2 3 0 0 2 FB4_18 STD 79 I/O (b) Signals Used by Logic in Function Block 1: $Net00015_ 9: &__A__5 16: H5/DATA2/H5/DATA2_D2 2: $Net00016_ 10: &__A__6 17: SWI<1> 3: $OpTx$H5/ADDSUB1/$Net00002_/H5/ADDSUB1/$Net00002__D2_INV$1082 11: &__A__7 18: SWI<2> 4: $OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083 12: &__A__8 19: SWI<3> 5: &__A__1 13: H3/$Net00001_ 20: SWI<4> 6: &__A__2 14: H3/DELAY2 21: SWI<5> 7: &__A__3 15: H5/DATA1/H5/DATA1_D2 22: SWI<6> 8: &__A__4 Signal 1 2 3 4 Signals FB Name 0----+----0----+----0----+----0----+----0 Used Inputs SWI<6> XX...X.................................. 3 3 SWI<5> XX....X................................. 3 3 SWI<4> XX.....X................................ 3 3 SWI<3> XX......X............................... 3 3 SWI<2> XX.......X.............................. 3 3 SWI<1> XX........X............................. 3 3 SWI<0> XX.........X............................ 3 3 H3/DELAY3 XX...........X.......................... 3 3 H3/DELAY2 XX..........X........................... 3 3 H3/$Net00001_ XX..X................................... 3 3 $OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083 ..................XXXX.................. 4 4 $OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085 .................X.XXX.................. 4 4 $OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084 ................X..XXX.................. 4 4 $OpTx$FX_DC$711 ...X..........X......................... 2 2 H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2 ..XX...........X........................ 3 3 0----+----1----+----2----+----3----+----4 0 0 0 0 Legend: Total Pt - Total product terms used by the macrocell signal Imp Pt - Product terms imported from other macrocells Exp Pt - Product terms exported to other macrocells in direction shown Unused Pt - Unused local product terms remaining in macrocell Loc - Location where logic was mapped in device Pwr Mode - Macrocell power mode Pin Type/Use - I - Input GCK/FCLK - Global clock O - Output GTS/FOE - Global 3state/output-enable (b) - Buried macrocell X(@) - Signal used as input (wire-AND input) to the macrocell logic. The number of Signals Used may exceed the number of FB Inputs Used due to wire-ANDing in the switch matrix. ;;-----------------------------------------------------------------;; ; Implemented Equations. A = "ALUVAL<1>" * /"ALUVAL<2>" * "ALUVAL<3>" * "ALUVAL<0>" + /"ALUVAL<1>" * "ALUVAL<2>" * "ALUVAL<3>" * "ALUVAL<0>" + /"ALUVAL<1>" * "ALUVAL<2>" * /"ALUVAL<3>" * /"ALUVAL<0>" + /"ALUVAL<1>" * /"ALUVAL<2>" * /"ALUVAL<3>" * "ALUVAL<0>" B = "ALUVAL<1>" * "ALUVAL<2>" * /"ALUVAL<0>" + "ALUVAL<1>" * "ALUVAL<3>" * "ALUVAL<0>" + "ALUVAL<2>" * "ALUVAL<3>" * /"ALUVAL<0>" + /"ALUVAL<1>" * "ALUVAL<2>" * /"ALUVAL<3>" * "ALUVAL<0>" C = "ALUVAL<1>" * "ALUVAL<2>" * "ALUVAL<3>" + "ALUVAL<2>" * "ALUVAL<3>" * /"ALUVAL<0>" + "ALUVAL<1>" * /"ALUVAL<2>" * /"ALUVAL<3>" * /"ALUVAL<0>" D = "ALUVAL<1>" * "ALUVAL<2>" * "ALUVAL<0>" + /"ALUVAL<1>" * /"ALUVAL<2>" * "ALUVAL<0>" + "ALUVAL<1>" * /"ALUVAL<2>" * "ALUVAL<3>" * /"ALUVAL<0>" ;Imported pterms FB2_7 + /"ALUVAL<1>" * "ALUVAL<2>" * /"ALUVAL<3>" * /"ALUVAL<0>" E = /"ALUVAL<3>" * "ALUVAL<0>" ;Imported pterms FB2_17 + /"ALUVAL<1>" * "ALUVAL<2>" * /"ALUVAL<3>" + /"ALUVAL<1>" * /"ALUVAL<2>" * "ALUVAL<0>" F = "ALUVAL<1>" * /"ALUVAL<2>" * /"ALUVAL<3>" + "ALUVAL<1>" * /"ALUVAL<3>" * "ALUVAL<0>" + /"ALUVAL<2>" * /"ALUVAL<3>" * "ALUVAL<0>" ;Imported pterms FB2_11 + /"ALUVAL<1>" * "ALUVAL<2>" * "ALUVAL<3>" * "ALUVAL<0>" G = /"ALUVAL<1>" * /"ALUVAL<2>" * /"ALUVAL<3>" + "ALUVAL<1>" * "ALUVAL<2>" * /"ALUVAL<3>" * "ALUVAL<0>" + /"ALUVAL<1>" * "ALUVAL<2>" * "ALUVAL<3>" * /"ALUVAL<0>" /OFL := /OFL * /"H5/QRESET/H5/QRESET_D2" * "$OpTx$CE_ALU/CE_ALU_D2_INV$1086" + "ALUVAL<3>" * "$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2" * /"H5/QRESET/H5/QRESET_D2" * /"$OpTx$CE_ALU/CE_ALU_D2_INV$1086" + /"ALUVAL<3>" * /"$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2" * /"H5/QRESET/H5/QRESET_D2" * /"$OpTx$CE_ALU/CE_ALU_D2_INV$1086" + "ALUVAL<2>" * "$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2" * /"H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2" * /"H5/QRESET/H5/QRESET_D2" * /"$OpTx$CE_ALU/CE_ALU_D2_INV$1086" ;Imported pterms FB2_3 + /"ALUVAL<2>" * /"$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2" * /"H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2" * /"H5/QRESET/H5/QRESET_D2" * /"$OpTx$CE_ALU/CE_ALU_D2_INV$1086" + "$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * /"H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2" * /"$OpTx$H5/ADDSUB1/$Net00002_/H5/ADDSUB1/$Net00002__D2_INV$1082" * /"H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2" * /"H5/QRESET/H5/QRESET_D2" * /"$OpTx$CE_ALU/CE_ALU_D2_INV$1086" + /"$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * /"H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2" * "$OpTx$H5/ADDSUB1/$Net00002_/H5/ADDSUB1/$Net00002__D2_INV$1082" * /"H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2" * /"H5/QRESET/H5/QRESET_D2" * /"$OpTx$CE_ALU/CE_ALU_D2_INV$1086" OFL.CLKF = "$Net00016_" * "$Net00015_" OFL.PRLD = VCC GAUGE3 = /"ADDRESS<0>" * /"ADDRESS<1>" * GAUGE0 GAUGE2 = /"ADDRESS<1>" * GAUGE0 GAUGE1 = /"ADDRESS<0>" * GAUGE0 + /"ADDRESS<1>" * GAUGE0 GAUGE0.T = ;Imported pterms FB1_3 /"ADDRESS<0>" * /"ADDRESS<1>" * /"H6/STATMACH1/STATE" * /"SWI<1>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" * /GAUGE0 + /"ADDRESS<0>" * /"ADDRESS<1>" * /"H6/STATMACH1/STATE" * /"SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" * /GAUGE0 + "ADDRESS<0>" * "ADDRESS<1>" * /"H6/STATMACH1/STATE" * "SWI<1>" * /"SWI<2>" * "SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" GAUGE0.CLKF = "$Net00016_" * "$Net00015_" GAUGE0.PRLD = VCC "$OpTx$CE_ALU/CE_ALU_D2_INV$1086" = "H3/$Net00001_" ;Imported pterms FB1_10 + /"H3/DELAY2" + "H3/DELAY3" + "SWI<1>" * "SWI<3>" * "SWI<4>" * "SWI<5>" * "SWI<6>" "$OpTx$FX_DC$711" = "$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" Xor "H5/DATA1/H5/DATA1_D2" "$OpTx$FX_SC$714" = "H3/$Net00001_" + /"H3/DELAY2" ;Imported pterms FB1_9 + "H3/DELAY3" + "SWI<1>" * "SWI<3>" * "SWI<4>" * "SWI<5>" * "SWI<6>" "$OpTx$FX_SC$715" = /"H3/$Net00001_" * "H3/DELAY2" * /"SWI<6>" * /"H3/DELAY3" + /"H3/$Net00001_" * "H3/DELAY2" * /"SWI<4>" * /"SWI<5>" * /"H3/DELAY3" + /"SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * /"H3/DELAY3" ;Imported pterms FB1_8 + /"SWI<1>" * /"SWI<2>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * /"H3/DELAY3" "$OpTx$FX_SC$716" = /"H3/$Net00001_" * "H3/DELAY2" * /"SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" + /"SWI<1>" * "SWI<2>" * "SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" "$OpTx$H5/ADDSUB1/$Net00002_/H5/ADDSUB1/$Net00002__D2_INV$1082" = /"ALUVAL<1>" * "$OpTx$FX_DC$711" + /"ALUVAL<1>" * /"ALUVAL<0>" * "H5/DATA0/H5/DATA0_D2" + /"ALUVAL<1>" * /"SWI<6>" * /"H5/DATA0/H5/DATA0_D2" + /"ALUVAL<0>" * "H5/DATA0/H5/DATA0_D2" * "$OpTx$FX_DC$711" + /"SWI<6>" * /"H5/DATA0/H5/DATA0_D2" * "$OpTx$FX_DC$711" ;Imported pterms FB2_8 + /"ALUVAL<1>" * /"SWI<3>" * "SWI<4>" * "SWI<5>" * /"H5/DATA0/H5/DATA0_D2" + /"SWI<3>" * "SWI<4>" * "SWI<5>" * /"H5/DATA0/H5/DATA0_D2" * "$OpTx$FX_DC$711" "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" = /"SWI<4>" + /"SWI<1>" * "SWI<5>" * "SWI<6>" "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" = /"SWI<5>" + /"SWI<2>" * "SWI<4>" * "SWI<6>" "$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" = /"SWI<6>" + /"SWI<3>" * "SWI<4>" * "SWI<5>" "ADDRESS<0>".T = "ADDRESS<0>" * /"H6/STATMACH1/STATE" * /"SWI<1>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" + "ADDRESS<0>" * /"H6/STATMACH1/STATE" * /"SWI<2>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" + "ADDRESS<0>" * /"H6/STATMACH1/STATE" * /"SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" + "ADDRESS<1>" * /"H6/STATMACH1/STATE" * /"SWI<1>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" ;Imported pterms FB1_2 + "ADDRESS<1>" * /"H6/STATMACH1/STATE" * /"SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" + /"H6/STATMACH1/STATE" * /"SWI<1>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" * /GAUGE0 + /"H6/STATMACH1/STATE" * /"SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" * /GAUGE0 + /"H6/STATMACH1/STATE" * "SWI<1>" * /"SWI<2>" * "SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" * GAUGE0 ;Imported pterms FB1_18 + "ADDRESS<1>" * /"H6/STATMACH1/STATE" * /"SWI<2>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" "ADDRESS<0>".CLKF = "$Net00016_" * "$Net00015_" "ADDRESS<0>".PRLD = GND "ADDRESS<1>".T = "ADDRESS<0>" * /"H6/STATMACH1/STATE" * "SWI<1>" * /"SWI<2>" * "SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" ;Imported pterms FB1_11 + /"ADDRESS<0>" * "ADDRESS<1>" * /"H6/STATMACH1/STATE" * /"SWI<1>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" + /"ADDRESS<0>" * "ADDRESS<1>" * /"H6/STATMACH1/STATE" * /"SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" + /"ADDRESS<0>" * /"H6/STATMACH1/STATE" * /"SWI<1>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" * /GAUGE0 + /"ADDRESS<0>" * /"H6/STATMACH1/STATE" * /"SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" * /GAUGE0 "ADDRESS<1>".CLKF = "$Net00016_" * "$Net00015_" "ADDRESS<1>".PRLD = GND "ALUVAL<0>" := "ALUVAL<0>" * "$OpTx$FX_SC$714" + "H5/DATA0/H5/DATA0_D2" * "$OpTx$FX_SC$716" + "ALUVAL<0>" * /"H5/DATA0/H5/DATA0_D2" * /"$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" + /"ALUVAL<0>" * "H5/DATA0/H5/DATA0_D2" * /"$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" ;Imported pterms FB2_18 + "ALUVAL<0>" * /"H5/DATA0/H5/DATA0_D2" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$FX_SC$715" + "ALUVAL<0>" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * /"$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" + /"ALUVAL<0>" * "H5/DATA0/H5/DATA0_D2" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$FX_SC$715" + "ALUVAL<0>" * "H5/DATA0/H5/DATA0_D2" * /"$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" "ALUVAL<0>".CLKF = "$Net00016_" * "$Net00015_" "ALUVAL<0>".PRLD = GND "ALUVAL<1>" := "ALUVAL<1>" * "$OpTx$FX_SC$714" + "H5/DATA1/H5/DATA1_D2" * "$OpTx$FX_SC$716" + "ALUVAL<1>" * /"H5/ADDSUB1/S1/$Net00266_/H5/ADDSUB1/S1/$Net00266__D2" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$FX_SC$715" + "ALUVAL<1>" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * /"$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" ;Imported pterms FB2_16 + "ALUVAL<1>" * /"H5/DATA1/H5/DATA1_D2" * /"$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" + /"ALUVAL<1>" * "H5/DATA1/H5/DATA1_D2" * /"$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" + "ALUVAL<1>" * "H5/DATA1/H5/DATA1_D2" * /"$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" + /"ALUVAL<1>" * "H5/ADDSUB1/S1/$Net00266_/H5/ADDSUB1/S1/$Net00266__D2" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" "ALUVAL<1>".CLKF = "$Net00016_" * "$Net00015_" "ALUVAL<1>".PRLD = GND "ALUVAL<2>" := "ALUVAL<2>" * "$OpTx$FX_SC$714" + "$OpTx$FX_SC$716" * "H5/DATA2/H5/DATA2_D2" + "ALUVAL<2>" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * /"$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" + "ALUVAL<2>" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$FX_SC$715" * /"H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2" ;Imported pterms FB2_12 + "ALUVAL<2>" * /"$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" * /"H5/DATA2/H5/DATA2_D2" + /"ALUVAL<2>" * /"$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" * "H5/DATA2/H5/DATA2_D2" ;Imported pterms FB2_14 + "ALUVAL<2>" * /"$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" * "H5/DATA2/H5/DATA2_D2" + /"ALUVAL<2>" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" * "H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2" "ALUVAL<2>".CLKF = "$Net00016_" * "$Net00015_" "ALUVAL<2>".PRLD = GND "ALUVAL<3>" := "ALUVAL<3>" * "$OpTx$FX_SC$714" + "$OpTx$FX_SC$716" * "H5/DATA3/H5/DATA3_D2" + "ALUVAL<3>" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$FX_SC$715" * /"H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2" ;Imported pterms FB2_10 + "ALUVAL<3>" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * /"$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" + "ALUVAL<3>" * /"$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" * /"H5/DATA3/H5/DATA3_D2" + /"ALUVAL<3>" * /"$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" * "H5/DATA3/H5/DATA3_D2" + "ALUVAL<3>" * /"$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" * "H5/DATA3/H5/DATA3_D2" + /"ALUVAL<3>" * "$OpTx$OPCODE<0>/OPCODE<0>_D2_INV$1084" * "$OpTx$OPCODE<1>/OPCODE<1>_D2_INV$1085" * "$OpTx$FX_SC$715" * "H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2" "ALUVAL<3>".CLKF = "$Net00016_" * "$Net00015_" "ALUVAL<3>".PRLD = GND "H3/$Net00001_" := "&__A__1" "H3/$Net00001_".CLKF = "$Net00016_" * "$Net00015_" "H3/$Net00001_".PRLD = GND "H3/DELAY2" := /"H3/$Net00001_" "H3/DELAY2".CLKF = "$Net00016_" * "$Net00015_" "H3/DELAY2".PRLD = GND "H3/DELAY3" := "H3/DELAY2" "H3/DELAY3".CLKF = "$Net00016_" * "$Net00015_" "H3/DELAY3".PRLD = GND "H5/ADDSUB1/S1/$Net00266_/H5/ADDSUB1/S1/$Net00266__D2" = /"H5/DATA0/H5/DATA0_D2" * "H5/DATA1/H5/DATA1_D2" + "ALUVAL<0>" * /"$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" * "H5/DATA1/H5/DATA1_D2" + /"ALUVAL<0>" * "$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" * "H5/DATA1/H5/DATA1_D2" + /"ALUVAL<0>" * "H5/DATA0/H5/DATA0_D2" * /"$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" * /"H5/DATA1/H5/DATA1_D2" ;Imported pterms FB2_6 + "ALUVAL<0>" * "H5/DATA0/H5/DATA0_D2" * "$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" * /"H5/DATA1/H5/DATA1_D2" /"H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2" = "$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" Xor "$OpTx$H5/ADDSUB1/$Net00002_/H5/ADDSUB1/$Net00002__D2_INV$1082" * "H5/DATA2/H5/DATA2_D2" + /"$OpTx$H5/ADDSUB1/$Net00002_/H5/ADDSUB1/$Net00002__D2_INV$1082" * /"H5/DATA2/H5/DATA2_D2" /"H5/ADDSUB1/S3/$Net00266_/H5/ADDSUB1/S3/$Net00266__D2" = "$OpTx$OPCODE<2>/OPCODE<2>_D2_INV$1083" Xor "ALUVAL<2>" * "H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2" * /"H5/DATA3/H5/DATA3_D2" + /"ALUVAL<2>" * "H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2" * "H5/DATA3/H5/DATA3_D2" + /"H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2" * "$OpTx$H5/ADDSUB1/$Net00002_/H5/ADDSUB1/$Net00002__D2_INV$1082" * "H5/DATA3/H5/DATA3_D2" + /"H5/ADDSUB1/S2/$Net00266_/H5/ADDSUB1/S2/$Net00266__D2" * /"$OpTx$H5/ADDSUB1/$Net00002_/H5/ADDSUB1/$Net00002__D2_INV$1082" * /"H5/DATA3/H5/DATA3_D2" "H5/DATA0/H5/DATA0_D2" = /"SWI<4>" * "SWI<0>" + /"SWI<5>" * "SWI<0>" + /"SWI<6>" * "SWI<0>" + /"ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00029_" * "SWI<4>" * "SWI<5>" * "SWI<6>" ;Imported pterms FB1_17 + "ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00033_" * "SWI<4>" * "SWI<5>" * "SWI<6>" + "ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00021_" * "SWI<4>" * "SWI<5>" * "SWI<6>" + /"ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00025_" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /GAUGE0 "H5/DATA1/H5/DATA1_D2" = "SWI<1>" * /"SWI<4>" + "SWI<1>" * /"SWI<5>" ;Imported pterms FB1_16 + "SWI<1>" * /"SWI<6>" + "ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00034_" * "SWI<4>" * "SWI<5>" * "SWI<6>" + "ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00022_" * "SWI<4>" * "SWI<5>" * "SWI<6>" + /"ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00030_" * "SWI<4>" * "SWI<5>" * "SWI<6>" + /"ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00026_" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /GAUGE0 "H5/DATA2/H5/DATA2_D2" = "SWI<2>" * /"SWI<4>" + "SWI<2>" * /"SWI<5>" + "SWI<2>" * /"SWI<6>" + "ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00023_" * "SWI<4>" * "SWI<5>" * "SWI<6>" + /"ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00031_" * "SWI<4>" * "SWI<5>" * "SWI<6>" ;Imported pterms FB1_14 + "ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00035_" * "SWI<4>" * "SWI<5>" * "SWI<6>" + /"ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00027_" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /GAUGE0 "H5/DATA3/H5/DATA3_D2" = "SWI<3>" * /"SWI<4>" + "SWI<3>" * /"SWI<5>" + "SWI<3>" * /"SWI<6>" ;Imported pterms FB1_13 + "ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00036_" * "SWI<4>" * "SWI<5>" * "SWI<6>" + "ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00024_" * "SWI<4>" * "SWI<5>" * "SWI<6>" + /"ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00037_" * "SWI<4>" * "SWI<5>" * "SWI<6>" + /"ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00028_" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /GAUGE0 "H5/QRESET/H5/QRESET_D2" = /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * /"SWI<5>" * "SWI<6>" * /"H3/DELAY3" "H6/H8/$Net00021_".T = "ADDRESS<0>" * "ALUVAL<0>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00021_" + "ADDRESS<0>" * /"ALUVAL<0>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00021_" "H6/H8/$Net00021_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00021_".PRLD = GND "H6/H8/$Net00022_".T = "ALUVAL<1>" * "ADDRESS<0>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00022_" + /"ALUVAL<1>" * "ADDRESS<0>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00022_" "H6/H8/$Net00022_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00022_".PRLD = GND "H6/H8/$Net00023_".T = "ALUVAL<2>" * "ADDRESS<0>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00023_" + /"ALUVAL<2>" * "ADDRESS<0>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00023_" "H6/H8/$Net00023_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00023_".PRLD = GND "H6/H8/$Net00024_".T = "ADDRESS<0>" * "ALUVAL<3>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00024_" + "ADDRESS<0>" * /"ALUVAL<3>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00024_" "H6/H8/$Net00024_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00024_".PRLD = GND "H6/H8/$Net00025_".T = /"ADDRESS<0>" * "ALUVAL<0>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00025_" + /"ADDRESS<0>" * /"ALUVAL<0>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00025_" "H6/H8/$Net00025_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00025_".PRLD = GND "H6/H8/$Net00026_".T = "ALUVAL<1>" * /"ADDRESS<0>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00026_" + /"ALUVAL<1>" * /"ADDRESS<0>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00026_" "H6/H8/$Net00026_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00026_".PRLD = GND "H6/H8/$Net00027_".T = "ALUVAL<2>" * /"ADDRESS<0>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00027_" + /"ALUVAL<2>" * /"ADDRESS<0>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00027_" "H6/H8/$Net00027_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00027_".PRLD = GND "H6/H8/$Net00028_".T = /"ADDRESS<0>" * "ALUVAL<3>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00028_" + /"ADDRESS<0>" * /"ALUVAL<3>" * /"ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00028_" "H6/H8/$Net00028_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00028_".PRLD = GND "H6/H8/$Net00029_".T = /"ADDRESS<0>" * "ALUVAL<0>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00029_" + /"ADDRESS<0>" * /"ALUVAL<0>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00029_" "H6/H8/$Net00029_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00029_".PRLD = GND "H6/H8/$Net00030_".T = "ALUVAL<1>" * /"ADDRESS<0>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00030_" + /"ALUVAL<1>" * /"ADDRESS<0>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00030_" "H6/H8/$Net00030_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00030_".PRLD = GND "H6/H8/$Net00031_".T = "ALUVAL<2>" * /"ADDRESS<0>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00031_" + /"ALUVAL<2>" * /"ADDRESS<0>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00031_" "H6/H8/$Net00031_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00031_".PRLD = GND "H6/H8/$Net00033_".T = "ADDRESS<0>" * "ALUVAL<0>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00033_" + "ADDRESS<0>" * /"ALUVAL<0>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00033_" "H6/H8/$Net00033_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00033_".PRLD = GND "H6/H8/$Net00034_".T = "ALUVAL<1>" * "ADDRESS<0>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00034_" + /"ALUVAL<1>" * "ADDRESS<0>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00034_" "H6/H8/$Net00034_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00034_".PRLD = GND "H6/H8/$Net00035_".T = "ALUVAL<2>" * "ADDRESS<0>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00035_" + /"ALUVAL<2>" * "ADDRESS<0>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00035_" "H6/H8/$Net00035_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00035_".PRLD = GND "H6/H8/$Net00036_".T = "ADDRESS<0>" * "ALUVAL<3>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00036_" + "ADDRESS<0>" * /"ALUVAL<3>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00036_" "H6/H8/$Net00036_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00036_".PRLD = GND "H6/H8/$Net00037_".T = /"ADDRESS<0>" * "ALUVAL<3>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * /"H6/H8/$Net00037_" + /"ADDRESS<0>" * /"ALUVAL<3>" * "ADDRESS<1>" * "H6/STATMACH1/STATE" * "H6/H8/$Net00037_" "H6/H8/$Net00037_".CLKF = "$Net00016_" * "$Net00015_" "H6/H8/$Net00037_".PRLD = GND "H6/STATMACH1/STATE" := "ADDRESS<0>" * /"H6/STATMACH1/STATE" * "SWI<1>" * /"SWI<2>" * "SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" + "ADDRESS<1>" * /"H6/STATMACH1/STATE" * "SWI<1>" * /"SWI<2>" * "SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" + /"H6/STATMACH1/STATE" * "SWI<1>" * /"SWI<2>" * "SWI<3>" * /"H3/$Net00001_" * "H3/DELAY2" * "SWI<4>" * "SWI<5>" * "SWI<6>" * /"H3/DELAY3" * GAUGE0 "H6/STATMACH1/STATE".CLKF = "$Net00016_" * "$Net00015_" "H6/STATMACH1/STATE".PRLD = GND STACKLED0 = "ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00033_" + "ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00021_" + /"ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00029_" + /"ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00025_" * /GAUGE0 STACKLED1 = "ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00034_" + "ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00022_" + /"ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00030_" + /"ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00026_" * /GAUGE0 STACKLED2 = /"ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00031_" ;Imported pterms FB1_12 + "ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00035_" + "ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00023_" + /"ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00027_" * /GAUGE0 STACKLED3 = "ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00036_" + "ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00024_" + /"ADDRESS<0>" * "ADDRESS<1>" * "H6/H8/$Net00037_" + /"ADDRESS<0>" * /"ADDRESS<1>" * "H6/H8/$Net00028_" * /GAUGE0 "SWI<0>" := "&__A__8" "SWI<0>".CLKF = "$Net00016_" * "$Net00015_" "SWI<0>".PRLD = GND "SWI<1>" := "&__A__7" "SWI<1>".CLKF = "$Net00016_" * "$Net00015_" "SWI<1>".PRLD = GND "SWI<2>" := "&__A__6" "SWI<2>".CLKF = "$Net00016_" * "$Net00015_" "SWI<2>".PRLD = GND "SWI<3>" := "&__A__5" "SWI<3>".CLKF = "$Net00016_" * "$Net00015_" "SWI<3>".PRLD = GND "SWI<4>" := "&__A__4" "SWI<4>".CLKF = "$Net00016_" * "$Net00015_" "SWI<4>".PRLD = GND "SWI<5>" := "&__A__3" "SWI<5>".CLKF = "$Net00016_" * "$Net00015_" "SWI<5>".PRLD = GND "SWI<6>" := "&__A__2" "SWI<6>".CLKF = "$Net00016_" * "$Net00015_" "SWI<6>".PRLD = GND **************************** Device Pin Out **************************** Device : XC9572XL-7-TQ100 & & & _ _ _ _ _ _ A A A G T V O T T T _ _ V T T T G T T T T T _ T T N I C F I I I _ _ C I I I N D I I I I _ I I D E C D B A L E E E 6 5 C E E E D O E E E E 3 E E -------------------------------------------------- /100 98 96 94 92 90 88 86 84 82 80 78 76 \ | 99 97 95 93 91 89 87 85 83 81 79 77 | TIE | 1 75 | GND TIE | 2 74 | &__A__1 TIE | 3 73 | TIE TIE | 4 72 | TIE VCC | 5 71 | TIE F | 6 70 | TIE TIE | 7 69 | GND TIE | 8 68 | TIE C | 9 67 | TIE E | 10 66 | TIE TIE | 11 65 | TIE G | 12 64 | TIE GAUGE0 | 13 XC9572XL-7-TQ100 63 | TIE TIE | 14 62 | GND STACKLED1 | 15 61 | TIE TIE | 16 60 | GAUGE1 TIE | 17 59 | TIE TIE | 18 58 | GAUGE2 TIE | 19 57 | VCC TIE | 20 56 | TIE GND | 21 55 | GAUGE3 TIE | 22 54 | TIE TIE | 23 53 | STACKLED3 TIE | 24 52 | &__A__2 TIE | 25 51 | VCC | 27 29 31 33 35 37 39 41 43 45 47 49 | \26 28 30 32 34 36 38 40 42 44 46 48 50 / -------------------------------------------------- V T T $ & G S T T & S $ V T T T & T G T T T T T T C I I N _ N T I I _ T N C I I I _ I N D I M C I I C E E e _ D A E E _ A e C E E E _ E D I E S K E E t A C A C t A 0 _ K _ K 0 _ 0 _ L _ L 0 _ 0 8 E 7 E 0 4 1 D D 1 6 0 2 5 _ _ Legend : TIE = Tie pin to GND or board trace driven to valid logic level VCC = Dedicated Power Pin GND = Dedicated Ground Pin TDI = Test Data In, JTAG pin TDO = Test Data Out, JTAG pin TCK = Test Clock, JTAG pin TMS = Test Mode Select, JTAG pin PROHIBITED = User reserved pin **************************** Compiler Options **************************** Following is a list of all global compiler options used by the fitter run. Device(s) Specified : 9572XL-7-TQ100 Use Timing Constraints : ON Ignore Assignments In Design File : OFF Create Programmable Ground Pins : OFF Use Advanced Fitting : ON Use Local Feedback : OFF Use Pin Feedback : OFF Default Power Setting : STD Default Output Slew Rate : FAST Guide File Used : NONE Multi Level Logic Optimization : ON Timing Optimization : ON Power/Slew Optimization : OFF High Fitting Effort : ON Automatic Wire-ANDing : OFF Xor Synthesis : ON D/T Synthesis : ON Use Boolean Minimization : ON Global Clock(GCK) Optimization : OFF Global Set/Reset(GSR) Optimization : ON Global Output Enable(GTS) Optimization : ON Collapsing pterm limit : 10 Collapsing input limit : 15