LCANET, 6
PROG, Synopsys, FPGA Express, v2.1, Build 2.1.2.23.7.1998
PART, 9572XLTQ100-7
SYM, C0, AND7, LIBVER=2.0.0
PIN, O, O, outhog, , 
PIN, I6, I, inhog1<6>, , 
PIN, I5, I, inhog1<4>, , 
PIN, I4, I, inhog1<5>, , 
PIN, I3, I, inhog1<0>, , 
PIN, I2, I, inhog1<1>, , 
PIN, I1, I, inhog1<2>, , 
PIN, I0, I, inhog1<3>, , 
END
SIG, inhog1<6>, PIN=inhog1<6>
SIG, inhog1<5>, PIN=inhog1<5>
SIG, inhog1<4>, PIN=inhog1<4>
SIG, inhog1<3>, PIN=inhog1<3>
SIG, inhog1<2>, PIN=inhog1<2>
SIG, inhog1<1>, PIN=inhog1<1>
SIG, inhog1<0>, PIN=inhog1<0>
SIG, outhog, PIN=outhog
EOF