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Answers Database
Initializing Mentor QuickSim simulation: Net names for the global reset signal
Record #105
Product Family: Software Here is a list of the different signal names used for the global-reset net:XC9500 /prld (active High for Timing simulation)XC2000: //globalresetb (active Low) XC3000/A/L: //globalresetb (active Low) XC4000/E/X: //globalsetreset (active High) Virtex: //globalsetreset (active High) XC5200: //globalreset (active High)XC7000: //prld (active High) For example, in an XC4000 design: force //globalsetreset 1 0 force //globalsetreset 0 50 The length of the global-reset pulse should be at least the specified minimum pulse width for an asynchronous set or reset line, as given in the data book. (This parameter is called Tmrw for FPGAs and Twmr for EPLDs.) End of Record #105 - Last Modified: 05/12/99 14:09 |
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