Answers Database
SYNOPSYS/XSI: Using an Input Latch (ILD_1) with No Delay
Record #174
Product Family: Software
Product Line: Synopsys
Product Part: FPGA Compiler
Product Version: 3.3a
Problem Title:
SYNOPSYS/XSI: Using an Input Latch (ILD_1) with No Delay
Problem Description:
The xc4000 input latch can be configured to have different delay options, using the
fast and nodelay properties. How are these attached in Synopsys?
Solution 1:
The standard input latch (ILD_1) available in the Xilinx-Synopsys interface library includes a built
-in delay which forces the input latch to have a zero hold time. This slows down the input latch.
In order to use an input latch without the built-in delay, Instantiate an ILD_1F primitive instead o
f an ILD_1 (INIT=Reset) or ILDI_1F instead of an ILDI_1 (INIT=Set).
Note that these input latches without a built in delay must be instantiated as they cannot
be automatically inferred.
See the Synopsys (XSI) for FPGAs Interface/Tutorial Guide, Appendix B, for more
details.
End of Record #174 - Last Modified: 12/20/95 09:12 |
