![]() |
|
![]() |
|
Answers Database
PROTEL 2.2:Use of XBLOX symbols may cause XNFMERGE Error 220, XNFPREP ERROR 3520
Record #570
Problem Title: PROGRAM: PROTEL VERSION: 2.2 PLATFORM(s): PC SHORT DESCRIPTION: PROTEL 2.2:Use of XBLOX symbols may cause XNFMERGE Error 220, XNFPREP ERROR 3520 ERROR MESSAGE: XMAKE: ERROR: Failed to find user defined subhierarchy '<xblox symbol>' in '<design>.xnf'. >>> '<xblox symbol>' must be user defined, since it is not a primitive, a Xilinx macro or an XBLOX symbol. Correct the error before running XMAKE again. XNFMERGE: ERROR 220: Can't open file '<xblox symbol>.xnf' XNFPREP: ERROR 3520: The following are invalid primitives in part `4003PC84-5'. Symbol Type = <xblox symbol> ; Symbol Name = U2/BX1 ; Output Signal = The design may not have been flattened completely. Check the XNFMERGE report file (design.MRG) to see if XNFMERGE encountered any errors in flattening the design. LONG DESCRIPTION: PROBLEM: Running a PROTEL design that contain XBLOX symbols causes one of the errors listed above. If running XMAKE, xmake will produce the error. If running the programs individually, XNFMERGE will produce a non-fatal error 220. If this error is ignored and XNFPREP is run, it will produce the error 3520. CAUSE: Current versions of Protel's XBLOX libraries are missing the DEF=BLOX attribute. This causes an error in XMAKE, XNFMERGE, and XNFPREP. This causes the Xilinx translation tools to think that the symbol is a user- created macro, not a Xilinx XBLOX symbol. Because of this, the tools mistakenly think the subhierarchy for the symbol should have been defined by the user. SOLUTION: Add the "def=blox" attribute to the xblox symbols in your design. Please note that BUS_IF<XX> symbols are actually macros and have underlying XBLOX symbols. Don't attach the attribute to these symbols, instead make sure that the underlying "ELEMENT" symbols have the attribute and that XNFMERGE can find this schematic. End of Record #570 - Last Modified: 03/07/97 08:20 |
| For the latest news, design tips, and patch information on the Xilinx design environment, check out the Technical Tips! |