Xilinx Answer #1043 : Foundation: Possible causes of XNFMERGE Warning 285

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Foundation: Possible causes of XNFMERGE Warning 285

Record #1043
Product Family: Software

Product Line: XACT FPGA

Product Part: xnfmerge

Problem Title:
Foundation: Possible causes of XNFMERGE Warning 285

Problem Description:
Urgency: standard

General Description:
Here are possible causes of an erroneous XNFMERGE Warning
285: Pin <pin_name> on symbol <sym_name> (in file
<file1>.xnf) not matched to any signal in file <file2>.xnf.

NOTE: You can ignore this warning if you intentionally
       created a symbol with extra pins (for future use), or
       if you are feeding a bus into a macro but are only
       using some of the bus bits inside the macro.

Solution 1:

Using a top level schematic with a lower level ABEL macro can
cause this problem.

If a set of signals are declared as a bus inside the ABEL
code, the bus signal names are written into the XNF file with
no brackets around the bus index (e.g. BUS0, BUS1, BUS2).

By default, Foundation writes bus pin names into the XNF file
with angle brackets (e.g. BUS<0>, BUS<1>, BUS<2>). This
mismatch in naming causes the XNFMERGE warning.

To make sure that the signal names and pin names look the
same, follow these conventions:

In the ABEL code, do not use parentheses or brackets when declaring the bus:

bus0..bus7 pin; "Correct (bad0..bad7) pin; "Incorrect

Make sure the ABEL macro symbol has the following attributes:

$FILE=<filename>.abl
$DEF=ABEL

Solution 2:

With Foundation 6.0.1 (with or without Service Pack), this
warning may also be issued if XBLOX buses cross hierarchical
boundaries through bus pins on user-created symbols.

If an XBLOX bus needs to travel through levels of hierarchy,
use a regular pin (e.g. DATA instead of DATA[0:0]) to
represent it on the symbol.

Inside the macro schematic, draw the XBLOX bus as a wire
(not a bus). On the upper level schematic, use a wire to
connect to the symbol.

XBLOX buses that are completely contained within one level
of hierarchy may be drawn as either a wire or a bus.

Solution 3:

In a Foundation 6.0.0 schematic, macro bus pins with lower-
case labels will not match buses with upper-case labels in
the macro schematic. When XNF files are created, the
connection between these pins and the signals in the lower-
level XNF file will not be made.

Use all upper case letters for symbol pins, and underlying
schematics/files' signal names.

The net name editor only allows upper-case, while the symbol
wizard allows either upper-case or lower case. So use upper-
case when defining pins in the symbol wizard to be sure the
match is made.

Beginning with Foundation 6.0.1, the symbol wizard will only
create upper-case pin names.

End of Record #1043 - Last Modified: 03/04/99 15:54

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