Answers Database
BIDIRectional IOs with Viewsynthesis
Record #1295
Product Family: Software
Product Line: ViewLogic
Product Part: Workview Office
Product Version: 7.2
Problem Title:
BIDIRectional IOs with Viewsynthesis
Problem Description:
Behavioral description of BIDIRectional IOs with viewsynthesis v7.2.
This does not work with the previous version of the software (v5.0.2x or
6.0.0 on the PC) due to a bug. The netlist in this case has to be manually
modified.
Solution 1:
Library ieee;
use ieee.std_logic_1164.all;
library synth;
use synth.vhdlsynth.all;
entity bidir is
PORT (signal a :inout std_logic;
signal clk, enable :in std_logic;
signal reset:in std_logic);
end bidir;
ARCHITECTURE behv of bidir is
signal tpout : std_logic;
begin
P1: process (clk, reset)
begin
if (reset='1') then
tpout <= '0';
elsif (clk'event and clk='1') then
tpout<= a;
end if;
end process;
a <= tpout when enable ='0' else 'Z';
end behv;
End of Record #1295 - Last Modified: 11/05/96 10:27 |
