Answers Database


Foundation XVHDL: how to use the OSC4 oscillator


Record #1556

Product Family: Software

Product Line: Metamor

Product Part: Foundation XVHDL

Problem Title:
Foundation XVHDL: how to use the OSC4 oscillator


Problem Description:
The Xilinx XC4000 series devices feature an on-chip
oscillator, which can be used to generate clock signals.
Consult the XACTstep Libraries Guide for more information on
the OSC4 component.


Solution 1:

Example of Instantiating the OSC4 Symbol
----------------------------------------
library IEEE;
use IEEE.std_logic_1164.all;

entity OSC4TEST is
     port (
      DATA: in std_logic;
      OUTDATA: inout std_logic
     );
end OSC4TEST;

architecture OSC4_ARCH of OSC4TEST is
component OSC4	 -- This example only uses the 500kHz output
    port(F500K: out std_logic);
end component;

signal CLK: std_logic;

begin

U1: OSC4 port map (F500K => CLK);

process (CLK)
begin
    if (CLK'event and CLK = '1') then
       OUTDATA <= DATA;
    end if;
end process;

end OSC4_ARCH;




End of Record #1556 - Last Modified: 01/03/00 11:06

For the latest news, design tips, and patch information on the Xilinx design environment, check out the Technical Tips!